21 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);  in mid_get_fuse_settings()  local
48 		dev_priv->iLVDS_enable = fuse_value & FB_MIPI_DISABLE;  in mid_get_fuse_settings()
51 		 dev_priv->iLVDS_enable ? "LVDS display" : "MIPI display");  in mid_get_fuse_settings()
54 	 if (dev_priv->iLVDS_enable) {  in mid_get_fuse_settings()
55 		dev_priv->is_lvds_on = true;  in mid_get_fuse_settings()
56 		dev_priv->is_mipi_on = false;  in mid_get_fuse_settings()
58 		dev_priv->is_mipi_on = true;  in mid_get_fuse_settings()
59 		dev_priv->is_lvds_on = false;  in mid_get_fuse_settings()
62 	dev_priv->video_device_fuse = fuse_value;  in mid_get_fuse_settings()
70 	dev_priv->fuse_reg_value = fuse_value;  in mid_get_fuse_settings()
74 		dev_priv->core_freq = 200;  in mid_get_fuse_settings()
77 		dev_priv->core_freq = 100;  in mid_get_fuse_settings()
80 		dev_priv->core_freq = 166;  in mid_get_fuse_settings()
85 		dev_priv->core_freq = 0;  in mid_get_fuse_settings()
87 	dev_dbg(dev->dev, "LNC core clk is %dMHz.\n", dev_priv->core_freq);  in mid_get_fuse_settings()
94 static void mid_get_pci_revID(struct drm_psb_private *dev_priv)  in mid_get_pci_revID()  argument
97 	struct pci_dev *pdev = to_pci_dev(dev_priv->dev.dev);  in mid_get_pci_revID()
107 	dev_priv->platform_rev_id = (uint8_t) platform_rev_id;  in mid_get_pci_revID()
109 	dev_dbg(dev_priv->dev.dev, "platform_rev_id is %x\n", dev_priv->platform_rev_id);  in mid_get_pci_revID()
162 static int mid_get_vbt_data_r0(struct drm_psb_private *dev_priv, u32 addr)  in mid_get_vbt_data_r0()  argument
179 	dev_priv->gct_data.bpi = bpi;  in mid_get_vbt_data_r0()
180 	dev_priv->gct_data.pt = gct.PD.PanelType;  in mid_get_vbt_data_r0()
181 	dev_priv->gct_data.DTD = gct.panel[bpi].DTD;  in mid_get_vbt_data_r0()
182 	dev_priv->gct_data.Panel_Port_Control =  in mid_get_vbt_data_r0()
184 	dev_priv->gct_data.Panel_MIPI_Display_Descriptor =  in mid_get_vbt_data_r0()
190 static int mid_get_vbt_data_r1(struct drm_psb_private *dev_priv, u32 addr)  in mid_get_vbt_data_r1()  argument
207 	dev_priv->gct_data.bpi = bpi;  in mid_get_vbt_data_r1()
208 	dev_priv->gct_data.pt = gct.PD.PanelType;  in mid_get_vbt_data_r1()
209 	dev_priv->gct_data.DTD = gct.panel[bpi].DTD;  in mid_get_vbt_data_r1()
210 	dev_priv->gct_data.Panel_Port_Control =  in mid_get_vbt_data_r1()
212 	dev_priv->gct_data.Panel_MIPI_Display_Descriptor =  in mid_get_vbt_data_r1()
218 static int mid_get_vbt_data_r10(struct drm_psb_private *dev_priv, u32 addr)  in mid_get_vbt_data_r10()  argument
223 	struct oaktrail_timing_info *dp_ti = &dev_priv->gct_data.DTD;  in mid_get_vbt_data_r10()
241 	dev_priv->gct_data.bpi = vbt.primary_panel_idx;  in mid_get_vbt_data_r10()
242 	dev_priv->gct_data.Panel_MIPI_Display_Descriptor =  in mid_get_vbt_data_r10()
270 static void mid_get_vbt_data(struct drm_psb_private *dev_priv)  in mid_get_vbt_data()  argument
272 	struct drm_device *dev = &dev_priv->dev;  in mid_get_vbt_data()
311 		ret = mid_get_vbt_data_r0(dev_priv, addr);  in mid_get_vbt_data()
314 		ret = mid_get_vbt_data_r1(dev_priv, addr);  in mid_get_vbt_data()
317 		ret = mid_get_vbt_data_r10(dev_priv, addr);  in mid_get_vbt_data()
327 		dev_priv->has_gct = true;  in mid_get_vbt_data()
332 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);  in mid_chip_setup()  local
334 	mid_get_vbt_data(dev_priv);  in mid_chip_setup()
335 	mid_get_pci_revID(dev_priv);  in mid_chip_setup()