Lines Matching full:29
168 /* Y 29th frame start address for output DMA */
225 /* CB 29th frame start address for output DMA */
282 /* CR 29th frame start address for output DMA */
401 #define EXYNOS_CISRCFMT_ITU601_16BIT (1 << 29)
414 #define EXYNOS_CIWDOFST_CLROVRLB (1 << 29)
423 #define EXYNOS_CIGCTRL_SELCAM_ITU_B (0 << 29)
424 #define EXYNOS_CIGCTRL_SELCAM_ITU_A (1 << 29)
425 #define EXYNOS_CIGCTRL_SELCAM_ITU_MASK (1 << 29)
470 #define EXYNOS_CITRGFMT_OUTFORMAT_YCBCR420 (0 << 29)
471 #define EXYNOS_CITRGFMT_OUTFORMAT_YCBCR422 (1 << 29)
472 #define EXYNOS_CITRGFMT_OUTFORMAT_YCBCR422_1PLANE (2 << 29)
473 #define EXYNOS_CITRGFMT_OUTFORMAT_RGB (3 << 29)
474 #define EXYNOS_CITRGFMT_OUTFORMAT_MASK (3 << 29)
509 #define EXYNOS_CISCCTRL_SCALEUP_V (1 << 29)
536 #define EXYNOS_CISTATUS_OVFICR (1 << 29)
560 #define EXYNOS_CIIMGEFF_IE_SC_BEFORE (0 << 29)
561 #define EXYNOS_CIIMGEFF_IE_SC_AFTER (1 << 29)
611 #define EXYNOS_CIDMAPARAM_R_MODE_LINEAR (0 << 29)
612 #define EXYNOS_CIDMAPARAM_R_MODE_CONFTILE (1 << 29)
613 #define EXYNOS_CIDMAPARAM_R_MODE_16X16 (2 << 29)
614 #define EXYNOS_CIDMAPARAM_R_MODE_64X32 (3 << 29)
615 #define EXYNOS_CIDMAPARAM_R_MODE_MASK (3 << 29)