Lines Matching +full:vdd +full:- +full:rgb +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Seung-Woo Kim <sw0312.kim@samsung.com>
9 * Based on drivers/media/video/s5p-tv/hdmi_drv.c
33 #include <sound/hdmi-codec.h>
34 #include <media/cec-notifier.h>
44 #include "regs-hdmi.h"
74 static const char * const supply[] = {
75 "vdd",
105 * required parents of clock when HDMI-PHY is respectively off or on.
137 struct regulator_bulk_data regul_bulk[ARRAY_SIZE(supply)];
680 return hdmi_reg_map[reg_id & 0xffff][hdata->drv_data->type];
686 return readl(hdata->regs + hdmi_map_reg(hdata, reg_id));
692 writel(value, hdata->regs + hdmi_map_reg(hdata, reg_id));
700 while (--bytes >= 0) {
701 writel(val & 0xff, hdata->regs + reg_id);
710 for (reg_id = hdmi_map_reg(hdata, reg_id); size; --size, reg_id += 4)
711 writel(*buf++, hdata->regs + reg_id);
720 old = readl(hdata->regs + reg_id);
722 writel(value, hdata->regs + reg_id);
729 return -EINVAL;
731 if (hdata->hdmiphy_port) {
734 ret = i2c_master_send(hdata->hdmiphy_port, buf, len);
741 writel(buf[i], hdata->regs_hdmiphy +
751 for (i = 0; i < hdata->drv_data->clk_gates.count; ++i) {
752 ret = clk_prepare_enable(hdata->clk_gates[i]);
756 dev_err(hdata->dev, "Cannot enable clock '%s', %d\n",
757 hdata->drv_data->clk_gates.data[i], ret);
758 while (i--)
759 clk_disable_unprepare(hdata->clk_gates[i]);
768 int i = hdata->drv_data->clk_gates.count;
770 while (i--)
771 clk_disable_unprepare(hdata->clk_gates[i]);
776 struct device *dev = hdata->dev;
780 for (i = 0; i < hdata->drv_data->clk_muxes.count; i += 3) {
781 struct clk **c = &hdata->clk_muxes[i];
788 hdata->drv_data->clk_muxes.data[i + 2],
789 hdata->drv_data->clk_muxes.data[i + to_phy], ret);
797 struct hdmi_audio_infoframe *infoframe = &hdata->audio.infoframe;
813 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
818 if (hdata->dvi_mode) {
828 &hdata->connector, m);
839 &hdata->connector, m);
846 hdmi_reg_write_buf(hdata, HDMI_VSI_DATA(0), buf + 3, ret - 3);
857 if (gpiod_get_value(hdata->hpd_gpio))
860 cec_notifier_set_phys_addr(hdata->notifier, CEC_PHYS_ADDR_INVALID);
868 cec_notifier_conn_unregister(hdata->notifier);
886 const struct drm_display_info *info = &connector->display_info;
890 if (!hdata->ddc_adpt)
893 drm_edid = drm_edid_read_ddc(connector, hdata->ddc_adpt);
899 cec_notifier_set_phys_addr(hdata->notifier, info->source_physical_address);
904 hdata->dvi_mode = !info->is_hdmi;
905 DRM_DEV_DEBUG_KMS(hdata->dev, "%s : width[%d] x height[%d]\n",
906 (hdata->dvi_mode ? "dvi monitor" : "hdmi monitor"),
907 info->width_mm / 10, info->height_mm / 10);
921 const struct hdmiphy_configs *confs = &hdata->drv_data->phy_confs;
924 for (i = 0; i < confs->count; i++)
925 if (confs->data[i].pixel_clock == pixel_clock)
928 DRM_DEV_DEBUG_KMS(hdata->dev, "Could not find phy config for %d\n",
930 return -EINVAL;
939 DRM_DEV_DEBUG_KMS(hdata->dev,
941 mode->hdisplay, mode->vdisplay,
943 (mode->flags & DRM_MODE_FLAG_INTERLACE) ? true :
944 false, mode->clock * 1000);
946 ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);
961 struct drm_connector *connector = &hdata->connector;
965 connector->interlace_allowed = true;
966 connector->polled = DRM_CONNECTOR_POLL_HPD;
968 ret = drm_connector_init_with_ddc(hdata->drm_dev, connector,
971 hdata->ddc_adpt);
973 DRM_DEV_ERROR(hdata->dev,
981 if (hdata->bridge)
982 ret = drm_bridge_attach(encoder, hdata->bridge, NULL, 0);
986 hdata->notifier = cec_notifier_conn_register(hdata->dev, NULL,
988 if (!hdata->notifier) {
989 ret = -ENOMEM;
990 DRM_DEV_ERROR(hdata->dev, "Failed to allocate CEC notifier\n");
1000 struct drm_device *dev = encoder->dev;
1010 if (connector->encoder == encoder)
1028 list_for_each_entry(m, &connector->modes, head) {
1035 DRM_DEV_DEBUG_KMS(dev->dev,
1037 m->hdisplay, m->vdisplay,
1070 switch (hdata->audio.params.sample_width) {
1083 hdmi_reg_acr(hdata, hdata->audio.params.sample_rate);
1122 hdata->audio.params.iec.status[i]);
1129 bool enable = !hdata->audio.mute;
1131 if (hdata->dvi_mode)
1142 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1145 if (m->flags & DRM_MODE_FLAG_INTERLACE)
1161 /* apply video pre-amble and guard band in HDMI mode only */
1166 if (hdata->dvi_mode) {
1173 if (hdata->drv_data->type == HDMI_TYPE13) {
1181 /* force RGB, look to CEA-861-D, table 7 for more detail */
1204 DRM_DEV_DEBUG_KMS(hdata->dev,
1212 DRM_DEV_ERROR(hdata->dev, "PLL could not reach steady state\n");
1217 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1220 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
1222 (m->htotal << 12) | m->vtotal);
1224 val = (m->flags & DRM_MODE_FLAG_NVSYNC) ? 1 : 0;
1227 val = (m->flags & DRM_MODE_FLAG_INTERLACE) ? 1 : 0;
1230 val = (m->hsync_start - m->hdisplay - 2);
1231 val |= ((m->hsync_end - m->hdisplay - 2) << 10);
1232 val |= ((m->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0)<<20;
1242 if (m->flags & DRM_MODE_FLAG_INTERLACE) {
1243 val = ((m->vsync_end - m->vdisplay) / 2);
1244 val |= ((m->vsync_start - m->vdisplay) / 2) << 12;
1247 val = m->vtotal / 2;
1248 val |= ((m->vtotal - m->vdisplay) / 2) << 11;
1251 val = (m->vtotal +
1252 ((m->vsync_end - m->vsync_start) * 4) + 5) / 2;
1253 val |= m->vtotal << 11;
1256 val = ((m->vtotal / 2) + 7);
1257 val |= ((m->vtotal / 2) + 2) << 12;
1260 val = ((m->htotal / 2) + (m->hsync_start - m->hdisplay));
1261 val |= ((m->htotal / 2) +
1262 (m->hsync_start - m->hdisplay)) << 12;
1266 (m->vtotal - m->vdisplay) / 2);
1267 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay / 2);
1271 val = m->vtotal;
1272 val |= (m->vtotal - m->vdisplay) << 11;
1277 val = (m->vsync_end - m->vdisplay);
1278 val |= ((m->vsync_start - m->vdisplay) << 12);
1284 m->vtotal - m->vdisplay);
1285 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
1288 hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
1289 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay);
1290 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay);
1291 hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
1296 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1298 &hdata->encoder.crtc->state->adjusted_mode;
1303 * sometimes is able to almost properly perform conversion - only
1306 if ((m->vdisplay != am->vdisplay) &&
1307 (m->hdisplay == 1280 || m->hdisplay == 1024 || m->hdisplay == 1366))
1310 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay);
1311 hdmi_reg_writev(hdata, HDMI_V_LINE_0, 2, m->vtotal);
1312 hdmi_reg_writev(hdata, HDMI_H_LINE_0, 2, m->htotal);
1314 (m->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0);
1316 (m->flags & DRM_MODE_FLAG_NVSYNC) ? 1 : 0);
1318 (m->flags & DRM_MODE_FLAG_INTERLACE) ? 1 : 0);
1327 if (m->flags & DRM_MODE_FLAG_INTERLACE) {
1329 (m->vsync_end - m->vdisplay) / 2);
1331 (m->vsync_start - m->vdisplay) / 2);
1332 hdmi_reg_writev(hdata, HDMI_V2_BLANK_0, 2, m->vtotal / 2);
1334 (m->vtotal - m->vdisplay) / 2);
1336 m->vtotal - m->vdisplay / 2);
1337 hdmi_reg_writev(hdata, HDMI_V_BLANK_F1_0, 2, m->vtotal);
1339 (m->vtotal / 2) + 7);
1341 (m->vtotal / 2) + 2);
1343 (m->htotal / 2) + (m->hsync_start - m->hdisplay));
1345 (m->htotal / 2) + (m->hsync_start - m->hdisplay));
1347 (m->vtotal - m->vdisplay) / 2);
1348 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay / 2);
1350 m->vtotal - m->vdisplay / 2);
1352 (m->vtotal / 2) + 1);
1354 (m->vtotal / 2) + 1);
1356 (m->vtotal / 2) + 1);
1361 m->vsync_end - m->vdisplay);
1363 m->vsync_start - m->vdisplay);
1364 hdmi_reg_writev(hdata, HDMI_V2_BLANK_0, 2, m->vtotal);
1366 m->vtotal - m->vdisplay);
1374 m->vtotal - m->vdisplay);
1375 hdmi_reg_writev(hdata, HDMI_TG_VACT_SZ_L, 2, m->vdisplay);
1379 m->hsync_start - m->hdisplay - 2);
1381 m->hsync_end - m->hdisplay - 2);
1401 hdmi_reg_writev(hdata, HDMI_TG_H_FSZ_L, 2, m->htotal);
1403 m->htotal - m->hdisplay - hquirk);
1404 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay + hquirk);
1405 hdmi_reg_writev(hdata, HDMI_TG_V_FSZ_L, 2, m->vtotal);
1406 if (hdata->drv_data == &exynos5433_hdmi_driver_data)
1412 if (hdata->drv_data->type == HDMI_TYPE13)
1436 if (hdata->drv_data == &exynos5433_hdmi_driver_data)
1437 writel(v, hdata->regs_hdmiphy + HDMIPHY5433_MODE_SET_DONE);
1442 struct drm_display_mode *m = &hdata->encoder.crtc->state->mode;
1446 ret = hdmi_find_phy_conf(hdata, m->clock * 1000);
1448 DRM_DEV_ERROR(hdata->dev, "failed to find hdmiphy conf\n");
1451 phy_conf = hdata->drv_data->phy_confs.data[ret].conf;
1460 DRM_DEV_ERROR(hdata->dev, "failed to configure hdmiphy\n");
1469 /* Should be called with hdata->mutex mutex held */
1481 if (!hdata->sysreg)
1484 regmap_update_bits(hdata->sysreg, EXYNOS5433_SYSREG_DISP_HDMI_PHY,
1488 /* Should be called with hdata->mutex mutex held. */
1493 if (hdata->powered)
1496 ret = pm_runtime_resume_and_get(hdata->dev);
1498 dev_err(hdata->dev, "failed to enable HDMIPHY device.\n");
1502 if (regulator_bulk_enable(ARRAY_SIZE(supply), hdata->regul_bulk))
1503 DRM_DEV_DEBUG_KMS(hdata->dev,
1506 regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
1515 hdata->powered = true;
1518 /* Should be called with hdata->mutex mutex held. */
1521 if (!hdata->powered)
1530 regmap_update_bits(hdata->pmureg, PMU_HDMI_PHY_CONTROL,
1533 regulator_bulk_disable(ARRAY_SIZE(supply), hdata->regul_bulk);
1535 pm_runtime_put_sync(hdata->dev);
1537 hdata->powered = false;
1544 mutex_lock(&hdata->mutex);
1549 mutex_unlock(&hdata->mutex);
1556 mutex_lock(&hdata->mutex);
1558 if (hdata->powered) {
1563 * VP -> Mixer -> HDMI
1568 mutex_unlock(&hdata->mutex);
1569 cancel_delayed_work(&hdata->hotplug_work);
1570 if (hdata->notifier)
1571 cec_notifier_phys_addr_invalidate(hdata->notifier);
1575 mutex_unlock(&hdata->mutex);
1588 mutex_lock(&hdata->mutex);
1590 hdata->audio.mute = true;
1592 if (hdata->powered)
1595 mutex_unlock(&hdata->mutex);
1604 if (daifmt->fmt != HDMI_I2S || daifmt->bit_clk_inv ||
1605 daifmt->frame_clk_inv || daifmt->bit_clk_provider ||
1606 daifmt->frame_clk_provider) {
1608 daifmt->bit_clk_inv, daifmt->frame_clk_inv,
1609 daifmt->bit_clk_provider,
1610 daifmt->frame_clk_provider);
1611 return -EINVAL;
1614 mutex_lock(&hdata->mutex);
1616 hdata->audio.params = *params;
1618 if (hdata->powered) {
1623 mutex_unlock(&hdata->mutex);
1633 mutex_lock(&hdata->mutex);
1635 hdata->audio.mute = mute;
1637 if (hdata->powered)
1640 mutex_unlock(&hdata->mutex);
1649 struct drm_connector *connector = &hdata->connector;
1651 mutex_lock(&connector->eld_mutex);
1652 memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
1653 mutex_unlock(&connector->eld_mutex);
1674 hdata->audio.pdev = platform_device_register_data(
1675 hdata->dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
1678 return PTR_ERR_OR_ZERO(hdata->audio.pdev);
1687 if (hdata->drm_dev)
1688 drm_helper_hpd_irq_event(hdata->drm_dev);
1695 mod_delayed_work(system_wq, &hdata->hotplug_work,
1705 struct device *dev = hdata->dev;
1708 for (i = 0; i < names->count; ++i) {
1709 struct clk *clk = devm_clk_get(dev, names->data[i]);
1715 names->data[i], ret);
1728 const struct hdmi_driver_data *drv_data = hdata->drv_data;
1729 int count = drv_data->clk_gates.count + drv_data->clk_muxes.count;
1730 struct device *dev = hdata->dev;
1739 return -ENOMEM;
1741 hdata->clk_gates = clks;
1742 hdata->clk_muxes = clks + drv_data->clk_gates.count;
1744 ret = hdmi_clks_get(hdata, &drv_data->clk_gates, hdata->clk_gates);
1748 return hdmi_clks_get(hdata, &drv_data->clk_muxes, hdata->clk_muxes);
1756 mutex_lock(&hdata->mutex);
1763 mutex_unlock(&hdata->mutex);
1768 struct device *dev = hdata->dev;
1771 ep = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);
1779 return -EINVAL;
1782 hdata->bridge = of_drm_find_bridge(np);
1785 if (!hdata->bridge)
1786 return -EPROBE_DEFER;
1793 struct device *dev = hdata->dev;
1798 hdata->hpd_gpio = devm_gpiod_get(dev, "hpd", GPIOD_IN);
1799 if (IS_ERR(hdata->hpd_gpio)) {
1801 return PTR_ERR(hdata->hpd_gpio);
1804 hdata->irq = gpiod_to_irq(hdata->hpd_gpio);
1805 if (hdata->irq < 0) {
1807 return hdata->irq;
1818 for (i = 0; i < ARRAY_SIZE(supply); ++i)
1819 hdata->regul_bulk[i].supply = supply[i];
1821 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(supply), hdata->regul_bulk);
1825 hdata->reg_hdmi_en = devm_regulator_get_optional(dev, "hdmi-en");
1827 if (PTR_ERR(hdata->reg_hdmi_en) != -ENODEV)
1828 if (IS_ERR(hdata->reg_hdmi_en))
1829 return PTR_ERR(hdata->reg_hdmi_en);
1836 .compatible = "samsung,exynos4210-hdmi",
1839 .compatible = "samsung,exynos4212-hdmi",
1842 .compatible = "samsung,exynos5420-hdmi",
1845 .compatible = "samsung,exynos5433-hdmi",
1857 struct drm_encoder *encoder = &hdata->encoder;
1861 hdata->drm_dev = drm_dev;
1863 hdata->phy_clk.enable = hdmiphy_clk_enable;
1876 crtc->pipe_clk = &hdata->phy_clk;
1900 const char *compatible_str = "samsung,exynos4210-hdmiddc";
1908 np = of_parse_phandle(hdata->dev->of_node, "ddc", 0);
1911 DRM_DEV_ERROR(hdata->dev,
1913 return -ENODEV;
1921 return -EPROBE_DEFER;
1924 hdata->ddc_adpt = adpt;
1931 const char *compatible_str = "samsung,exynos4212-hdmiphy";
1936 np = of_parse_phandle(hdata->dev->of_node, "phy", 0);
1938 DRM_DEV_ERROR(hdata->dev,
1940 return -ENODEV;
1944 if (hdata->drv_data->is_apb_phy) {
1945 hdata->regs_hdmiphy = of_iomap(np, 0);
1946 if (!hdata->regs_hdmiphy) {
1947 DRM_DEV_ERROR(hdata->dev,
1949 return -ENOMEM;
1952 hdata->hdmiphy_port = of_find_i2c_device_by_node(np);
1953 if (!hdata->hdmiphy_port) {
1955 return -EPROBE_DEFER;
1965 struct device *dev = &pdev->dev;
1971 return -ENOMEM;
1973 hdata->drv_data = of_device_get_match_data(dev);
1977 hdata->dev = dev;
1979 mutex_init(&hdata->mutex);
1983 if (ret != -EPROBE_DEFER)
1988 hdata->regs = devm_platform_ioremap_resource(pdev, 0);
1989 if (IS_ERR(hdata->regs)) {
1990 ret = PTR_ERR(hdata->regs);
2002 INIT_DELAYED_WORK(&hdata->hotplug_work, hdmi_hotplug_work_func);
2004 ret = devm_request_threaded_irq(dev, hdata->irq, NULL,
2013 hdata->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node,
2014 "samsung,syscon-phandle");
2015 if (IS_ERR(hdata->pmureg)) {
2017 ret = -EPROBE_DEFER;
2021 if (hdata->drv_data->has_sysreg) {
2022 hdata->sysreg = syscon_regmap_lookup_by_phandle(dev->of_node,
2023 "samsung,sysreg-phandle");
2024 if (IS_ERR(hdata->sysreg)) {
2026 ret = -EPROBE_DEFER;
2031 if (!IS_ERR(hdata->reg_hdmi_en)) {
2032 ret = regulator_enable(hdata->reg_hdmi_en);
2035 "failed to enable hdmi-en regulator\n");
2042 audio_infoframe = &hdata->audio.infoframe;
2044 audio_infoframe->coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
2045 audio_infoframe->sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
2046 audio_infoframe->sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
2047 audio_infoframe->channels = 2;
2053 ret = component_add(&pdev->dev, &hdmi_component_ops);
2060 platform_device_unregister(hdata->audio.pdev);
2064 if (!IS_ERR(hdata->reg_hdmi_en))
2065 regulator_disable(hdata->reg_hdmi_en);
2067 if (hdata->hdmiphy_port)
2068 put_device(&hdata->hdmiphy_port->dev);
2069 if (hdata->regs_hdmiphy)
2070 iounmap(hdata->regs_hdmiphy);
2072 put_device(&hdata->ddc_adpt->dev);
2081 cancel_delayed_work_sync(&hdata->hotplug_work);
2083 component_del(&pdev->dev, &hdmi_component_ops);
2084 platform_device_unregister(hdata->audio.pdev);
2086 pm_runtime_disable(&pdev->dev);
2088 if (!IS_ERR(hdata->reg_hdmi_en))
2089 regulator_disable(hdata->reg_hdmi_en);
2091 if (hdata->hdmiphy_port)
2092 put_device(&hdata->hdmiphy_port->dev);
2094 if (hdata->regs_hdmiphy)
2095 iounmap(hdata->regs_hdmiphy);
2097 put_device(&hdata->ddc_adpt->dev);
2099 mutex_destroy(&hdata->mutex);
2133 .name = "exynos-hdmi",