Lines Matching +full:0 +full:x00800000
7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
51 #define ENDIAN_MODE_SWAP_16 0x00000001
52 #define ENDIAN_MODE_SWAP_32 0x00000002
53 #define chipModel_GC200 0x00000200
54 #define chipModel_GC300 0x00000300
55 #define chipModel_GC320 0x00000320
56 #define chipModel_GC328 0x00000328
57 #define chipModel_GC350 0x00000350
58 #define chipModel_GC355 0x00000355
59 #define chipModel_GC400 0x00000400
60 #define chipModel_GC410 0x00000410
61 #define chipModel_GC420 0x00000420
62 #define chipModel_GC428 0x00000428
63 #define chipModel_GC450 0x00000450
64 #define chipModel_GC500 0x00000500
65 #define chipModel_GC520 0x00000520
66 #define chipModel_GC530 0x00000530
67 #define chipModel_GC600 0x00000600
68 #define chipModel_GC620 0x00000620
69 #define chipModel_GC700 0x00000700
70 #define chipModel_GC800 0x00000800
71 #define chipModel_GC860 0x00000860
72 #define chipModel_GC880 0x00000880
73 #define chipModel_GC900 0x00000900
74 #define chipModel_GC1000 0x00001000
75 #define chipModel_GC1500 0x00001500
76 #define chipModel_GC2000 0x00002000
77 #define chipModel_GC2100 0x00002100
78 #define chipModel_GC2200 0x00002200
79 #define chipModel_GC2500 0x00002500
80 #define chipModel_GC3000 0x00003000
81 #define chipModel_GC4000 0x00004000
82 #define chipModel_GC5000 0x00005000
83 #define chipModel_GC5200 0x00005200
84 #define chipModel_GC6400 0x00006400
85 #define chipModel_GC7000 0x00007000
86 #define chipModel_GC7400 0x00007400
87 #define chipModel_GC8000 0x00008000
88 #define chipModel_GC8100 0x00008100
89 #define chipModel_GC8200 0x00008200
90 #define chipModel_GC8400 0x00008400
91 #define RGBA_BITS_R 0x00000001
92 #define RGBA_BITS_G 0x00000002
93 #define RGBA_BITS_B 0x00000004
94 #define RGBA_BITS_A 0x00000008
95 #define chipFeatures_FAST_CLEAR 0x00000001
96 #define chipFeatures_SPECIAL_ANTI_ALIASING 0x00000002
97 #define chipFeatures_PIPE_3D 0x00000004
98 #define chipFeatures_DXT_TEXTURE_COMPRESSION 0x00000008
99 #define chipFeatures_DEBUG_MODE 0x00000010
100 #define chipFeatures_Z_COMPRESSION 0x00000020
101 #define chipFeatures_YUV420_SCALER 0x00000040
102 #define chipFeatures_MSAA 0x00000080
103 #define chipFeatures_DC 0x00000100
104 #define chipFeatures_PIPE_2D 0x00000200
105 #define chipFeatures_ETC1_TEXTURE_COMPRESSION 0x00000400
106 #define chipFeatures_FAST_SCALER 0x00000800
107 #define chipFeatures_HIGH_DYNAMIC_RANGE 0x00001000
108 #define chipFeatures_YUV420_TILER 0x00002000
109 #define chipFeatures_MODULE_CG 0x00004000
110 #define chipFeatures_MIN_AREA 0x00008000
111 #define chipFeatures_NO_EARLY_Z 0x00010000
112 #define chipFeatures_NO_422_TEXTURE 0x00020000
113 #define chipFeatures_BUFFER_INTERLEAVING 0x00040000
114 #define chipFeatures_BYTE_WRITE_2D 0x00080000
115 #define chipFeatures_NO_SCALER 0x00100000
116 #define chipFeatures_YUY2_AVERAGING 0x00200000
117 #define chipFeatures_HALF_PE_CACHE 0x00400000
118 #define chipFeatures_HALF_TX_CACHE 0x00800000
119 #define chipFeatures_YUY2_RENDER_TARGET 0x01000000
120 #define chipFeatures_MEM32 0x02000000
121 #define chipFeatures_PIPE_VG 0x04000000
122 #define chipFeatures_VGTS 0x08000000
123 #define chipFeatures_FE20 0x10000000
124 #define chipFeatures_BYTE_WRITE_3D 0x20000000
125 #define chipFeatures_RS_YUV_TARGET 0x40000000
126 #define chipFeatures_32_BIT_INDICES 0x80000000
127 #define chipMinorFeatures0_FLIP_Y 0x00000001
128 #define chipMinorFeatures0_DUAL_RETURN_BUS 0x00000002
129 #define chipMinorFeatures0_ENDIANNESS_CONFIG 0x00000004
130 #define chipMinorFeatures0_TEXTURE_8K 0x00000008
131 #define chipMinorFeatures0_CORRECT_TEXTURE_CONVERTER 0x00000010
132 #define chipMinorFeatures0_SPECIAL_MSAA_LOD 0x00000020
133 #define chipMinorFeatures0_FAST_CLEAR_FLUSH 0x00000040
134 #define chipMinorFeatures0_2DPE20 0x00000080
135 #define chipMinorFeatures0_CORRECT_AUTO_DISABLE 0x00000100
136 #define chipMinorFeatures0_RENDERTARGET_8K 0x00000200
137 #define chipMinorFeatures0_2BITPERTILE 0x00000400
138 #define chipMinorFeatures0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED 0x00000800
139 #define chipMinorFeatures0_SUPER_TILED 0x00001000
140 #define chipMinorFeatures0_VG_20 0x00002000
141 #define chipMinorFeatures0_TS_EXTENDED_COMMANDS 0x00004000
142 #define chipMinorFeatures0_COMPRESSION_FIFO_FIXED 0x00008000
143 #define chipMinorFeatures0_HAS_SIGN_FLOOR_CEIL 0x00010000
144 #define chipMinorFeatures0_VG_FILTER 0x00020000
145 #define chipMinorFeatures0_VG_21 0x00040000
146 #define chipMinorFeatures0_SHADER_HAS_W 0x00080000
147 #define chipMinorFeatures0_HAS_SQRT_TRIG 0x00100000
148 #define chipMinorFeatures0_MORE_MINOR_FEATURES 0x00200000
149 #define chipMinorFeatures0_MC20 0x00400000
150 #define chipMinorFeatures0_MSAA_SIDEBAND 0x00800000
151 #define chipMinorFeatures0_BUG_FIXES0 0x01000000
152 #define chipMinorFeatures0_VAA 0x02000000
153 #define chipMinorFeatures0_BYPASS_IN_MSAA 0x04000000
154 #define chipMinorFeatures0_HZ 0x08000000
155 #define chipMinorFeatures0_NEW_TEXTURE 0x10000000
156 #define chipMinorFeatures0_2D_A8_TARGET 0x20000000
157 #define chipMinorFeatures0_CORRECT_STENCIL 0x40000000
158 #define chipMinorFeatures0_ENHANCE_VR 0x80000000
159 #define chipMinorFeatures1_RSUV_SWIZZLE 0x00000001
160 #define chipMinorFeatures1_V2_COMPRESSION 0x00000002
161 #define chipMinorFeatures1_VG_DOUBLE_BUFFER 0x00000004
162 #define chipMinorFeatures1_EXTRA_EVENT_STATES 0x00000008
163 #define chipMinorFeatures1_NO_STRIPING_NEEDED 0x00000010
164 #define chipMinorFeatures1_TEXTURE_STRIDE 0x00000020
165 #define chipMinorFeatures1_BUG_FIXES3 0x00000040
166 #define chipMinorFeatures1_AUTO_DISABLE 0x00000080
167 #define chipMinorFeatures1_AUTO_RESTART_TS 0x00000100
168 #define chipMinorFeatures1_DISABLE_PE_GATING 0x00000200
169 #define chipMinorFeatures1_L2_WINDOWING 0x00000400
170 #define chipMinorFeatures1_HALF_FLOAT 0x00000800
171 #define chipMinorFeatures1_PIXEL_DITHER 0x00001000
172 #define chipMinorFeatures1_TWO_STENCIL_REFERENCE 0x00002000
173 #define chipMinorFeatures1_EXTENDED_PIXEL_FORMAT 0x00004000
174 #define chipMinorFeatures1_CORRECT_MIN_MAX_DEPTH 0x00008000
175 #define chipMinorFeatures1_2D_DITHER 0x00010000
176 #define chipMinorFeatures1_BUG_FIXES5 0x00020000
177 #define chipMinorFeatures1_NEW_2D 0x00040000
178 #define chipMinorFeatures1_NEW_FP 0x00080000
179 #define chipMinorFeatures1_TEXTURE_HALIGN 0x00100000
180 #define chipMinorFeatures1_NON_POWER_OF_TWO 0x00200000
181 #define chipMinorFeatures1_LINEAR_TEXTURE_SUPPORT 0x00400000
182 #define chipMinorFeatures1_HALTI0 0x00800000
183 #define chipMinorFeatures1_CORRECT_OVERFLOW_VG 0x01000000
184 #define chipMinorFeatures1_NEGATIVE_LOG_FIX 0x02000000
185 #define chipMinorFeatures1_RESOLVE_OFFSET 0x04000000
186 #define chipMinorFeatures1_OK_TO_GATE_AXI_CLOCK 0x08000000
187 #define chipMinorFeatures1_MMU_VERSION 0x10000000
188 #define chipMinorFeatures1_WIDE_LINE 0x20000000
189 #define chipMinorFeatures1_BUG_FIXES6 0x40000000
190 #define chipMinorFeatures1_FC_FLUSH_STALL 0x80000000
191 #define chipMinorFeatures2_LINE_LOOP 0x00000001
192 #define chipMinorFeatures2_LOGIC_OP 0x00000002
193 #define chipMinorFeatures2_SEAMLESS_CUBE_MAP 0x00000004
194 #define chipMinorFeatures2_SUPERTILED_TEXTURE 0x00000008
195 #define chipMinorFeatures2_LINEAR_PE 0x00000010
196 #define chipMinorFeatures2_RECT_PRIMITIVE 0x00000020
197 #define chipMinorFeatures2_COMPOSITION 0x00000040
198 #define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT 0x00000080
199 #define chipMinorFeatures2_PE_SWIZZLE 0x00000100
200 #define chipMinorFeatures2_END_EVENT 0x00000200
201 #define chipMinorFeatures2_S1S8 0x00000400
202 #define chipMinorFeatures2_HALTI1 0x00000800
203 #define chipMinorFeatures2_RGB888 0x00001000
204 #define chipMinorFeatures2_TX__YUV_ASSEMBLER 0x00002000
205 #define chipMinorFeatures2_DYNAMIC_FREQUENCY_SCALING 0x00004000
206 #define chipMinorFeatures2_TX_FILTER 0x00008000
207 #define chipMinorFeatures2_FULL_DIRECTFB 0x00010000
208 #define chipMinorFeatures2_2D_TILING 0x00020000
209 #define chipMinorFeatures2_THREAD_WALKER_IN_PS 0x00040000
210 #define chipMinorFeatures2_TILE_FILLER 0x00080000
211 #define chipMinorFeatures2_YUV_STANDARD 0x00100000
212 #define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT 0x00200000
213 #define chipMinorFeatures2_YUV_CONVERSION 0x00400000
214 #define chipMinorFeatures2_FLUSH_FIXED_2D 0x00800000
215 #define chipMinorFeatures2_INTERLEAVER 0x01000000
216 #define chipMinorFeatures2_MIXED_STREAMS 0x02000000
217 #define chipMinorFeatures2_2D_420_L2CACHE 0x04000000
218 #define chipMinorFeatures2_BUG_FIXES7 0x08000000
219 #define chipMinorFeatures2_2D_NO_INDEX8_BRUSH 0x10000000
220 #define chipMinorFeatures2_TEXTURE_TILED_READ 0x20000000
221 #define chipMinorFeatures2_DECOMPRESS_Z16 0x40000000
222 #define chipMinorFeatures2_BUG_FIXES8 0x80000000
223 #define chipMinorFeatures3_ROTATION_STALL_FIX 0x00000001
224 #define chipMinorFeatures3_OCL_ONLY 0x00000002
225 #define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX 0x00000004
226 #define chipMinorFeatures3_INSTRUCTION_CACHE 0x00000008
227 #define chipMinorFeatures3_GEOMETRY_SHADER 0x00000010
228 #define chipMinorFeatures3_TEX_COMPRESSION_SUPERTILED 0x00000020
229 #define chipMinorFeatures3_GENERICS 0x00000040
230 #define chipMinorFeatures3_BUG_FIXES9 0x00000080
231 #define chipMinorFeatures3_FAST_MSAA 0x00000100
232 #define chipMinorFeatures3_WCLIP 0x00000200
233 #define chipMinorFeatures3_BUG_FIXES10 0x00000400
234 #define chipMinorFeatures3_UNIFIED_SAMPLERS 0x00000800
235 #define chipMinorFeatures3_BUG_FIXES11 0x00001000
236 #define chipMinorFeatures3_PERFORMANCE_COUNTERS 0x00002000
237 #define chipMinorFeatures3_HAS_FAST_TRANSCENDENTALS 0x00004000
238 #define chipMinorFeatures3_BUG_FIXES12 0x00008000
239 #define chipMinorFeatures3_BUG_FIXES13 0x00010000
240 #define chipMinorFeatures3_DE_ENHANCEMENTS1 0x00020000
241 #define chipMinorFeatures3_ACE 0x00040000
242 #define chipMinorFeatures3_TX_ENHANCEMENTS1 0x00080000
243 #define chipMinorFeatures3_SH_ENHANCEMENTS1 0x00100000
244 #define chipMinorFeatures3_SH_ENHANCEMENTS2 0x00200000
245 #define chipMinorFeatures3_PE_ENHANCEMENTS1 0x00400000
246 #define chipMinorFeatures3_2D_FC_SOURCE 0x00800000
247 #define chipMinorFeatures3_BUG_FIXES_14 0x01000000
248 #define chipMinorFeatures3_POWER_OPTIMIZATIONS_0 0x02000000
249 #define chipMinorFeatures3_NEW_HZ 0x04000000
250 #define chipMinorFeatures3_PE_DITHER_FIX 0x08000000
251 #define chipMinorFeatures3_DE_ENHANCEMENTS3 0x10000000
252 #define chipMinorFeatures3_SH_ENHANCEMENTS3 0x20000000
253 #define chipMinorFeatures3_SH_ENHANCEMENTS4 0x40000000
254 #define chipMinorFeatures3_TX_ENHANCEMENTS2 0x80000000
255 #define chipMinorFeatures4_FE_ENHANCEMENTS1 0x00000001
256 #define chipMinorFeatures4_PE_ENHANCEMENTS2 0x00000002
257 #define chipMinorFeatures4_FRUSTUM_CLIP_FIX 0x00000004
258 #define chipMinorFeatures4_DE_NO_GAMMA 0x00000008
259 #define chipMinorFeatures4_PA_ENHANCEMENTS_2 0x00000010
260 #define chipMinorFeatures4_2D_GAMMA 0x00000020
261 #define chipMinorFeatures4_SINGLE_BUFFER 0x00000040
262 #define chipMinorFeatures4_HI_ENHANCEMENTS_1 0x00000080
263 #define chipMinorFeatures4_TX_ENHANCEMENTS_3 0x00000100
264 #define chipMinorFeatures4_SH_ENHANCEMENTS_5 0x00000200
265 #define chipMinorFeatures4_FE_ENHANCEMENTS_2 0x00000400
266 #define chipMinorFeatures4_TX_LERP_PRECISION_FIX 0x00000800
267 #define chipMinorFeatures4_2D_COLOR_SPACE_CONVERSION 0x00001000
268 #define chipMinorFeatures4_TEXTURE_ASTC 0x00002000
269 #define chipMinorFeatures4_PE_ENHANCEMENTS_4 0x00004000
270 #define chipMinorFeatures4_MC_ENHANCEMENTS_1 0x00008000
271 #define chipMinorFeatures4_HALTI2 0x00010000
272 #define chipMinorFeatures4_2D_MIRROR_EXTENSION 0x00020000
273 #define chipMinorFeatures4_SMALL_MSAA 0x00040000
274 #define chipMinorFeatures4_BUG_FIXES_17 0x00080000
275 #define chipMinorFeatures4_NEW_RA 0x00100000
276 #define chipMinorFeatures4_2D_OPF_YUV_OUTPUT 0x00200000
277 #define chipMinorFeatures4_2D_MULTI_SOURCE_BLT_EX2 0x00400000
278 #define chipMinorFeatures4_NO_USER_CSC 0x00800000
279 #define chipMinorFeatures4_ZFIXES 0x01000000
280 #define chipMinorFeatures4_BUG_FIXES18 0x02000000
281 #define chipMinorFeatures4_2D_COMPRESSION 0x04000000
282 #define chipMinorFeatures4_PROBE 0x08000000
283 #define chipMinorFeatures4_MEDIUM_PRECISION 0x10000000
284 #define chipMinorFeatures4_2D_SUPER_TILE_VERSION 0x20000000
285 #define chipMinorFeatures4_BUG_FIXES19 0x40000000
286 #define chipMinorFeatures4_SH_ENHANCEMENTS6 0x80000000
287 #define chipMinorFeatures5_SH_ENHANCEMENTS7 0x00000001
288 #define chipMinorFeatures5_BUG_FIXES20 0x00000002
289 #define chipMinorFeatures5_DE_ADDRESS_40 0x00000004
290 #define chipMinorFeatures5_MINI_MMU_FIX 0x00000008
291 #define chipMinorFeatures5_EEZ 0x00000010
292 #define chipMinorFeatures5_BUG_FIXES21 0x00000020
293 #define chipMinorFeatures5_EXTRA_VG_CAPS 0x00000040
294 #define chipMinorFeatures5_MULTI_SRC_V15 0x00000080
295 #define chipMinorFeatures5_BUG_FIXES22 0x00000100
296 #define chipMinorFeatures5_HALTI3 0x00000200
297 #define chipMinorFeatures5_TESSELATION_SHADERS 0x00000400
298 #define chipMinorFeatures5_2D_ONE_PASS_FILTER_TAP 0x00000800
299 #define chipMinorFeatures5_MULTI_SRC_V2_STR_QUAD 0x00001000
300 #define chipMinorFeatures5_SEPARATE_SRC_DST 0x00002000
301 #define chipMinorFeatures5_HALTI4 0x00004000
302 #define chipMinorFeatures5_RA_WRITE_DEPTH 0x00008000
303 #define chipMinorFeatures5_ANDROID_ONLY 0x00010000
304 #define chipMinorFeatures5_HAS_PRODUCTID 0x00020000
305 #define chipMinorFeatures5_TX_SUPPORT_DEC 0x00040000
306 #define chipMinorFeatures5_S8_MSAA_COMPRESSION 0x00080000
307 #define chipMinorFeatures5_PE_DITHER_FIX2 0x00100000
308 #define chipMinorFeatures5_L2_CACHE_REMOVE 0x00200000
309 #define chipMinorFeatures5_FE_ALLOW_RND_VTX_CNT 0x00400000
310 #define chipMinorFeatures5_CUBE_MAP_FL28 0x00800000
311 #define chipMinorFeatures5_TX_6BIT_FRAC 0x01000000
312 #define chipMinorFeatures5_FE_ALLOW_STALL_PREFETCH_ENG 0x02000000
313 #define chipMinorFeatures5_THIRD_PARTY_COMPRESSION 0x04000000
314 #define chipMinorFeatures5_RS_DEPTHSTENCIL_NATIVE_SUPPORT 0x08000000
315 #define chipMinorFeatures5_V2_MSAA_COMP_FIX 0x10000000
316 #define chipMinorFeatures5_HALTI5 0x20000000
317 #define chipMinorFeatures5_EVIS 0x40000000
318 #define chipMinorFeatures5_BLT_ENGINE 0x80000000
319 #define chipMinorFeatures6_BUG_FIXES_23 0x00000001
320 #define chipMinorFeatures6_BUG_FIXES_24 0x00000002
321 #define chipMinorFeatures6_DEC 0x00000004
322 #define chipMinorFeatures6_VS_TILE_NV12 0x00000008
323 #define chipMinorFeatures6_VS_TILE_NV12_10BIT 0x00000010
324 #define chipMinorFeatures6_RENDER_TARGET_8 0x00000020
325 #define chipMinorFeatures6_TEX_LOD_FLOW_CORR 0x00000040
326 #define chipMinorFeatures6_FACE_LOD 0x00000080
327 #define chipMinorFeatures6_MULTI_CORE_SEMAPHORE_STALL_V2 0x00000100
328 #define chipMinorFeatures6_VMSAA 0x00000200
329 #define chipMinorFeatures6_CHIP_ENABLE_LINK 0x00000400
330 #define chipMinorFeatures6_MULTI_SRC_BLT_1_5_ENHANCEMENT 0x00000800
331 #define chipMinorFeatures6_MULTI_SRC_BLT_BILINEAR_FILTER 0x00001000
332 #define chipMinorFeatures6_RA_HZEZ_CLOCK_CONTROL 0x00002000
333 #define chipMinorFeatures6_CACHE128B256BPERLINE 0x00004000
334 #define chipMinorFeatures6_V4_COMPRESSION 0x00008000
335 #define chipMinorFeatures6_PE2D_MAJOR_SUPER_TILE 0x00010000
336 #define chipMinorFeatures6_PE_32BPC_COLORMASK_FIX 0x00020000
337 #define chipMinorFeatures6_ALPHA_BLENDING_OPT 0x00040000
338 #define chipMinorFeatures6_NEW_GPIPE 0x00080000
339 #define chipMinorFeatures6_PIPELINE_32_ATTRIBUTES 0x00100000
340 #define chipMinorFeatures6_MSAA_SHADING 0x00200000
341 #define chipMinorFeatures6_NO_ANISTRO_FILTER 0x00400000
342 #define chipMinorFeatures6_NO_ASTC 0x00800000
343 #define chipMinorFeatures6_NO_DXT 0x01000000
344 #define chipMinorFeatures6_HWTFB 0x02000000
345 #define chipMinorFeatures6_RA_DEPTH_WRITE_MSAA1X_FIX 0x04000000
346 #define chipMinorFeatures6_EZHZ_CLOCKGATE_FIX 0x08000000
347 #define chipMinorFeatures6_SH_SNAP2PAGE_FIX 0x10000000
348 #define chipMinorFeatures6_SH_HALFDEPENDENCY_FIX 0x20000000
349 #define chipMinorFeatures6_USC_MCFILL_FIX 0x40000000
350 #define chipMinorFeatures6_TPG_TCPERF_FIX 0x80000000
351 #define chipMinorFeatures7_USC_MDFIFO_OVERFLOW_FIX 0x00000001
352 #define chipMinorFeatures7_SH_TEXLD_BARRIER_IN_CS_FIX 0x00000002
353 #define chipMinorFeatures7_RS_NEW_BASEADDR 0x00000004
354 #define chipMinorFeatures7_PE_8BPP_DUALPIPE_FIX 0x00000008
355 #define chipMinorFeatures7_SH_ADVANCED_INSTR 0x00000010
356 #define chipMinorFeatures7_SH_FLAT_INTERPOLATION_DUAL16_FIX 0x00000020
357 #define chipMinorFeatures7_USC_CONTINUOUS_FLUS_FIX 0x00000040
358 #define chipMinorFeatures7_SH_SUPPORT_V4 0x00000080
359 #define chipMinorFeatures7_SH_SUPPORT_ALPHA_KILL 0x00000100
360 #define chipMinorFeatures7_PE_NO_ALPHA_TEST 0x00000200
361 #define chipMinorFeatures7_TX_LOD_NEAREST_SELECT 0x00000400
362 #define chipMinorFeatures7_SH_FIX_LDEXP 0x00000800
363 #define chipMinorFeatures7_SUPPORT_MOVAI 0x00001000
364 #define chipMinorFeatures7_SH_SNAP2PAGE_MAXPAGES_FIX 0x00002000
365 #define chipMinorFeatures7_PE_RGBA16I_FIX 0x00004000
366 #define chipMinorFeatures7_BLT_8bpp_256TILE_FC_FIX 0x00008000
367 #define chipMinorFeatures7_PE_64BIT_FENCE_FIX 0x00010000
368 #define chipMinorFeatures7_USC_FULL_CACHE_FIX 0x00020000
369 #define chipMinorFeatures7_TX_YUV_ASSEMBLER_10BIT 0x00040000
370 #define chipMinorFeatures7_FE_32BIT_INDEX_FIX 0x00080000
371 #define chipMinorFeatures7_BLT_64BPP_MASKED_CLEAR_FIX 0x00100000
372 #define chipMinorFeatures7_BIT_SECURITY 0x00200000
373 #define chipMinorFeatures7_BIT_ROBUSTNESS 0x00400000
374 #define chipMinorFeatures7_USC_ATOMIC_FIX 0x00800000
375 #define chipMinorFeatures7_SH_PSO_MSAA1x_FIX 0x01000000
376 #define chipMinorFeatures7_BIT_USC_VX_PERF_FIX 0x02000000
377 #define chipMinorFeatures7_EVIS_NO_ABSDIFF 0x04000000
378 #define chipMinorFeatures7_EVIS_NO_BITREPLACE 0x08000000
379 #define chipMinorFeatures7_EVIS_NO_BOXFILTER 0x10000000
380 #define chipMinorFeatures7_EVIS_NO_CORDIAC 0x20000000
381 #define chipMinorFeatures7_EVIS_NO_DP32 0x40000000
382 #define chipMinorFeatures7_EVIS_NO_FILTER 0x80000000
383 #define chipMinorFeatures8_EVIS_NO_IADD 0x00000001
384 #define chipMinorFeatures8_EVIS_NO_SELECTADD 0x00000002
385 #define chipMinorFeatures8_EVIS_LERP_7OUTPUT 0x00000004
386 #define chipMinorFeatures8_EVIS_ACCSQ_8OUTPUT 0x00000008
387 #define chipMinorFeatures8_USC_GOS_ADDR_FIX 0x00000010
388 #define chipMinorFeatures8_TX_8BIT_UVFRAC 0x00000020
389 #define chipMinorFeatures8_TX_DESC_CACHE_CLOCKGATE_FIX 0x00000040
390 #define chipMinorFeatures8_RSBLT_MSAA_DECOMPRESSION 0x00000080
391 #define chipMinorFeatures8_TX_INTEGER_COORDINATE 0x00000100
392 #define chipMinorFeatures8_DRAWID 0x00000200
393 #define chipMinorFeatures8_PSIO_SAMPLEMASK_IN_R0ZW_FIX 0x00000400
394 #define chipMinorFeatures8_TX_INTEGER_COORDINATE_V2 0x00000800
395 #define chipMinorFeatures8_MULTI_CORE_BLOCK_SET_CONFIG 0x00001000
396 #define chipMinorFeatures8_VG_RESOLVE_ENGINE 0x00002000
397 #define chipMinorFeatures8_VG_PE_COLOR_KEY 0x00004000
398 #define chipMinorFeatures8_VG_IM_INDEX_FORMAT 0x00008000
399 #define chipMinorFeatures8_SNAPPAGE_CMD 0x00010000
400 #define chipMinorFeatures8_SH_NO_INDEX_CONST_ON_A0 0x00020000
401 #define chipMinorFeatures8_SH_NO_ONECONST_LIMIT 0x00040000
402 #define chipMinorFeatures8_SH_IMG_LDST_ON_TEMP 0x00080000
403 #define chipMinorFeatures8_COMPUTE_ONLY 0x00100000
404 #define chipMinorFeatures8_SH_IMG_LDST_CLAMP 0x00200000
405 #define chipMinorFeatures8_SH_ICACHE_ALLOC_COUNT_FIX 0x00400000
406 #define chipMinorFeatures8_SH_ICACHE_PREFETCH 0x00800000
407 #define chipMinorFeatures8_PE2D_SEPARATE_CACHE 0x01000000
408 #define chipMinorFeatures8_VG_AYUV_INPUT_OUTPUT 0x02000000
409 #define chipMinorFeatures8_VG_DOUBLE_IMAGE 0x04000000
410 #define chipMinorFeatures8_VG_RECTANGLE_STRIPE_MODE 0x08000000
411 #define chipMinorFeatures8_VG_MMU 0x10000000
412 #define chipMinorFeatures8_VG_IM_FILTER 0x20000000
413 #define chipMinorFeatures8_VG_IM_YUV_PACKET 0x40000000
414 #define chipMinorFeatures8_VG_IM_YUV_PLANAR 0x80000000
415 #define chipMinorFeatures9_VG_PE_YUV_PACKET 0x00000001
416 #define chipMinorFeatures9_VG_COLOR_PRECISION_8_BIT 0x00000002
417 #define chipMinorFeatures9_PE_MSAA_OQ_FIX 0x00000004
418 #define chipMinorFeatures9_PSIO_MSAA_CL_FIX 0x00000008
419 #define chipMinorFeatures9_USC_DEFER_FILL_FIX 0x00000010
420 #define chipMinorFeatures9_SH_CLOCK_GATE_FIX 0x00000020
421 #define chipMinorFeatures9_FE_NEED_DUMMYDRAW 0x00000040
422 #define chipMinorFeatures9_PE2D_LINEAR_YUV420_OUTPUT 0x00000080
423 #define chipMinorFeatures9_PE2D_LINEAR_YUV420_10BIT 0x00000100
424 #define chipMinorFeatures9_MULTI_CLUSTER 0x00000200
425 #define chipMinorFeatures9_VG_TS_CULLING 0x00000400
426 #define chipMinorFeatures9_VG_FP25 0x00000800
427 #define chipMinorFeatures9_SH_MULTI_WG_PACK 0x00001000
428 #define chipMinorFeatures9_SH_DUAL16_SAMPLEMASK_ZW 0x00002000
429 #define chipMinorFeatures9_TPG_TRIVIAL_MODE_FIX 0x00004000
430 #define chipMinorFeatures9_TX_ASTC_MULTISLICE_FIX 0x00008000
431 #define chipMinorFeatures9_FE_ROBUST_FIX 0x00010000
432 #define chipMinorFeatures9_SH_GPIPE_ACCESS_FULLTEMPS 0x00020000
433 #define chipMinorFeatures9_PSIO_INTERLOCK 0x00040000
434 #define chipMinorFeatures9_PA_WIDELINE_FIX 0x00080000
435 #define chipMinorFeatures9_WIDELINE_HELPER_FIX 0x00100000
436 #define chipMinorFeatures9_G2D_3RD_PARTY_COMPRESSION_1_1 0x00200000
437 #define chipMinorFeatures9_TX_FLUSH_L1CACHE 0x00400000
438 #define chipMinorFeatures9_PE_DITHER_FIX2 0x00800000
439 #define chipMinorFeatures9_G2D_DEC400 0x01000000
440 #define chipMinorFeatures9_SH_TEXLD_U_FIX 0x02000000
441 #define chipMinorFeatures9_MC_FCCACHE_BYTEMASK 0x04000000
442 #define chipMinorFeatures9_SH_MULTI_WG_PACK_FIX 0x08000000
443 #define chipMinorFeatures9_DC_OVERLAY_SCALING 0x10000000
444 #define chipMinorFeatures9_DC_SOURCE_ROTATION 0x20000000
445 #define chipMinorFeatures9_DC_TILED 0x40000000
446 #define chipMinorFeatures9_DC_YUV_L1 0x80000000
447 #define chipMinorFeatures10_DC_D30_OUTPUT 0x00000001
448 #define chipMinorFeatures10_DC_MMU 0x00000002
449 #define chipMinorFeatures10_DC_COMPRESSION 0x00000004
450 #define chipMinorFeatures10_DC_QOS 0x00000008
451 #define chipMinorFeatures10_PE_ADVANCE_BLEND_PART0 0x00000010
452 #define chipMinorFeatures10_FE_PATCHLIST_FETCH_FIX 0x00000020
453 #define chipMinorFeatures10_RA_CG_FIX 0x00000040
454 #define chipMinorFeatures10_EVIS_VX2 0x00000080
455 #define chipMinorFeatures10_NN_FLOAT 0x00000100
456 #define chipMinorFeatures10_DEC400 0x00000200
457 #define chipMinorFeatures10_LS_SUPPORT_PERCOMP_DEPENDENCY 0x00000400
458 #define chipMinorFeatures10_TP_ENGINE 0x00000800
459 #define chipMinorFeatures10_MULTI_CORE_BLOCK_SET_CONFIG2 0x00001000
460 #define chipMinorFeatures10_PE_VMSAA_COVERAGE_CACHE_FIX 0x00002000
461 #define chipMinorFeatures10_SECURITY_AHB 0x00004000
462 #define chipMinorFeatures10_MULTICORE_SEMAPHORESTALL_V3 0x00008000
463 #define chipMinorFeatures10_SMALLBATCH 0x00010000
464 #define chipMinorFeatures10_SH_CMPLX 0x00020000
465 #define chipMinorFeatures10_SH_IDIV0_SWZL_EHS 0x00040000
466 #define chipMinorFeatures10_TX_LERP_LESS_BIT 0x00080000
467 #define chipMinorFeatures10_SH_GM_ENDIAN 0x00100000
468 #define chipMinorFeatures10_SH_GM_USC_UNALLOC 0x00200000
469 #define chipMinorFeatures10_SH_END_OF_BB 0x00400000
470 #define chipMinorFeatures10_VIP_V7 0x00800000
471 #define chipMinorFeatures10_TX_BORDER_CLAMP_FIX 0x01000000
472 #define chipMinorFeatures10_SH_IMG_LD_LASTPIXEL_FIX 0x02000000
473 #define chipMinorFeatures10_ASYNC_BLT 0x04000000
474 #define chipMinorFeatures10_ASYNC_FE_FENCE_FIX 0x08000000
475 #define chipMinorFeatures10_PSCS_THROTTLE 0x10000000
476 #define chipMinorFeatures10_SEPARATE_LS 0x20000000
477 #define chipMinorFeatures10_MCFE 0x40000000
478 #define chipMinorFeatures10_WIDELINE_TRIANGLE_EMU 0x80000000
479 #define chipMinorFeatures11_VG_RESOLUTION_8K 0x00000001
480 #define chipMinorFeatures11_FENCE_32BIT 0x00000002
481 #define chipMinorFeatures11_FENCE_64BIT 0x00000004
482 #define chipMinorFeatures11_NN_INTERLEVE8 0x00000008
483 #define chipMinorFeatures11_TP_REORDER 0x00000010
484 #define chipMinorFeatures11_PE_DEPTH_ONLY_OQFIX 0x00000020
485 #define chipMinorFeatures12_G2D_DEC400EX 0x00000020