Lines Matching +full:5 +full:- +full:6
1 // SPDX-License-Identifier: MIT
35 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
49 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
50 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
55 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
57 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
82 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
110 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
112 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
117 pps_payload->pps_3 = in drm_dsc_pps_payload_pack()
118 dsc_cfg->line_buf_depth | in drm_dsc_pps_payload_pack()
119 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; in drm_dsc_pps_payload_pack()
122 pps_payload->pps_4 = in drm_dsc_pps_payload_pack()
123 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> in drm_dsc_pps_payload_pack()
125 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT | in drm_dsc_pps_payload_pack()
126 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT | in drm_dsc_pps_payload_pack()
127 dsc_cfg->convert_rgb << DSC_PPS_CONVERT_RGB_SHIFT | in drm_dsc_pps_payload_pack()
128 dsc_cfg->block_pred_enable << DSC_PPS_BLOCK_PRED_EN_SHIFT; in drm_dsc_pps_payload_pack()
130 /* PPS 5 */ in drm_dsc_pps_payload_pack()
131 pps_payload->bits_per_pixel_low = in drm_dsc_pps_payload_pack()
132 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
141 /* PPS 6, 7 */ in drm_dsc_pps_payload_pack()
142 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height); in drm_dsc_pps_payload_pack()
145 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
148 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height); in drm_dsc_pps_payload_pack()
151 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width); in drm_dsc_pps_payload_pack()
154 pps_payload->chunk_size = cpu_to_be16(dsc_cfg->slice_chunk_size); in drm_dsc_pps_payload_pack()
157 pps_payload->initial_xmit_delay_high = in drm_dsc_pps_payload_pack()
158 ((dsc_cfg->initial_xmit_delay & in drm_dsc_pps_payload_pack()
163 pps_payload->initial_xmit_delay_low = in drm_dsc_pps_payload_pack()
164 (dsc_cfg->initial_xmit_delay & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
167 pps_payload->initial_dec_delay = in drm_dsc_pps_payload_pack()
168 cpu_to_be16(dsc_cfg->initial_dec_delay); in drm_dsc_pps_payload_pack()
173 pps_payload->initial_scale_value = in drm_dsc_pps_payload_pack()
174 dsc_cfg->initial_scale_value; in drm_dsc_pps_payload_pack()
177 pps_payload->scale_increment_interval = in drm_dsc_pps_payload_pack()
178 cpu_to_be16(dsc_cfg->scale_increment_interval); in drm_dsc_pps_payload_pack()
181 pps_payload->scale_decrement_interval_high = in drm_dsc_pps_payload_pack()
182 ((dsc_cfg->scale_decrement_interval & in drm_dsc_pps_payload_pack()
187 pps_payload->scale_decrement_interval_low = in drm_dsc_pps_payload_pack()
188 (dsc_cfg->scale_decrement_interval & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
190 /* PPS 26[7:0], PPS 27[7:5] RESERVED */ in drm_dsc_pps_payload_pack()
193 pps_payload->first_line_bpg_offset = in drm_dsc_pps_payload_pack()
194 dsc_cfg->first_line_bpg_offset; in drm_dsc_pps_payload_pack()
197 pps_payload->nfl_bpg_offset = in drm_dsc_pps_payload_pack()
198 cpu_to_be16(dsc_cfg->nfl_bpg_offset); in drm_dsc_pps_payload_pack()
201 pps_payload->slice_bpg_offset = in drm_dsc_pps_payload_pack()
202 cpu_to_be16(dsc_cfg->slice_bpg_offset); in drm_dsc_pps_payload_pack()
205 pps_payload->initial_offset = in drm_dsc_pps_payload_pack()
206 cpu_to_be16(dsc_cfg->initial_offset); in drm_dsc_pps_payload_pack()
209 pps_payload->final_offset = cpu_to_be16(dsc_cfg->final_offset); in drm_dsc_pps_payload_pack()
212 pps_payload->flatness_min_qp = dsc_cfg->flatness_min_qp; in drm_dsc_pps_payload_pack()
215 pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp; in drm_dsc_pps_payload_pack()
218 pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); in drm_dsc_pps_payload_pack()
221 pps_payload->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; in drm_dsc_pps_payload_pack()
224 pps_payload->rc_quant_incr_limit0 = in drm_dsc_pps_payload_pack()
225 dsc_cfg->rc_quant_incr_limit0; in drm_dsc_pps_payload_pack()
228 pps_payload->rc_quant_incr_limit1 = in drm_dsc_pps_payload_pack()
229 dsc_cfg->rc_quant_incr_limit1; in drm_dsc_pps_payload_pack()
232 pps_payload->rc_tgt_offset = DSC_RC_TGT_OFFSET_LO_CONST | in drm_dsc_pps_payload_pack()
235 /* PPS 44 - 57 */ in drm_dsc_pps_payload_pack()
236 for (i = 0; i < DSC_NUM_BUF_RANGES - 1; i++) in drm_dsc_pps_payload_pack()
237 pps_payload->rc_buf_thresh[i] = in drm_dsc_pps_payload_pack()
238 dsc_cfg->rc_buf_thresh[i]; in drm_dsc_pps_payload_pack()
240 /* PPS 58 - 87 */ in drm_dsc_pps_payload_pack()
243 * are as follows: Min_qp[15:11], max_qp[10:6], offset[5:0] in drm_dsc_pps_payload_pack()
246 pps_payload->rc_range_parameters[i] = in drm_dsc_pps_payload_pack()
247 cpu_to_be16((dsc_cfg->rc_range_params[i].range_min_qp << in drm_dsc_pps_payload_pack()
249 (dsc_cfg->rc_range_params[i].range_max_qp << in drm_dsc_pps_payload_pack()
251 (dsc_cfg->rc_range_params[i].range_bpg_offset)); in drm_dsc_pps_payload_pack()
255 pps_payload->native_422_420 = dsc_cfg->native_422 | in drm_dsc_pps_payload_pack()
256 dsc_cfg->native_420 << DSC_PPS_NATIVE_420_SHIFT; in drm_dsc_pps_payload_pack()
259 pps_payload->second_line_bpg_offset = in drm_dsc_pps_payload_pack()
260 dsc_cfg->second_line_bpg_offset; in drm_dsc_pps_payload_pack()
263 pps_payload->nsl_bpg_offset = in drm_dsc_pps_payload_pack()
264 cpu_to_be16(dsc_cfg->nsl_bpg_offset); in drm_dsc_pps_payload_pack()
267 pps_payload->second_line_offset_adj = in drm_dsc_pps_payload_pack()
268 cpu_to_be16(dsc_cfg->second_line_offset_adj); in drm_dsc_pps_payload_pack()
270 /* PPS 94 - 127 are O */ in drm_dsc_pps_payload_pack()
275 * drm_dsc_set_const_params() - Set DSC parameters considered typically
283 if (!vdsc_cfg->rc_model_size) in drm_dsc_set_const_params()
284 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in drm_dsc_set_const_params()
285 vdsc_cfg->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; in drm_dsc_set_const_params()
286 vdsc_cfg->rc_tgt_offset_high = DSC_RC_TGT_OFFSET_HI_CONST; in drm_dsc_set_const_params()
287 vdsc_cfg->rc_tgt_offset_low = DSC_RC_TGT_OFFSET_LO_CONST; in drm_dsc_set_const_params()
289 if (vdsc_cfg->bits_per_component <= 10) in drm_dsc_set_const_params()
290 vdsc_cfg->mux_word_size = DSC_MUX_WORD_SIZE_8_10_BPC; in drm_dsc_set_const_params()
292 vdsc_cfg->mux_word_size = DSC_MUX_WORD_SIZE_12_BPC; in drm_dsc_set_const_params()
303 * drm_dsc_set_rc_buf_thresh() - Set thresholds for the RC model
313 DSC_NUM_BUF_RANGES - 1); in drm_dsc_set_rc_buf_thresh()
315 ARRAY_SIZE(vdsc_cfg->rc_buf_thresh)); in drm_dsc_set_rc_buf_thresh()
318 vdsc_cfg->rc_buf_thresh[i] = drm_dsc_rc_buf_thresh[i] >> 6; in drm_dsc_set_rc_buf_thresh()
321 * For 6bpp, RC Buffer threshold 12 and 13 need a different value in drm_dsc_set_rc_buf_thresh()
324 if (vdsc_cfg->bits_per_pixel == 6 << 4) { in drm_dsc_set_rc_buf_thresh()
325 vdsc_cfg->rc_buf_thresh[12] = 7936 >> 6; in drm_dsc_set_rc_buf_thresh()
326 vdsc_cfg->rc_buf_thresh[13] = 8000 >> 6; in drm_dsc_set_rc_buf_thresh()
354 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623
358 .bpp = DSC_BPP(6), .bpc = 8,
360 { 0, 2, 0 }, { 1, 4, -2 }, { 3, 6, -2 }, { 4, 6, -4 },
361 { 5, 7, -6 }, { 5, 7, -6 }, { 6, 7, -6 }, { 6, 8, -8 },
362 { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 }, { 10, 12, -12 },
363 { 10, 13, -12 }, { 12, 14, -12 }, { 15, 15, -12 }
370 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
371 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
372 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 11, -10 }, { 5, 12, -12 },
373 { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
381 * DSC model/pre-SCR-cfg has 8 for range_max_qp[0], however
382 * VESA DSC 1.1 Table E-5 sets it to 4.
384 { 0, 4, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 },
385 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
386 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
387 { 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
394 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 },
395 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
396 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 19, -10 },
397 { 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
398 { 21, 23, -12 }
405 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 },
406 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
407 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 11, -10 },
408 { 5, 12, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
415 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 },
416 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
417 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 15, -10 },
418 { 9, 16, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
425 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 },
426 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
427 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 },
428 { 13, 19, -10 }, { 13, 20, -12 }, { 15, 21, -12 },
429 { 21, 23, -12 }
436 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
437 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
438 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 11, -10 },
439 { 5, 12, -12 }, { 5, 13, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
446 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 },
447 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
448 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 15, -10 }, { 9, 16, -12 },
449 { 9, 17, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
456 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 },
457 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
458 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 19, -10 },
459 { 13, 20, -12 }, { 13, 21, -12 }, { 15, 21, -12 },
460 { 21, 23, -12 }
467 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 },
468 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 4, -2 }, { 2, 4, -4 },
469 { 3, 4, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 5, 7, -10 },
470 { 5, 8, -12 }, { 7, 13, -12 }, { 13, 15, -12 }
477 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 },
478 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 8, -2 }, { 6, 8, -4 },
479 { 7, 8, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 9, 11, -10 },
480 { 9, 12, -12 }, { 11, 17, -12 }, { 17, 19, -12 }
487 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 },
488 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 },
489 { 11, 12, -6 }, { 11, 13, -8 }, { 12, 14, -10 },
490 { 13, 15, -10 }, { 13, 16, -12 }, { 15, 21, -12 },
491 { 21, 23, -12 }
502 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623
506 .bpp = DSC_BPP(6), .bpc = 8,
508 { 0, 4, 0 }, { 1, 6, -2 }, { 3, 8, -2 }, { 4, 8, -4 },
509 { 5, 9, -6 }, { 5, 9, -6 }, { 6, 9, -6 }, { 6, 10, -8 },
510 { 7, 11, -8 }, { 8, 12, -10 }, { 9, 12, -10 }, { 10, 12, -12 },
511 { 10, 12, -12 }, { 11, 12, -12 }, { 13, 14, -12 }
516 .bpp = DSC_BPP(6), .bpc = 10,
518 { 0, 8, 0 }, { 3, 10, -2 }, { 7, 12, -2 }, { 8, 12, -4 },
519 { 9, 13, -6 }, { 9, 13, -6 }, { 10, 13, -6 }, { 10, 14, -8 },
520 { 11, 15, -8 }, { 12, 16, -10 }, { 13, 16, -10 },
521 { 14, 16, -12 }, { 14, 16, -12 }, { 15, 16, -12 },
522 { 17, 18, -12 }
527 .bpp = DSC_BPP(6), .bpc = 12,
529 { 0, 12, 0 }, { 5, 14, -2 }, { 11, 16, -2 }, { 12, 16, -4 },
530 { 13, 17, -6 }, { 13, 17, -6 }, { 14, 17, -6 }, { 14, 18, -8 },
531 { 15, 19, -8 }, { 16, 20, -10 }, { 17, 20, -10 },
532 { 18, 20, -12 }, { 18, 20, -12 }, { 19, 20, -12 },
533 { 21, 22, -12 }
538 .bpp = DSC_BPP(6), .bpc = 14,
540 { 0, 16, 0 }, { 7, 18, -2 }, { 15, 20, -2 }, { 16, 20, -4 },
541 { 17, 21, -6 }, { 17, 21, -6 }, { 18, 21, -6 }, { 18, 22, -8 },
542 { 19, 23, -8 }, { 20, 24, -10 }, { 21, 24, -10 },
543 { 22, 24, -12 }, { 22, 24, -12 }, { 23, 24, -12 },
544 { 25, 26, -12 }
549 .bpp = DSC_BPP(6), .bpc = 16,
551 { 0, 20, 0 }, { 9, 22, -2 }, { 19, 24, -2 }, { 20, 24, -4 },
552 { 21, 25, -6 }, { 21, 25, -6 }, { 22, 25, -6 }, { 22, 26, -8 },
553 { 23, 27, -8 }, { 24, 28, -10 }, { 25, 28, -10 },
554 { 26, 28, -12 }, { 26, 28, -12 }, { 27, 28, -12 },
555 { 29, 30, -12 }
562 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
563 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
564 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 10, -10 }, { 5, 11, -12 },
565 { 5, 11, -12 }, { 9, 12, -12 }, { 12, 13, -12 }
572 { 0, 8, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 },
573 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
574 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 14, -10 }, { 9, 15, -12 },
575 { 9, 15, -12 }, { 13, 16, -12 }, { 16, 17, -12 }
582 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 },
583 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
584 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 18, -10 },
585 { 13, 19, -12 }, { 13, 19, -12 }, { 17, 20, -12 },
586 { 20, 21, -12 }
593 { 0, 12, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 },
594 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
595 { 15, 21, -8 }, { 15, 22, -10 }, { 17, 22, -10 },
596 { 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 },
597 { 24, 25, -12 }
604 { 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 },
605 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
606 { 19, 25, -8 }, { 19, 26, -10 }, { 21, 26, -10 },
607 { 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 },
608 { 28, 29, -12 }
615 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 },
616 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
617 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 10, -10 },
618 { 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 }
625 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 },
626 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
627 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 14, -10 },
628 { 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 }
635 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 },
636 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
637 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 },
638 { 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 },
639 { 19, 20, -12 }
646 { 0, 11, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 13, 18, -2 },
647 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
648 { 15, 21, -8 }, { 15, 21, -10 }, { 17, 22, -10 },
649 { 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 },
650 { 23, 24, -12 }
657 { 0, 11, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 16, 20, -2 },
658 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
659 { 19, 25, -8 }, { 19, 25, -10 }, { 21, 26, -10 },
660 { 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 },
661 { 27, 28, -12 }
668 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
669 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
670 { 3, 8, -8 }, { 3, 9, -10 }, { 5, 9, -10 }, { 5, 9, -12 },
671 { 5, 9, -12 }, { 7, 10, -12 }, { 10, 11, -12 }
678 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 },
679 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
680 { 7, 12, -8 }, { 7, 13, -10 }, { 9, 13, -10 }, { 9, 13, -12 },
681 { 9, 13, -12 }, { 11, 14, -12 }, { 14, 15, -12 }
688 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 },
689 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
690 { 11, 16, -8 }, { 11, 17, -10 }, { 13, 17, -10 },
691 { 13, 17, -12 }, { 13, 17, -12 }, { 15, 18, -12 },
692 { 18, 19, -12 }
699 { 0, 6, 2 }, { 7, 10, 0 }, { 9, 13, 0 }, { 11, 16, -2 },
700 { 14, 17, -4 }, { 15, 18, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
701 { 15, 20, -8 }, { 15, 21, -10 }, { 17, 21, -10 },
702 { 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 },
703 { 22, 23, -12 }
710 { 0, 6, 2 }, { 6, 11, 0 }, { 11, 15, 0 }, { 14, 18, -2 },
711 { 18, 21, -4 }, { 19, 22, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
712 { 19, 24, -8 }, { 19, 25, -10 }, { 21, 25, -10 },
713 { 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 },
714 { 26, 27, -12 }
721 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 },
722 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 3, -2 }, { 2, 4, -4 },
723 { 2, 5, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 4, 7, -10 },
724 { 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 }
731 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 },
732 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 7, -2 }, { 6, 8, -4 },
733 { 6, 9, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 8, 11, -10 },
734 { 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 }
741 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 },
742 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 },
743 { 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 },
744 { 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 },
745 { 16, 17, -12 }
752 { 0, 4, 10 }, { 3, 8, 8 }, { 6, 11, 6 }, { 9, 14, 4 },
753 { 13, 15, 2 }, { 13, 15, 0 }, { 13, 16, -2 }, { 14, 16, -4 },
754 { 15, 17, -6 }, { 15, 17, -8 }, { 16, 18, -10 },
755 { 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 },
756 { 20, 21, -12 }
763 { 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 },
764 { 17, 19, 2 }, { 17, 20, 0 }, { 17, 20, -2 }, { 18, 20, -4 },
765 { 19, 21, -6 }, { 19, 21, -8 }, { 20, 22, -10 },
766 { 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 },
767 { 24, 25, -12 }
778 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623
782 .bpp = DSC_BPP(6), .bpc = 8,
784 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
785 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
786 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 10, -10 }, { 5, 11, -12 },
787 { 5, 11, -12 }, { 9, 12, -12 }, { 12, 13, -12 }
792 .bpp = DSC_BPP(6), .bpc = 10,
794 { 0, 8, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 },
795 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
796 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 14, -10 }, { 9, 15, -12 },
797 { 9, 15, -12 }, { 13, 16, -12 }, { 16, 17, -12 }
802 .bpp = DSC_BPP(6), .bpc = 12,
804 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 },
805 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
806 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 18, -10 },
807 { 13, 19, -12 }, { 13, 19, -12 }, { 17, 20, -12 },
808 { 20, 21, -12 }
813 .bpp = DSC_BPP(6), .bpc = 14,
815 { 0, 12, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 },
816 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
817 { 15, 21, -8 }, { 15, 22, -10 }, { 17, 22, -10 },
818 { 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 },
819 { 24, 25, -12 }
824 .bpp = DSC_BPP(6), .bpc = 16,
826 { 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 },
827 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
828 { 19, 25, -8 }, { 19, 26, -10 }, { 21, 26, -10 },
829 { 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 },
830 { 28, 29, -12 }
837 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 },
838 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
839 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 10, -10 },
840 { 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 }
847 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 },
848 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
849 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 14, -10 },
850 { 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 }
857 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 },
858 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
859 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 },
860 { 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 },
861 { 19, 20, -12 }
868 { 0, 11, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 13, 18, -2 },
869 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
870 { 15, 21, -8 }, { 15, 21, -10 }, { 17, 22, -10 },
871 { 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 },
872 { 23, 24, -12 }
879 { 0, 11, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 16, 20, -2 },
880 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
881 { 19, 25, -8 }, { 19, 25, -10 }, { 21, 26, -10 },
882 { 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 },
883 { 27, 28, -12 }
890 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
891 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
892 { 3, 8, -8 }, { 3, 9, -10 }, { 5, 9, -10 }, { 5, 9, -12 },
893 { 5, 9, -12 }, { 7, 10, -12 }, { 10, 11, -12 }
900 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 },
901 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
902 { 7, 12, -8 }, { 7, 13, -10 }, { 9, 13, -10 }, { 9, 13, -12 },
903 { 9, 13, -12 }, { 11, 14, -12 }, { 14, 15, -12 }
910 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 },
911 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
912 { 11, 16, -8 }, { 11, 17, -10 }, { 13, 17, -10 },
913 { 13, 17, -12 }, { 13, 17, -12 }, { 15, 18, -12 },
914 { 18, 19, -12 }
921 { 0, 6, 2 }, { 7, 10, 0 }, { 9, 13, 0 }, { 11, 16, -2 },
922 { 14, 17, -4 }, { 15, 18, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
923 { 15, 20, -8 }, { 15, 21, -10 }, { 17, 21, -10 },
924 { 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 },
925 { 22, 23, -12 }
932 { 0, 6, 2 }, { 6, 11, 0 }, { 11, 15, 0 }, { 14, 18, -2 },
933 { 18, 21, -4 }, { 19, 22, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
934 { 19, 24, -8 }, { 19, 25, -10 }, { 21, 25, -10 },
935 { 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 },
936 { 26, 27, -12 }
943 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 },
944 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 3, -2 }, { 2, 4, -4 },
945 { 2, 5, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 4, 7, -10 },
946 { 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 }
953 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 },
954 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 7, -2 }, { 6, 8, -4 },
955 { 6, 9, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 8, 11, -10 },
956 { 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 }
963 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 },
964 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 },
965 { 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 },
966 { 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 },
967 { 16, 17, -12 }
974 { 0, 4, 10 }, { 3, 8, 8 }, { 6, 11, 6 }, { 9, 14, 4 },
975 { 13, 15, 2 }, { 13, 15, 0 }, { 13, 16, -2 }, { 14, 16, -4 },
976 { 15, 17, -6 }, { 15, 17, -8 }, { 16, 18, -10 },
977 { 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 },
978 { 20, 21, -12 }
985 { 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 },
986 { 17, 19, 2 }, { 17, 20, 0 }, { 17, 20, -2 }, { 18, 20, -4 },
987 { 19, 21, -6 }, { 19, 21, -8 }, { 20, 22, -10 },
988 { 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 },
989 { 24, 25, -12 }
1000 * Cross-checked against C Model releases: DSC_model_20161212 and 20210623
1006 { 0, 4, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
1007 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
1008 { 3, 9, -8 }, { 3, 10, -10 }, { 5, 10, -10 }, { 5, 11, -12 },
1009 { 5, 11, -12 }, { 9, 12, -12 }, { 12, 13, -12 }
1016 { 0, 8, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 5, 10, -2 },
1017 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
1018 { 7, 13, -8 }, { 7, 14, -10 }, { 9, 14, -10 }, { 9, 15, -12 },
1019 { 9, 15, -12 }, { 13, 16, -12 }, { 16, 17, -12 }
1026 { 0, 12, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 9, 14, -2 },
1027 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
1028 { 11, 17, -8 }, { 11, 18, -10 }, { 13, 18, -10 },
1029 { 13, 19, -12 }, { 13, 19, -12 }, { 17, 20, -12 },
1030 { 20, 21, -12 }
1037 { 0, 12, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 12, 17, -2 },
1038 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
1039 { 15, 21, -8 }, { 15, 22, -10 }, { 17, 22, -10 },
1040 { 17, 23, -12 }, { 17, 23, -12 }, { 21, 24, -12 },
1041 { 24, 25, -12 }
1048 { 0, 12, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 15, 20, -2 },
1049 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
1050 { 19, 25, -8 }, { 19, 26, -10 }, { 21, 26, -10 },
1051 { 21, 27, -12 }, { 21, 27, -12 }, { 25, 28, -12 },
1052 { 28, 29, -12 }
1057 .bpp = DSC_BPP(5), .bpc = 8,
1059 { 0, 3, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 2, 6, -2 },
1060 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
1061 { 3, 9, -8 }, { 3, 9, -10 }, { 5, 10, -10 }, { 5, 10, -10 },
1062 { 5, 11, -12 }, { 7, 11, -12 }, { 11, 12, -12 }
1067 .bpp = DSC_BPP(5), .bpc = 10,
1069 { 0, 7, 2 }, { 4, 8, 0 }, { 5, 9, 0 }, { 6, 10, -2 },
1070 { 7, 11, -4 }, { 7, 11, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
1071 { 7, 13, -8 }, { 7, 13, -10 }, { 9, 14, -10 }, { 9, 14, -10 },
1072 { 9, 15, -12 }, { 11, 15, -12 }, { 15, 16, -12 }
1077 .bpp = DSC_BPP(5), .bpc = 12,
1079 { 0, 11, 2 }, { 4, 12, 0 }, { 9, 13, 0 }, { 10, 14, -2 },
1080 { 11, 15, -4 }, { 11, 15, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
1081 { 11, 17, -8 }, { 11, 17, -10 }, { 13, 18, -10 },
1082 { 13, 18, -10 }, { 13, 19, -12 }, { 15, 19, -12 },
1083 { 19, 20, -12 }
1088 .bpp = DSC_BPP(5), .bpc = 14,
1090 { 0, 11, 2 }, { 5, 13, 0 }, { 11, 15, 0 }, { 13, 18, -2 },
1091 { 15, 19, -4 }, { 15, 19, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
1092 { 15, 21, -8 }, { 15, 21, -10 }, { 17, 22, -10 },
1093 { 17, 22, -10 }, { 17, 23, -12 }, { 19, 23, -12 },
1094 { 23, 24, -12 }
1099 .bpp = DSC_BPP(5), .bpc = 16,
1101 { 0, 11, 2 }, { 6, 14, 0 }, { 13, 17, 0 }, { 16, 20, -2 },
1102 { 19, 23, -4 }, { 19, 23, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
1103 { 19, 25, -8 }, { 19, 25, -10 }, { 21, 26, -10 },
1104 { 21, 26, -10 }, { 21, 27, -12 }, { 23, 27, -12 },
1105 { 27, 28, -12 }
1110 .bpp = DSC_BPP(6), .bpc = 8,
1112 { 0, 2, 2 }, { 0, 4, 0 }, { 1, 5, 0 }, { 1, 6, -2 },
1113 { 3, 7, -4 }, { 3, 7, -6 }, { 3, 7, -8 }, { 3, 8, -8 },
1114 { 3, 8, -8 }, { 3, 9, -10 }, { 5, 9, -10 }, { 5, 9, -12 },
1115 { 5, 9, -12 }, { 7, 10, -12 }, { 10, 12, -12 }
1120 .bpp = DSC_BPP(6), .bpc = 10,
1122 { 0, 2, 2 }, { 2, 5, 0 }, { 3, 7, 0 }, { 4, 8, -2 },
1123 { 6, 9, -4 }, { 7, 10, -6 }, { 7, 11, -8 }, { 7, 12, -8 },
1124 { 7, 12, -8 }, { 7, 13, -10 }, { 9, 13, -10 }, { 9, 13, -12 },
1125 { 9, 13, -12 }, { 11, 14, -12 }, { 14, 15, -12 }
1130 .bpp = DSC_BPP(6), .bpc = 12,
1132 { 0, 6, 2 }, { 4, 9, 0 }, { 7, 11, 0 }, { 8, 12, -2 },
1133 { 10, 13, -4 }, { 11, 14, -6 }, { 11, 15, -8 }, { 11, 16, -8 },
1134 { 11, 16, -8 }, { 11, 17, -10 }, { 13, 17, -10 },
1135 { 13, 17, -12 }, { 13, 17, -12 }, { 15, 18, -12 },
1136 { 18, 19, -12 }
1141 .bpp = DSC_BPP(6), .bpc = 14,
1143 { 0, 6, 2 }, { 7, 10, 0 }, { 9, 13, 0 }, { 11, 16, -2 },
1144 { 14, 17, -4 }, { 15, 18, -6 }, { 15, 19, -8 }, { 15, 20, -8 },
1145 { 15, 20, -8 }, { 15, 21, -10 }, { 17, 21, -10 },
1146 { 17, 21, -12 }, { 17, 21, -12 }, { 19, 22, -12 },
1147 { 22, 23, -12 }
1152 .bpp = DSC_BPP(6), .bpc = 16,
1154 { 0, 6, 2 }, { 6, 11, 0 }, { 11, 15, 0 }, { 14, 18, -2 },
1155 { 18, 21, -4 }, { 19, 22, -6 }, { 19, 23, -8 }, { 19, 24, -8 },
1156 { 19, 24, -8 }, { 19, 25, -10 }, { 21, 25, -10 },
1157 { 21, 25, -12 }, { 21, 25, -12 }, { 23, 26, -12 },
1158 { 26, 27, -12 }
1165 { 0, 0, 10 }, { 0, 1, 8 }, { 0, 1, 6 }, { 0, 2, 4 },
1166 { 1, 2, 2 }, { 1, 3, 0 }, { 1, 3, -2 }, { 2, 4, -4 },
1167 { 2, 5, -6 }, { 3, 5, -8 }, { 4, 6, -10 }, { 4, 7, -10 },
1168 { 5, 7, -12 }, { 7, 8, -12 }, { 8, 9, -12 }
1175 { 0, 2, 10 }, { 2, 5, 8 }, { 3, 5, 6 }, { 4, 6, 4 },
1176 { 5, 6, 2 }, { 5, 7, 0 }, { 5, 7, -2 }, { 6, 8, -4 },
1177 { 6, 9, -6 }, { 7, 9, -8 }, { 8, 10, -10 }, { 8, 11, -10 },
1178 { 9, 11, -12 }, { 11, 12, -12 }, { 12, 13, -12 }
1185 { 0, 4, 10 }, { 2, 7, 8 }, { 4, 9, 6 }, { 6, 11, 4 },
1186 { 9, 11, 2 }, { 9, 11, 0 }, { 9, 12, -2 }, { 10, 12, -4 },
1187 { 11, 13, -6 }, { 11, 13, -8 }, { 12, 14, -10 },
1188 { 13, 15, -10 }, { 13, 15, -12 }, { 15, 16, -12 },
1189 { 16, 17, -12 }
1196 { 0, 4, 10 }, { 3, 8, 8 }, { 6, 11, 6 }, { 9, 14, 4 },
1197 { 13, 15, 2 }, { 13, 15, 0 }, { 13, 16, -2 }, { 14, 16, -4 },
1198 { 15, 17, -6 }, { 15, 17, -8 }, { 16, 18, -10 },
1199 { 17, 19, -10 }, { 17, 19, -12 }, { 19, 20, -12 },
1200 { 20, 21, -12 }
1207 { 0, 4, 10 }, { 4, 9, 8 }, { 8, 13, 6 }, { 12, 17, 4 },
1208 { 17, 19, 2 }, { 17, 20, 0 }, { 17, 20, -2 }, { 18, 20, -4 },
1209 { 19, 21, -6 }, { 19, 21, -8 }, { 20, 22, -10 },
1210 { 21, 23, -10 }, { 21, 23, -12 }, { 23, 24, -12 },
1211 { 24, 25, -12 }
1233 * drm_dsc_setup_rc_params() - Set parameters and limits for RC model in
1241 * Return: 0 or -error code in case of an error
1249 if (WARN_ON_ONCE(!vdsc_cfg->bits_per_pixel || in drm_dsc_setup_rc_params()
1250 !vdsc_cfg->bits_per_component)) in drm_dsc_setup_rc_params()
1251 return -EINVAL; in drm_dsc_setup_rc_params()
1267 return -EINVAL; in drm_dsc_setup_rc_params()
1271 vdsc_cfg->bits_per_pixel, in drm_dsc_setup_rc_params()
1272 vdsc_cfg->bits_per_component); in drm_dsc_setup_rc_params()
1274 return -EINVAL; in drm_dsc_setup_rc_params()
1276 vdsc_cfg->first_line_bpg_offset = rc_params->first_line_bpg_offset; in drm_dsc_setup_rc_params()
1277 vdsc_cfg->initial_xmit_delay = rc_params->initial_xmit_delay; in drm_dsc_setup_rc_params()
1278 vdsc_cfg->initial_offset = rc_params->initial_offset; in drm_dsc_setup_rc_params()
1279 vdsc_cfg->flatness_min_qp = rc_params->flatness_min_qp; in drm_dsc_setup_rc_params()
1280 vdsc_cfg->flatness_max_qp = rc_params->flatness_max_qp; in drm_dsc_setup_rc_params()
1281 vdsc_cfg->rc_quant_incr_limit0 = rc_params->rc_quant_incr_limit0; in drm_dsc_setup_rc_params()
1282 vdsc_cfg->rc_quant_incr_limit1 = rc_params->rc_quant_incr_limit1; in drm_dsc_setup_rc_params()
1285 vdsc_cfg->rc_range_params[i].range_min_qp = in drm_dsc_setup_rc_params()
1286 rc_params->rc_range_params[i].range_min_qp; in drm_dsc_setup_rc_params()
1287 vdsc_cfg->rc_range_params[i].range_max_qp = in drm_dsc_setup_rc_params()
1288 rc_params->rc_range_params[i].range_max_qp; in drm_dsc_setup_rc_params()
1290 * Range BPG Offset uses 2's complement and is only a 6 bits. So in drm_dsc_setup_rc_params()
1291 * mask it to get only 6 bits. in drm_dsc_setup_rc_params()
1293 vdsc_cfg->rc_range_params[i].range_bpg_offset = in drm_dsc_setup_rc_params()
1294 rc_params->rc_range_params[i].range_bpg_offset & in drm_dsc_setup_rc_params()
1303 * drm_dsc_compute_rc_parameters() - Write rate control
1322 if (vdsc_cfg->native_420 || vdsc_cfg->native_422) { in drm_dsc_compute_rc_parameters()
1324 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width / 2, in drm_dsc_compute_rc_parameters()
1328 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width / 2 * in drm_dsc_compute_rc_parameters()
1329 vdsc_cfg->bits_per_pixel, in drm_dsc_compute_rc_parameters()
1333 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width, in drm_dsc_compute_rc_parameters()
1337 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width * in drm_dsc_compute_rc_parameters()
1338 vdsc_cfg->bits_per_pixel, in drm_dsc_compute_rc_parameters()
1342 if (vdsc_cfg->convert_rgb) in drm_dsc_compute_rc_parameters()
1343 num_extra_mux_bits = 3 * (vdsc_cfg->mux_word_size + in drm_dsc_compute_rc_parameters()
1344 (4 * vdsc_cfg->bits_per_component + 4) in drm_dsc_compute_rc_parameters()
1345 - 2); in drm_dsc_compute_rc_parameters()
1346 else if (vdsc_cfg->native_422) in drm_dsc_compute_rc_parameters()
1347 num_extra_mux_bits = 4 * vdsc_cfg->mux_word_size + in drm_dsc_compute_rc_parameters()
1348 (4 * vdsc_cfg->bits_per_component + 4) + in drm_dsc_compute_rc_parameters()
1349 3 * (4 * vdsc_cfg->bits_per_component) - 2; in drm_dsc_compute_rc_parameters()
1351 num_extra_mux_bits = 3 * vdsc_cfg->mux_word_size + in drm_dsc_compute_rc_parameters()
1352 (4 * vdsc_cfg->bits_per_component + 4) + in drm_dsc_compute_rc_parameters()
1353 2 * (4 * vdsc_cfg->bits_per_component) - 2; in drm_dsc_compute_rc_parameters()
1355 slice_bits = 8 * vdsc_cfg->slice_chunk_size * vdsc_cfg->slice_height; in drm_dsc_compute_rc_parameters()
1358 ((slice_bits - num_extra_mux_bits) % vdsc_cfg->mux_word_size)) in drm_dsc_compute_rc_parameters()
1359 num_extra_mux_bits--; in drm_dsc_compute_rc_parameters()
1361 if (groups_per_line < vdsc_cfg->initial_scale_value - 8) in drm_dsc_compute_rc_parameters()
1362 vdsc_cfg->initial_scale_value = groups_per_line + 8; in drm_dsc_compute_rc_parameters()
1365 if (vdsc_cfg->initial_scale_value > 8) in drm_dsc_compute_rc_parameters()
1366 vdsc_cfg->scale_decrement_interval = groups_per_line / in drm_dsc_compute_rc_parameters()
1367 (vdsc_cfg->initial_scale_value - 8); in drm_dsc_compute_rc_parameters()
1369 vdsc_cfg->scale_decrement_interval = DSC_SCALE_DECREMENT_INTERVAL_MAX; in drm_dsc_compute_rc_parameters()
1371 vdsc_cfg->final_offset = vdsc_cfg->rc_model_size - in drm_dsc_compute_rc_parameters()
1372 (vdsc_cfg->initial_xmit_delay * in drm_dsc_compute_rc_parameters()
1373 vdsc_cfg->bits_per_pixel + 8) / 16 + num_extra_mux_bits; in drm_dsc_compute_rc_parameters()
1375 if (vdsc_cfg->final_offset >= vdsc_cfg->rc_model_size) { in drm_dsc_compute_rc_parameters()
1377 return -ERANGE; in drm_dsc_compute_rc_parameters()
1380 final_scale = (vdsc_cfg->rc_model_size * 8) / in drm_dsc_compute_rc_parameters()
1381 (vdsc_cfg->rc_model_size - vdsc_cfg->final_offset); in drm_dsc_compute_rc_parameters()
1382 if (vdsc_cfg->slice_height > 1) in drm_dsc_compute_rc_parameters()
1388 vdsc_cfg->nfl_bpg_offset = DIV_ROUND_UP((vdsc_cfg->first_line_bpg_offset << 11), in drm_dsc_compute_rc_parameters()
1389 (vdsc_cfg->slice_height - 1)); in drm_dsc_compute_rc_parameters()
1391 vdsc_cfg->nfl_bpg_offset = 0; in drm_dsc_compute_rc_parameters()
1394 groups_total = groups_per_line * vdsc_cfg->slice_height; in drm_dsc_compute_rc_parameters()
1397 vdsc_cfg->slice_bpg_offset = DIV_ROUND_UP(((vdsc_cfg->rc_model_size - in drm_dsc_compute_rc_parameters()
1398 vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
1405 * finaloffset/((NflBpgOffset + SliceBpgOffset)*8(finalscale - 1.125)) in drm_dsc_compute_rc_parameters()
1409 vdsc_cfg->scale_increment_interval = in drm_dsc_compute_rc_parameters()
1410 (vdsc_cfg->final_offset * (1 << 11)) / in drm_dsc_compute_rc_parameters()
1411 ((vdsc_cfg->nfl_bpg_offset + in drm_dsc_compute_rc_parameters()
1412 vdsc_cfg->slice_bpg_offset) * in drm_dsc_compute_rc_parameters()
1413 (final_scale - 9)); in drm_dsc_compute_rc_parameters()
1419 vdsc_cfg->scale_increment_interval = 0; in drm_dsc_compute_rc_parameters()
1427 rbs_min = vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
1428 DIV_ROUND_UP(vdsc_cfg->initial_xmit_delay * in drm_dsc_compute_rc_parameters()
1429 vdsc_cfg->bits_per_pixel, 16) + in drm_dsc_compute_rc_parameters()
1430 groups_per_line * vdsc_cfg->first_line_bpg_offset; in drm_dsc_compute_rc_parameters()
1432 hrd_delay = DIV_ROUND_UP((rbs_min * 16), vdsc_cfg->bits_per_pixel); in drm_dsc_compute_rc_parameters()
1433 vdsc_cfg->rc_bits = (hrd_delay * vdsc_cfg->bits_per_pixel) / 16; in drm_dsc_compute_rc_parameters()
1434 vdsc_cfg->initial_dec_delay = hrd_delay - vdsc_cfg->initial_xmit_delay; in drm_dsc_compute_rc_parameters()
1441 * drm_dsc_get_bpp_int() - Get integer bits per pixel value for the given DRM DSC config
1448 WARN_ON_ONCE(vdsc_cfg->bits_per_pixel & 0xf); in drm_dsc_get_bpp_int()
1449 return vdsc_cfg->bits_per_pixel >> 4; in drm_dsc_get_bpp_int()
1454 * drm_dsc_initial_scale_value() - Calculate the initial scale value for the given DSC config
1461 return 8 * dsc->rc_model_size / (dsc->rc_model_size - dsc->initial_offset); in drm_dsc_initial_scale_value()
1466 * drm_dsc_flatness_det_thresh() - Calculate the flatness_det_thresh for the given DSC config
1473 return 2 << (dsc->bits_per_component - 8); in drm_dsc_flatness_det_thresh()
1481 "dsc-cfg: version: %d.%d, picture: w=%d, h=%d, slice: count=%d, w=%d, h=%d, size=%d\n", in drm_dsc_dump_config_main_params()
1482 cfg->dsc_version_major, cfg->dsc_version_minor, in drm_dsc_dump_config_main_params()
1483 cfg->pic_width, cfg->pic_height, in drm_dsc_dump_config_main_params()
1484 cfg->slice_count, cfg->slice_width, cfg->slice_height, cfg->slice_chunk_size); in drm_dsc_dump_config_main_params()
1486 "dsc-cfg: mode: block-pred=%s, vbr=%s, rgb=%s, simple-422=%s, native-422=%s, native-420=%s\n", in drm_dsc_dump_config_main_params()
1487 str_yes_no(cfg->block_pred_enable), str_yes_no(cfg->vbr_enable), in drm_dsc_dump_config_main_params()
1488 str_yes_no(cfg->convert_rgb), in drm_dsc_dump_config_main_params()
1489 str_yes_no(cfg->simple_422), str_yes_no(cfg->native_422), str_yes_no(cfg->native_420)); in drm_dsc_dump_config_main_params()
1491 "dsc-cfg: color-depth: uncompressed-bpc=%d, compressed-bpp=" FXP_Q4_FMT " line-buf-bpp=%d\n", in drm_dsc_dump_config_main_params()
1492 cfg->bits_per_component, FXP_Q4_ARGS(cfg->bits_per_pixel), cfg->line_buf_depth); in drm_dsc_dump_config_main_params()
1494 "dsc-cfg: rc-model: size=%d, bits=%d, mux-word-size: %d, initial-delays: xmit=%d, dec=%d\n", in drm_dsc_dump_config_main_params()
1495 cfg->rc_model_size, cfg->rc_bits, cfg->mux_word_size, in drm_dsc_dump_config_main_params()
1496 cfg->initial_xmit_delay, cfg->initial_dec_delay); in drm_dsc_dump_config_main_params()
1498 "dsc-cfg: offsets: initial=%d, final=%d, slice-bpg=%d\n", in drm_dsc_dump_config_main_params()
1499 cfg->initial_offset, cfg->final_offset, cfg->slice_bpg_offset); in drm_dsc_dump_config_main_params()
1501 "dsc-cfg: line-bpg-offsets: first=%d, non-first=%d, second=%d, non-second=%d, second-adj=%d\n", in drm_dsc_dump_config_main_params()
1502 cfg->first_line_bpg_offset, cfg->nfl_bpg_offset, in drm_dsc_dump_config_main_params()
1503 cfg->second_line_bpg_offset, cfg->nsl_bpg_offset, cfg->second_line_offset_adj); in drm_dsc_dump_config_main_params()
1505 …"dsc-cfg: rc-tgt-offsets: low=%d, high=%d, rc-edge-factor: %d, rc-quant-incr-limits: [0]=%d, [1]=%… in drm_dsc_dump_config_main_params()
1506 cfg->rc_tgt_offset_low, cfg->rc_tgt_offset_high, in drm_dsc_dump_config_main_params()
1507 cfg->rc_edge_factor, cfg->rc_quant_incr_limit0, cfg->rc_quant_incr_limit1); in drm_dsc_dump_config_main_params()
1509 "dsc-cfg: initial-scale: %d, scale-intervals: increment=%d, decrement=%d\n", in drm_dsc_dump_config_main_params()
1510 cfg->initial_scale_value, cfg->scale_increment_interval, cfg->scale_decrement_interval); in drm_dsc_dump_config_main_params()
1512 "dsc-cfg: flatness: min-qp=%d, max-qp=%d\n", in drm_dsc_dump_config_main_params()
1513 cfg->flatness_min_qp, cfg->flatness_max_qp); in drm_dsc_dump_config_main_params()
1519 const u16 *bt = cfg->rc_buf_thresh; in drm_dsc_dump_config_rc_params()
1520 const struct drm_dsc_rc_range_parameters *rp = cfg->rc_range_params; in drm_dsc_dump_config_rc_params()
1522 BUILD_BUG_ON(ARRAY_SIZE(cfg->rc_buf_thresh) != 14); in drm_dsc_dump_config_rc_params()
1523 BUILD_BUG_ON(ARRAY_SIZE(cfg->rc_range_params) != 15); in drm_dsc_dump_config_rc_params()
1526 "dsc-cfg: rc-level: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14\n"); in drm_dsc_dump_config_rc_params()
1528 "dsc-cfg: rc-buf-thresh: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", in drm_dsc_dump_config_rc_params()
1529 bt[0], bt[1], bt[2], bt[3], bt[4], bt[5], bt[6], bt[7], in drm_dsc_dump_config_rc_params()
1532 "dsc-cfg: rc-min-qp: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", in drm_dsc_dump_config_rc_params()
1534 rp[4].range_min_qp, rp[5].range_min_qp, rp[6].range_min_qp, rp[7].range_min_qp, in drm_dsc_dump_config_rc_params()
1538 "dsc-cfg: rc-max-qp: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", in drm_dsc_dump_config_rc_params()
1540 rp[4].range_max_qp, rp[5].range_max_qp, rp[6].range_max_qp, rp[7].range_max_qp, in drm_dsc_dump_config_rc_params()
1544 "dsc-cfg: rc-bpg-offset: %3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d,%3d\n", in drm_dsc_dump_config_rc_params()
1546 … rp[4].range_bpg_offset, rp[5].range_bpg_offset, rp[6].range_bpg_offset, rp[7].range_bpg_offset, in drm_dsc_dump_config_rc_params()
1552 * drm_dsc_dump_config - Dump the provided DSC configuration
1554 * @indent: Tab indentation level (max 5)