Lines Matching +full:i2c +full:- +full:tunnel
27 #include <linux/i2c.h>
77 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
231 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
232 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
243 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
244 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
256 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
257 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
279 * - Clock recovery vs. channel equalization
280 * - DPRX vs. LTTPR
281 * - 128b/132b vs. 8b/10b
282 * - DPCD rev 1.3 vs. later
331 drm_dbg_kms(aux->drm_dev, "%s: failed rd interval read\n", in __read_delay()
332 aux->name); in __read_delay()
362 drm_err(aux->drm_dev, "%s: failed rd interval read\n", in drm_dp_128b132b_read_aux_rd_interval()
363 aux->name); in drm_dp_128b132b_read_aux_rd_interval()
409 * drm_dp_phy_name() - Get the name of the given DP PHY
414 * non-NULL and valid.
448 return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1]; in dp_lttpr_phy_cap()
500 const char *arrow = request == DP_AUX_NATIVE_READ ? "->" : "<-"; in drm_dp_dump_access()
503 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d) %*ph\n", in drm_dp_dump_access()
504 aux->name, offset, arrow, ret, min(ret, 20), buffer); in drm_dp_dump_access()
506 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d)\n", in drm_dp_dump_access()
507 aux->name, offset, arrow, ret); in drm_dp_dump_access()
513 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
517 * Transactions are described using a hardware-independent drm_dp_aux_msg
519 * Both native and I2C-over-AUX transactions are supported.
535 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_access()
541 if (aux->powered_down) { in drm_dp_dpcd_access()
542 ret = -EBUSY; in drm_dp_dpcd_access()
549 * aux i2c transactions but real world devices this wasn't in drm_dp_dpcd_access()
553 if (ret != 0 && ret != -ETIMEDOUT) { in drm_dp_dpcd_access()
558 ret = aux->transfer(aux, &msg); in drm_dp_dpcd_access()
565 ret = -EPROTO; in drm_dp_dpcd_access()
567 ret = -EIO; in drm_dp_dpcd_access()
579 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access()
580 aux->name, err); in drm_dp_dpcd_access()
584 mutex_unlock(&aux->hw_mutex); in drm_dp_dpcd_access()
589 * drm_dp_dpcd_probe() - probe a given DPCD address with a 1-byte read access
594 * be used to trigger some side-effect the read access has, like waking up the
595 * sink, without the need for the read-out value.
614 * drm_dp_dpcd_set_powered() - Set whether the DP device is powered
616 * and the function will be a no-op.
630 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_set_powered()
631 aux->powered_down = !powered; in drm_dp_dpcd_set_powered()
632 mutex_unlock(&aux->hw_mutex); in drm_dp_dpcd_set_powered()
637 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
644 * code on failure. -EIO is returned if the request was NAKed by the sink or
646 * function returns -EPROTO. Errors from the underlying AUX channel transfer
647 * function, with the exception of -EBUSY (which causes the transaction to
660 * gets woken up and subsequently re-enters power save mode. in drm_dp_dpcd_read()
667 if (!aux->is_remote) { in drm_dp_dpcd_read()
673 if (aux->is_remote) in drm_dp_dpcd_read()
685 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
692 * code on failure. -EIO is returned if the request was NAKed by the sink or
694 * function returns -EPROTO. Errors from the underlying AUX channel transfer
695 * function, with the exception of -EBUSY (which causes the transaction to
703 if (aux->is_remote) in drm_dp_dpcd_write()
715 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
731 * drm_dp_dpcd_read_phy_link_status - get the link status information for a DP PHY
766 DP_LINK_STATUS_SIZE - 1); in drm_dp_dpcd_read_phy_link_status()
771 WARN_ON(ret != DP_LINK_STATUS_SIZE - 1); in drm_dp_dpcd_read_phy_link_status()
774 memmove(&link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS + 1], in drm_dp_dpcd_read_phy_link_status()
775 &link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS], in drm_dp_dpcd_read_phy_link_status()
776 DP_LINK_STATUS_SIZE - (DP_SINK_STATUS - DP_LANE0_1_STATUS) - 1); in drm_dp_dpcd_read_phy_link_status()
777 link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS] = 0; in drm_dp_dpcd_read_phy_link_status()
796 * drm_dp_dpcd_write_payload() - Write Virtual Channel information to payload table
824 drm_dbg_kms(aux->drm_dev, "failed to write payload allocation %d\n", ret); in drm_dp_dpcd_write_payload()
831 drm_dbg_kms(aux->drm_dev, "failed to read payload table status %d\n", ret); in drm_dp_dpcd_write_payload()
841 drm_dbg_kms(aux->drm_dev, "status not set after read payload table status %d\n", in drm_dp_dpcd_write_payload()
843 ret = -EINVAL; in drm_dp_dpcd_write_payload()
853 * drm_dp_dpcd_clear_payload() - Clear the entire VC Payload ID table
867 * drm_dp_dpcd_poll_act_handled() - Poll for ACT handled status
889 drm_err(aux->drm_dev, "Failed to get ACT after %d ms, last status: %02x\n", in drm_dp_dpcd_poll_act_handled()
891 return -EINVAL; in drm_dp_dpcd_poll_act_handled()
894 * Failure here isn't unexpected - the hub may have in drm_dp_dpcd_poll_act_handled()
897 drm_dbg_kms(aux->drm_dev, "Failed to read payload table status: %d\n", status); in drm_dp_dpcd_poll_act_handled()
910 return edid && edid->revision >= 4 && in is_edid_digital_input_dp()
911 edid->input & DRM_EDID_INPUT_DIGITAL && in is_edid_digital_input_dp()
912 (edid->input & DRM_EDID_DIGITAL_TYPE_MASK) == DRM_EDID_DIGITAL_TYPE_DP; in is_edid_digital_input_dp()
916 * drm_dp_downstream_is_type() - is the downstream facing port of certain type?
938 * drm_dp_downstream_is_tmds() - is the downstream facing port TMDS?
973 * drm_dp_send_real_edid_checksum() - send back real edid checksum value
987 drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n", in drm_dp_send_real_edid_checksum()
988 aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR); in drm_dp_send_real_edid_checksum()
994 drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n", in drm_dp_send_real_edid_checksum()
995 aux->name, DP_TEST_REQUEST); in drm_dp_send_real_edid_checksum()
1001 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum()
1002 aux->name); in drm_dp_send_real_edid_checksum()
1008 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1009 aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR); in drm_dp_send_real_edid_checksum()
1016 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1017 aux->name, DP_TEST_EDID_CHECKSUM); in drm_dp_send_real_edid_checksum()
1023 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1024 aux->name, DP_TEST_RESPONSE); in drm_dp_send_real_edid_checksum()
1064 return -EIO; in drm_dp_read_extended_dpcd_caps()
1067 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps()
1069 aux->name, dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]); in drm_dp_read_extended_dpcd_caps()
1076 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps()
1084 * drm_dp_read_dpcd_caps() - read DPCD caps and extended DPCD caps if
1105 return -EIO; in drm_dp_read_dpcd_caps()
1111 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps()
1118 * drm_dp_read_downstream_info() - read DPCD downstream port info if available
1158 return -EIO; in drm_dp_read_downstream_info()
1160 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info()
1167 * drm_dp_downstream_max_dotclock() - extract downstream facing port max dot clock
1195 * drm_dp_downstream_max_tmds_clock() - extract downstream facing port max TMDS clock
1228 * may not fordward that the DP dual mode i2c in drm_dp_downstream_max_tmds_clock()
1229 * access so we just usually get i2c nak :( in drm_dp_downstream_max_tmds_clock()
1260 * drm_dp_downstream_min_tmds_clock() - extract downstream facing port min TMDS clock
1303 * drm_dp_downstream_max_bpc() - extract downstream facing port max
1360 * drm_dp_downstream_420_passthrough() - determine downstream facing port
1361 * YCbCr 4:2:0 pass-through capability
1391 * drm_dp_downstream_444_to_420_conversion() - determine downstream facing port
1392 * YCbCr 4:4:4->4:2:0 conversion capability
1420 * drm_dp_downstream_rgb_to_ycbcr_conversion() - determine downstream facing port
1421 * RGB->YCbCr conversion capability
1426 * Returns: whether the downstream facing port can convert RGB->YCbCr for a given
1452 * drm_dp_downstream_mode() - return a mode for downstream facing port
1507 * drm_dp_downstream_id() - identify branch device
1520 * drm_dp_downstream_debug() - debug DP branch devices
1611 * drm_dp_subconnector_type() - get DP branch device type
1629 /* Can be HDMI or DVI-D, DVI-D is a safer option */ in drm_dp_subconnector_type()
1632 /* Can be VGA or DVI-A, VGA is more popular */ in drm_dp_subconnector_type()
1663 * drm_dp_set_subconnector_property - set subconnector for DP connector
1680 drm_object_property_set_value(&connector->base, in drm_dp_set_subconnector_property()
1681 connector->dev->mode_config.dp_subconnector_property, in drm_dp_set_subconnector_property()
1687 * drm_dp_read_sink_count_cap() - Check whether a given connector has a valid sink
1703 return connector->connector_type != DRM_MODE_CONNECTOR_eDP && in drm_dp_read_sink_count_cap()
1711 * drm_dp_read_sink_count() - Retrieve the sink count for a given sink
1728 return -EIO; in drm_dp_read_sink_count()
1735 * I2C-over-AUX implementation
1749 * In case of i2c defer or short i2c ack reply to a write, in drm_dp_i2c_msg_write_status_update()
1753 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { in drm_dp_i2c_msg_write_status_update()
1754 msg->request &= DP_AUX_I2C_MOT; in drm_dp_i2c_msg_write_status_update()
1755 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; in drm_dp_i2c_msg_write_status_update()
1776 if ((msg->request & DP_AUX_I2C_READ) == 0) in drm_dp_aux_req_duration()
1777 len += msg->size * 8; in drm_dp_aux_req_duration()
1791 if (msg->request & DP_AUX_I2C_READ) in drm_dp_aux_reply_duration()
1792 len += msg->size * 8; in drm_dp_aux_reply_duration()
1803 * Calculate the length of the i2c transfer in usec, assuming
1804 * the i2c bus speed is as specified. Gives the "worst"
1813 /* AUX bitrate is 1MHz, i2c bitrate as specified */ in drm_dp_i2c_msg_duration()
1815 msg->size * I2C_DATA_LEN + in drm_dp_i2c_msg_duration()
1822 * i2c and AUX transfers.
1841 "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
1844 * Transfer a single I2C-over-AUX message and handle various error conditions,
1860 * We also try to account for the i2c bus speed. in drm_dp_i2c_do_msg()
1865 ret = aux->transfer(aux, msg); in drm_dp_i2c_do_msg()
1867 if (ret == -EBUSY) in drm_dp_i2c_do_msg()
1873 * communicate with a non-existent DisplayPort device). in drm_dp_i2c_do_msg()
1876 if (ret == -ETIMEDOUT) in drm_dp_i2c_do_msg()
1877 drm_dbg_kms_ratelimited(aux->drm_dev, "%s: transaction timed out\n", in drm_dp_i2c_do_msg()
1878 aux->name); in drm_dp_i2c_do_msg()
1880 drm_dbg_kms(aux->drm_dev, "%s: transaction failed: %d\n", in drm_dp_i2c_do_msg()
1881 aux->name, ret); in drm_dp_i2c_do_msg()
1886 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { in drm_dp_i2c_do_msg()
1889 * For I2C-over-AUX transactions this isn't enough, we in drm_dp_i2c_do_msg()
1890 * need to check for the I2C ACK reply. in drm_dp_i2c_do_msg()
1895 drm_dbg_kms(aux->drm_dev, "%s: native nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
1896 aux->name, ret, msg->size); in drm_dp_i2c_do_msg()
1897 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1900 drm_dbg_kms(aux->drm_dev, "%s: native defer\n", aux->name); in drm_dp_i2c_do_msg()
1902 * We could check for I2C bit rate capabilities and if in drm_dp_i2c_do_msg()
1904 * more careful with DP-to-legacy adapters where a in drm_dp_i2c_do_msg()
1905 * long legacy cable may force very low I2C bit rates. in drm_dp_i2c_do_msg()
1908 * safe for all use-cases. in drm_dp_i2c_do_msg()
1914 drm_err(aux->drm_dev, "%s: invalid native reply %#04x\n", in drm_dp_i2c_do_msg()
1915 aux->name, msg->reply); in drm_dp_i2c_do_msg()
1916 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1919 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { in drm_dp_i2c_do_msg()
1922 * Both native ACK and I2C ACK replies received. We in drm_dp_i2c_do_msg()
1925 if (ret != msg->size) in drm_dp_i2c_do_msg()
1930 drm_dbg_kms(aux->drm_dev, "%s: I2C nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
1931 aux->name, ret, msg->size); in drm_dp_i2c_do_msg()
1932 aux->i2c_nack_count++; in drm_dp_i2c_do_msg()
1933 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1936 drm_dbg_kms(aux->drm_dev, "%s: I2C defer\n", aux->name); in drm_dp_i2c_do_msg()
1938 * Must have at least 7 retries for I2C defers on the in drm_dp_i2c_do_msg()
1941 aux->i2c_defer_count++; in drm_dp_i2c_do_msg()
1950 drm_err(aux->drm_dev, "%s: invalid I2C reply %#04x\n", in drm_dp_i2c_do_msg()
1951 aux->name, msg->reply); in drm_dp_i2c_do_msg()
1952 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1956 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up\n", aux->name); in drm_dp_i2c_do_msg()
1957 return -EREMOTEIO; in drm_dp_i2c_do_msg()
1963 msg->request = (i2c_msg->flags & I2C_M_RD) ? in drm_dp_i2c_msg_set_request()
1965 if (!(i2c_msg->flags & I2C_M_STOP)) in drm_dp_i2c_msg_set_request()
1966 msg->request |= DP_AUX_I2C_MOT; in drm_dp_i2c_msg_set_request()
1976 int err, ret = orig_msg->size; in drm_dp_i2c_drain_msg()
1982 return err == 0 ? -EPROTO : err; in drm_dp_i2c_drain_msg()
1985 drm_dbg_kms(aux->drm_dev, in drm_dp_i2c_drain_msg()
1986 "%s: Partial I2C reply: requested %zu bytes got %d bytes\n", in drm_dp_i2c_drain_msg()
1987 aux->name, msg.size, err); in drm_dp_i2c_drain_msg()
1991 msg.size -= err; in drm_dp_i2c_drain_msg()
1999 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
2000 * packets to be as large as possible. If not, the I2C transactions never
2006 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
2011 struct drm_dp_aux *aux = adapter->algo_data; in drm_dp_i2c_xfer()
2017 if (aux->powered_down) in drm_dp_i2c_xfer()
2018 return -EBUSY; in drm_dp_i2c_xfer()
2050 msg.size = min(transfer_size, msgs[i].len - j); in drm_dp_i2c_xfer()
2086 static struct drm_dp_aux *i2c_to_aux(struct i2c_adapter *i2c) in i2c_to_aux() argument
2088 return container_of(i2c, struct drm_dp_aux, ddc); in i2c_to_aux()
2091 static void lock_bus(struct i2c_adapter *i2c, unsigned int flags) in lock_bus() argument
2093 mutex_lock(&i2c_to_aux(i2c)->hw_mutex); in lock_bus()
2096 static int trylock_bus(struct i2c_adapter *i2c, unsigned int flags) in trylock_bus() argument
2098 return mutex_trylock(&i2c_to_aux(i2c)->hw_mutex); in trylock_bus()
2101 static void unlock_bus(struct i2c_adapter *i2c, unsigned int flags) in unlock_bus() argument
2103 mutex_unlock(&i2c_to_aux(i2c)->hw_mutex); in unlock_bus()
2128 if (count == aux->crc_count) in drm_dp_aux_get_crc()
2129 return -EAGAIN; /* No CRC yet */ in drm_dp_aux_get_crc()
2131 aux->crc_count = count; in drm_dp_aux_get_crc()
2153 if (WARN_ON(!aux->crtc)) in drm_dp_aux_crc_work()
2156 crtc = aux->crtc; in drm_dp_aux_crc_work()
2157 while (crtc->crc.opened) { in drm_dp_aux_crc_work()
2159 if (!crtc->crc.opened) in drm_dp_aux_crc_work()
2163 if (ret == -EAGAIN) { in drm_dp_aux_crc_work()
2168 if (ret == -EAGAIN) { in drm_dp_aux_crc_work()
2169 drm_dbg_kms(aux->drm_dev, "%s: Get CRC failed after retrying: %d\n", in drm_dp_aux_crc_work()
2170 aux->name, ret); in drm_dp_aux_crc_work()
2173 drm_dbg_kms(aux->drm_dev, "%s: Failed to get a CRC: %d\n", aux->name, ret); in drm_dp_aux_crc_work()
2185 * drm_dp_remote_aux_init() - minimally initialise a remote aux channel
2193 INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); in drm_dp_remote_aux_init()
2198 * drm_dp_aux_init() - minimally initialise an aux channel
2201 * If you need to use the drm_dp_aux's i2c adapter prior to registering it with
2216 mutex_init(&aux->hw_mutex); in drm_dp_aux_init()
2217 mutex_init(&aux->cec.lock); in drm_dp_aux_init()
2218 INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); in drm_dp_aux_init()
2220 aux->ddc.algo = &drm_dp_i2c_algo; in drm_dp_aux_init()
2221 aux->ddc.algo_data = aux; in drm_dp_aux_init()
2222 aux->ddc.retries = 3; in drm_dp_aux_init()
2224 aux->ddc.lock_ops = &drm_dp_i2c_lock_ops; in drm_dp_aux_init()
2229 * drm_dp_aux_register() - initialise and register aux channel
2259 WARN_ON_ONCE(!aux->drm_dev); in drm_dp_aux_register()
2261 if (!aux->ddc.algo) in drm_dp_aux_register()
2264 aux->ddc.owner = THIS_MODULE; in drm_dp_aux_register()
2265 aux->ddc.dev.parent = aux->dev; in drm_dp_aux_register()
2267 strscpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), in drm_dp_aux_register()
2268 sizeof(aux->ddc.name)); in drm_dp_aux_register()
2274 ret = i2c_add_adapter(&aux->ddc); in drm_dp_aux_register()
2285 * drm_dp_aux_unregister() - unregister an AUX adapter
2291 i2c_del_adapter(&aux->ddc); in drm_dp_aux_unregister()
2298 * drm_dp_psr_setup_time() - PSR setup in time usec
2320 return -EINVAL; in drm_dp_psr_setup_time()
2329 * drm_dp_start_crc() - start capture of frame CRCs
2348 aux->crc_count = 0; in drm_dp_start_crc()
2349 aux->crtc = crtc; in drm_dp_start_crc()
2350 schedule_work(&aux->crc_work); in drm_dp_start_crc()
2357 * drm_dp_stop_crc() - stop capture of frame CRCs
2375 flush_work(&aux->crc_work); in drm_dp_stop_crc()
2376 aux->crtc = NULL; in drm_dp_stop_crc()
2398 /* LG LP140WF6-SPM1 eDP panel */
2435 if (quirk->is_branch != is_branch) in drm_dp_get_quirks()
2438 if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0) in drm_dp_get_quirks()
2441 if (memcmp(quirk->device_id, any_device, sizeof(any_device)) != 0 && in drm_dp_get_quirks()
2442 memcmp(quirk->device_id, ident->device_id, sizeof(ident->device_id)) != 0) in drm_dp_get_quirks()
2445 quirks |= quirk->quirks; in drm_dp_get_quirks()
2467 const struct drm_dp_dpcd_ident *ident = &desc->ident; in drm_dp_dump_desc()
2469 drm_dbg_kms(aux->drm_dev, in drm_dp_dump_desc()
2470 "%s: %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n", in drm_dp_dump_desc()
2471 aux->name, device_name, in drm_dp_dump_desc()
2472 (int)sizeof(ident->oui), ident->oui, in drm_dp_dump_desc()
2473 (int)strnlen(ident->device_id, sizeof(ident->device_id)), ident->device_id, in drm_dp_dump_desc()
2474 ident->hw_rev >> 4, ident->hw_rev & 0xf, in drm_dp_dump_desc()
2475 ident->sw_major_rev, ident->sw_minor_rev, in drm_dp_dump_desc()
2476 desc->quirks); in drm_dp_dump_desc()
2480 * drm_dp_read_desc - read sink/branch descriptor from DPCD
2493 struct drm_dp_dpcd_ident *ident = &desc->ident; in drm_dp_read_desc()
2501 desc->quirks = drm_dp_get_quirks(ident, is_branch); in drm_dp_read_desc()
2510 * drm_dp_dump_lttpr_desc - read and dump the DPCD descriptor for an LTTPR PHY
2524 if (drm_WARN_ON(aux->drm_dev, dp_phy < DP_PHY_LTTPR1 || dp_phy > DP_MAX_LTTPR_COUNT)) in drm_dp_dump_lttpr_desc()
2525 return -EINVAL; in drm_dp_dump_lttpr_desc()
2538 * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
2545 u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_bpp_incr()
2565 * drm_dp_dsc_sink_max_slice_count() - Get the max slice count
2583 u8 slice_cap1 = dsc_dpcd[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_max_slice_count()
2595 u8 slice_cap2 = dsc_dpcd[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_max_slice_count()
2624 * drm_dp_dsc_sink_line_buf_depth() - Get the line buffer depth in bits
2640 u8 line_buf_depth = dsc_dpcd[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_line_buf_depth()
2668 * drm_dp_dsc_sink_supported_input_bpcs() - Get all the input bits per component
2688 u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_supported_input_bpcs()
2711 * corrupted values when reading from the 0xF0000- range with a block in drm_dp_read_lttpr_regs()
2732 * drm_dp_read_lttpr_common_caps - read the LTTPR common capabilities
2752 * drm_dp_read_lttpr_phy_caps - read the capabilities for a given LTTPR PHY
2775 return caps[r - DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]; in dp_lttpr_common_cap()
2779 * drm_dp_lttpr_count - get the number of detected LTTPRs
2785 * -ERANGE if more than supported number (8) of LTTPRs are detected
2786 * -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value
2797 return 8 - ilog2(count); in drm_dp_lttpr_count()
2799 return -ERANGE; in drm_dp_lttpr_count()
2801 return -EINVAL; in drm_dp_lttpr_count()
2807 * drm_dp_lttpr_max_link_rate - get the maximum link rate supported by all LTTPRs
2821 * drm_dp_lttpr_max_lane_count - get the maximum lane count supported by all LTTPRs
2835 * drm_dp_lttpr_voltage_swing_level_3_supported - check for LTTPR vswing3 support
2851 * drm_dp_lttpr_pre_emphasis_level_3_supported - check for LTTPR preemph3 support
2855 * pre-emphasis level 3.
2867 * drm_dp_get_phy_test_pattern() - get the requested pattern from the sink.
2882 data->link_rate = drm_dp_bw_code_to_link_rate(rate); in drm_dp_get_phy_test_pattern()
2887 data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK; in drm_dp_get_phy_test_pattern()
2890 data->enhanced_frame_cap = true; in drm_dp_get_phy_test_pattern()
2892 err = drm_dp_dpcd_readb(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern); in drm_dp_get_phy_test_pattern()
2896 switch (data->phy_pattern) { in drm_dp_get_phy_test_pattern()
2899 &data->custom80, sizeof(data->custom80)); in drm_dp_get_phy_test_pattern()
2906 &data->hbr2_reset, in drm_dp_get_phy_test_pattern()
2907 sizeof(data->hbr2_reset)); in drm_dp_get_phy_test_pattern()
2917 * drm_dp_set_phy_test_pattern() - set the pattern to the sink.
2930 test_pattern = data->phy_pattern; in drm_dp_set_phy_test_pattern()
2939 for (i = 0; i < data->num_lanes; i++) { in drm_dp_set_phy_test_pattern()
3033 return "DCI-P3"; in dp_colorimetry_get_name()
3110 vsc->revision, vsc->length); in drm_dp_vsc_sdp_log()
3112 dp_pixelformat_get_name(vsc->pixelformat)); in drm_dp_vsc_sdp_log()
3114 dp_colorimetry_get_name(vsc->pixelformat, vsc->colorimetry)); in drm_dp_vsc_sdp_log()
3115 drm_printf(p, " bpc: %u\n", vsc->bpc); in drm_dp_vsc_sdp_log()
3117 dp_dynamic_range_get_name(vsc->dynamic_range)); in drm_dp_vsc_sdp_log()
3119 dp_content_type_get_name(vsc->content_type)); in drm_dp_vsc_sdp_log()
3126 as_sdp->revision, as_sdp->length); in drm_dp_as_sdp_log()
3127 drm_printf(p, " vtotal: %d\n", as_sdp->vtotal); in drm_dp_as_sdp_log()
3128 drm_printf(p, " target_rr: %d\n", as_sdp->target_rr); in drm_dp_as_sdp_log()
3129 drm_printf(p, " duration_incr_ms: %d\n", as_sdp->duration_incr_ms); in drm_dp_as_sdp_log()
3130 drm_printf(p, " duration_decr_ms: %d\n", as_sdp->duration_decr_ms); in drm_dp_as_sdp_log()
3131 drm_printf(p, " operation_mode: %d\n", as_sdp->mode); in drm_dp_as_sdp_log()
3136 * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported
3151 drm_dbg_dp(aux->drm_dev, in drm_dp_as_sdp_supported()
3161 * drm_dp_vsc_sdp_supported() - check if vsc sdp is supported
3175 drm_dbg_dp(aux->drm_dev, "failed to read DP_DPRX_FEATURE_ENUMERATION_LIST\n"); in drm_dp_vsc_sdp_supported()
3184 * drm_dp_vsc_sdp_pack() - pack a given vsc sdp into generic dp_sdp
3186 * table 2-118 - table 2-120 in DP 1.4a specification
3199 * Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 in drm_dp_vsc_sdp_pack()
3202 sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */ in drm_dp_vsc_sdp_pack()
3203 sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet Type */ in drm_dp_vsc_sdp_pack()
3204 sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */ in drm_dp_vsc_sdp_pack()
3205 sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */ in drm_dp_vsc_sdp_pack()
3207 if (vsc->revision == 0x6) { in drm_dp_vsc_sdp_pack()
3208 sdp->db[0] = 1; in drm_dp_vsc_sdp_pack()
3209 sdp->db[3] = 1; in drm_dp_vsc_sdp_pack()
3216 if (!(vsc->revision == 0x5 || vsc->revision == 0x7)) in drm_dp_vsc_sdp_pack()
3221 sdp->db[16] = (vsc->pixelformat & 0xf) << 4; /* DB16[7:4] */ in drm_dp_vsc_sdp_pack()
3222 sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */ in drm_dp_vsc_sdp_pack()
3224 switch (vsc->bpc) { in drm_dp_vsc_sdp_pack()
3229 sdp->db[17] = 0x1; /* DB17[3:0] */ in drm_dp_vsc_sdp_pack()
3232 sdp->db[17] = 0x2; in drm_dp_vsc_sdp_pack()
3235 sdp->db[17] = 0x3; in drm_dp_vsc_sdp_pack()
3238 sdp->db[17] = 0x4; in drm_dp_vsc_sdp_pack()
3241 WARN(1, "Missing case %d\n", vsc->bpc); in drm_dp_vsc_sdp_pack()
3242 return -EINVAL; in drm_dp_vsc_sdp_pack()
3246 if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA) in drm_dp_vsc_sdp_pack()
3247 sdp->db[17] |= 0x80; /* DB17[7] */ in drm_dp_vsc_sdp_pack()
3250 sdp->db[18] = vsc->content_type & 0x7; in drm_dp_vsc_sdp_pack()
3258 * drm_dp_get_pcon_max_frl_bw() - maximum frl supported by PCON
3297 * drm_dp_pcon_frl_prepare() - Prepare PCON for FRL.
3319 * drm_dp_pcon_is_frl_ready() - Is PCON ready for FRL
3341 * drm_dp_pcon_frl_configure_1() - Set HDMI LINK Configuration-Step1
3390 return -EINVAL; in drm_dp_pcon_frl_configure_1()
3402 * drm_dp_pcon_frl_configure_2() - Set HDMI Link configuration Step-2
3432 * drm_dp_pcon_reset_frl_config() - Re-Set HDMI Link configuration.
3450 * drm_dp_pcon_frl_enable() - Enable HDMI link through FRL
3464 drm_dbg_kms(aux->drm_dev, "%s: PCON in Autonomous mode, can't enable FRL\n", in drm_dp_pcon_frl_enable()
3465 aux->name); in drm_dp_pcon_frl_enable()
3466 return -EINVAL; in drm_dp_pcon_frl_enable()
3478 * drm_dp_pcon_hdmi_link_active() - check if the PCON HDMI LINK status is active.
3497 * drm_dp_pcon_hdmi_link_mode() - get the PCON HDMI LINK MODE
3527 * drm_dp_pcon_hdmi_frl_link_error_count() - print the error count per lane
3539 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_dp_pcon_hdmi_frl_link_error_count()
3541 for (i = 0; i < hdmi->max_lanes; i++) { in drm_dp_pcon_hdmi_frl_link_error_count()
3560 drm_err(aux->drm_dev, "%s: More than %d errors since the last read for lane %d", in drm_dp_pcon_hdmi_frl_link_error_count()
3561 aux->name, num_error, i); in drm_dp_pcon_hdmi_frl_link_error_count()
3567 * drm_dp_pcon_enc_is_dsc_1_2 - Does PCON Encoder supports DSC 1.2
3577 buf = pcon_dsc_dpcd[DP_PCON_DSC_VERSION - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_enc_is_dsc_1_2()
3589 * drm_dp_pcon_dsc_max_slices - Get max slices supported by PCON DSC Encoder
3598 slice_cap1 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_1 - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slices()
3599 slice_cap2 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_2 - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slices()
3627 * drm_dp_pcon_dsc_max_slice_width() - Get max slice width for Pcon DSC encoder
3636 buf = pcon_dsc_dpcd[DP_PCON_DSC_MAX_SLICE_WIDTH - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slice_width()
3643 * drm_dp_pcon_dsc_bpp_incr() - Get bits per pixel increment for PCON DSC encoder
3652 buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_bpp_incr()
3696 * drm_dp_pcon_pps_default() - Let PCON fill the default pps parameters
3715 * drm_dp_pcon_pps_override_buf() - Configure PPS encoder override buffer for
3739 * drm_dp_pcon_pps_override_param() - Write PPS parameters to DSC encoder
3770 * drm_dp_pcon_convert_rgb_to_ycbcr() - Configure the PCon to convert RGB to Ycbcr
3772 * @color_spc: Color-space/s for which conversion is to be enabled, 0 for disable.
3799 * drm_edp_backlight_set_level() - Set the backlight level of an eDP panel via AUX
3816 if (!bl->aux_set) in drm_edp_backlight_set_level()
3819 if (bl->lsb_reg_used) { in drm_edp_backlight_set_level()
3828 drm_err(aux->drm_dev, in drm_edp_backlight_set_level()
3830 aux->name, ret); in drm_edp_backlight_set_level()
3831 return ret < 0 ? ret : -EIO; in drm_edp_backlight_set_level()
3846 if (!bl->aux_enable) in drm_edp_backlight_set_enable()
3851 drm_err(aux->drm_dev, "%s: Failed to read eDP display control register: %d\n", in drm_edp_backlight_set_enable()
3852 aux->name, ret); in drm_edp_backlight_set_enable()
3853 return ret < 0 ? ret : -EIO; in drm_edp_backlight_set_enable()
3862 drm_err(aux->drm_dev, "%s: Failed to write eDP display control register: %d\n", in drm_edp_backlight_set_enable()
3863 aux->name, ret); in drm_edp_backlight_set_enable()
3864 return ret < 0 ? ret : -EIO; in drm_edp_backlight_set_enable()
3871 * drm_edp_backlight_enable() - Enable an eDP panel's backlight using DPCD
3881 * that the driver handle enabling/disabling the panel through implementation-specific means using
3883 * this function becomes a no-op, and the driver is expected to handle powering the panel on using
3894 if (bl->aux_set) in drm_edp_backlight_enable()
3899 if (bl->pwmgen_bit_count) { in drm_edp_backlight_enable()
3900 ret = drm_dp_dpcd_writeb(aux, DP_EDP_PWMGEN_BIT_COUNT, bl->pwmgen_bit_count); in drm_edp_backlight_enable()
3902 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", in drm_edp_backlight_enable()
3903 aux->name, ret); in drm_edp_backlight_enable()
3906 if (bl->pwm_freq_pre_divider) { in drm_edp_backlight_enable()
3907 ret = drm_dp_dpcd_writeb(aux, DP_EDP_BACKLIGHT_FREQ_SET, bl->pwm_freq_pre_divider); in drm_edp_backlight_enable()
3909 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_enable()
3911 aux->name, ret); in drm_edp_backlight_enable()
3918 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux backlight mode: %d\n", in drm_edp_backlight_enable()
3919 aux->name, ret); in drm_edp_backlight_enable()
3920 return ret < 0 ? ret : -EIO; in drm_edp_backlight_enable()
3935 * drm_edp_backlight_disable() - Disable an eDP backlight using DPCD, if supported
3942 * that the driver handle enabling/disabling the panel through implementation-specific means using
3944 * this function becomes a no-op, and the driver is expected to handle powering the panel off using
3947 * Returns: %0 on success or no-op, negative error code on failure.
3969 if (!bl->aux_set) in drm_edp_backlight_probe_max()
3974 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap: %d\n", in drm_edp_backlight_probe_max()
3975 aux->name, ret); in drm_edp_backlight_probe_max()
3976 return -ENODEV; in drm_edp_backlight_probe_max()
3980 bl->max = (1 << pn) - 1; in drm_edp_backlight_probe_max()
3987 * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the in drm_edp_backlight_probe_max()
3989 * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the in drm_edp_backlight_probe_max()
4001 * - Pn is in the range of Pn_min and Pn_max in drm_edp_backlight_probe_max()
4002 * - F is in the range of 1 and 255 in drm_edp_backlight_probe_max()
4003 * - FxP is within 25% of desired value. in drm_edp_backlight_probe_max()
4008 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap min: %d\n", in drm_edp_backlight_probe_max()
4009 aux->name, ret); in drm_edp_backlight_probe_max()
4014 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap max: %d\n", in drm_edp_backlight_probe_max()
4015 aux->name, ret); in drm_edp_backlight_probe_max()
4025 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_probe_max()
4027 aux->name, driver_pwm_freq_hz); in drm_edp_backlight_probe_max()
4031 for (pn = pn_max; pn >= pn_min; pn--) { in drm_edp_backlight_probe_max()
4040 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", in drm_edp_backlight_probe_max()
4041 aux->name, ret); in drm_edp_backlight_probe_max()
4044 bl->pwmgen_bit_count = pn; in drm_edp_backlight_probe_max()
4045 bl->max = (1 << pn) - 1; in drm_edp_backlight_probe_max()
4048 bl->pwm_freq_pre_divider = f; in drm_edp_backlight_probe_max()
4049 drm_dbg_kms(aux->drm_dev, "%s: Using backlight frequency from driver (%dHz)\n", in drm_edp_backlight_probe_max()
4050 aux->name, driver_pwm_freq_hz); in drm_edp_backlight_probe_max()
4066 drm_dbg_kms(aux->drm_dev, "%s: Failed to read backlight mode: %d\n", in drm_edp_backlight_probe_state()
4067 aux->name, ret); in drm_edp_backlight_probe_state()
4068 return ret < 0 ? ret : -EIO; in drm_edp_backlight_probe_state()
4072 if (!bl->aux_set) in drm_edp_backlight_probe_state()
4076 int size = 1 + bl->lsb_reg_used; in drm_edp_backlight_probe_state()
4080 drm_dbg_kms(aux->drm_dev, "%s: Failed to read backlight level: %d\n", in drm_edp_backlight_probe_state()
4081 aux->name, ret); in drm_edp_backlight_probe_state()
4082 return ret < 0 ? ret : -EIO; in drm_edp_backlight_probe_state()
4085 if (bl->lsb_reg_used) in drm_edp_backlight_probe_state()
4095 return bl->max; in drm_edp_backlight_probe_state()
4099 * drm_edp_backlight_init() - Probe a display panel's TCON using the standard VESA eDP backlight
4111 * If @driver_pwm_freq_hz is non-zero, this will be used as the backlight frequency. Otherwise, the
4124 bl->aux_enable = true; in drm_edp_backlight_init()
4126 bl->aux_set = true; in drm_edp_backlight_init()
4128 bl->lsb_reg_used = true; in drm_edp_backlight_init()
4131 if (!bl->aux_set && !(edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP)) { in drm_edp_backlight_init()
4132 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4134 aux->name); in drm_edp_backlight_init()
4135 return -EINVAL; in drm_edp_backlight_init()
4147 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4149 aux->name, bl->aux_set, bl->aux_enable, *current_mode); in drm_edp_backlight_init()
4150 if (bl->aux_set) { in drm_edp_backlight_init()
4151 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4153 aux->name, *current_level, bl->max, bl->pwm_freq_pre_divider, in drm_edp_backlight_init()
4154 bl->lsb_reg_used); in drm_edp_backlight_init()
4171 if (!bl->enabled) { in dp_aux_backlight_update_status()
4172 drm_edp_backlight_enable(bl->aux, &bl->info, brightness); in dp_aux_backlight_update_status()
4173 bl->enabled = true; in dp_aux_backlight_update_status()
4176 ret = drm_edp_backlight_set_level(bl->aux, &bl->info, brightness); in dp_aux_backlight_update_status()
4178 if (bl->enabled) { in dp_aux_backlight_update_status()
4179 drm_edp_backlight_disable(bl->aux, &bl->info); in dp_aux_backlight_update_status()
4180 bl->enabled = false; in dp_aux_backlight_update_status()
4192 * drm_panel_dp_aux_backlight - create and use DP AUX backlight
4224 if (!panel || !panel->dev || !aux) in drm_panel_dp_aux_backlight()
4225 return -EINVAL; in drm_panel_dp_aux_backlight()
4233 DRM_DEV_INFO(panel->dev, "DP AUX backlight is not supported\n"); in drm_panel_dp_aux_backlight()
4237 bl = devm_kzalloc(panel->dev, sizeof(*bl), GFP_KERNEL); in drm_panel_dp_aux_backlight()
4239 return -ENOMEM; in drm_panel_dp_aux_backlight()
4241 bl->aux = aux; in drm_panel_dp_aux_backlight()
4243 ret = drm_edp_backlight_init(aux, &bl->info, 0, edp_dpcd, in drm_panel_dp_aux_backlight()
4250 props.max_brightness = bl->info.max; in drm_panel_dp_aux_backlight()
4252 bl->base = devm_backlight_device_register(panel->dev, "dp_aux_backlight", in drm_panel_dp_aux_backlight()
4253 panel->dev, bl, in drm_panel_dp_aux_backlight()
4255 if (IS_ERR(bl->base)) in drm_panel_dp_aux_backlight()
4256 return PTR_ERR(bl->base); in drm_panel_dp_aux_backlight()
4258 backlight_disable(bl->base); in drm_panel_dp_aux_backlight()
4260 panel->backlight = bl->base; in drm_panel_dp_aux_backlight()
4290 * drm_dp_bw_overhead - Calculate the BW overhead of a DP link stream
4299 * - @lane_count
4300 * - SST/MST mode (@flags / %DRM_DP_OVERHEAD_MST)
4301 * - symbol size (@flags / %DRM_DP_OVERHEAD_UHBR)
4302 * - FEC mode (@flags / %DRM_DP_OVERHEAD_FEC)
4303 * - SSC/REF_CLK mode (@flags / %DRM_DP_OVERHEAD_SSC_REF_CLK)
4305 * - @hactive timing
4306 * - @bpp_x16 color depth
4307 * - compression mode (@flags / %DRM_DP_OVERHEAD_DSC).
4341 * After each 250 data symbols on 2-4 lanes: in drm_dp_bw_overhead()
4345 * After 256 (2-4 lanes) or 128 (1 lane) FEC blocks: in drm_dp_bw_overhead()
4379 * drm_dp_bw_channel_coding_efficiency - Get a DP link's channel coding efficiency
4384 * the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead
4390 * Returns the efficiency in the 100%/coding-overhead% ratio in
4408 * drm_dp_max_dprx_data_rate - Get the max data bandwidth of a DPRX sink
4420 * the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels -
4421 * which in turn can encapsulate an MST link with its own limit - with each
4422 * SST or MST encapsulated tunnel sharing the BW of a tunnel group.