Lines Matching +full:a +full:- +full:facing
78 return link_status[r - DP_LANE0_1_STATUS]; in dp_link_status()
232 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
233 aux->name, rd_interval); in __8b10b_clock_recovery_delay_us()
244 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
245 aux->name, rd_interval); in __8b10b_channel_eq_delay_us()
257 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
258 aux->name, rd_interval); in __128b132b_channel_eq_delay_us()
280 * - Clock recovery vs. channel equalization
281 * - DPRX vs. LTTPR
282 * - 128b/132b vs. 8b/10b
283 * - DPCD rev 1.3 vs. later
332 drm_dbg_kms(aux->drm_dev, "%s: failed rd interval read\n", in __read_delay()
333 aux->name); in __read_delay()
363 drm_err(aux->drm_dev, "%s: failed rd interval read\n", in drm_dp_128b132b_read_aux_rd_interval()
364 aux->name); in drm_dp_128b132b_read_aux_rd_interval()
410 * drm_dp_phy_name() - Get the name of the given DP PHY
413 * Given the @dp_phy, get a user friendly name of the DP PHY, either "DPRX" or
415 * non-NULL and valid.
449 return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1]; in dp_lttpr_phy_cap()
464 * drm_dp_lttpr_wake_timeout_setup() - Grant extended time for sink to wake up
472 * a default of 1ms before they throw an error.
491 drm_dbg_kms(aux->drm_dev, in drm_dp_lttpr_wake_timeout_setup()
506 drm_dbg_kms(aux->drm_dev, in drm_dp_lttpr_wake_timeout_setup()
559 const char *arrow = request == DP_AUX_NATIVE_READ ? "->" : "<-"; in drm_dp_dump_access()
562 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d) %*ph\n", in drm_dp_dump_access()
563 aux->name, offset, arrow, ret, min(ret, 20), buffer); in drm_dp_dump_access()
565 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d)\n", in drm_dp_dump_access()
566 aux->name, offset, arrow, ret); in drm_dp_dump_access()
572 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
576 * Transactions are described using a hardware-independent drm_dp_aux_msg
577 * structure, which is passed into a driver's .transfer() implementation.
578 * Both native and I2C-over-AUX transactions are supported.
594 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_access()
598 * no reason to attempt a transfer. Error out immediately. in drm_dp_dpcd_access()
600 if (aux->powered_down) { in drm_dp_dpcd_access()
601 ret = -EBUSY; in drm_dp_dpcd_access()
612 if (ret != 0 && ret != -ETIMEDOUT) { in drm_dp_dpcd_access()
617 ret = aux->transfer(aux, &msg); in drm_dp_dpcd_access()
624 ret = -EPROTO; in drm_dp_dpcd_access()
626 ret = -EIO; in drm_dp_dpcd_access()
631 * the first transaction, since we may get a different error the in drm_dp_dpcd_access()
638 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access()
639 aux->name, err); in drm_dp_dpcd_access()
643 mutex_unlock(&aux->hw_mutex); in drm_dp_dpcd_access()
648 * drm_dp_dpcd_probe() - probe a given DPCD address with a 1-byte read access
653 * be used to trigger some side-effect the read access has, like waking up the
654 * sink, without the need for the read-out value.
656 * Returns 0 if the read access suceeded, or a negative error code on failure.
673 * drm_dp_dpcd_set_powered() - Set whether the DP device is powered
675 * and the function will be a no-op.
682 * If this function is never called then a device defaults to being powered.
689 mutex_lock(&aux->hw_mutex); in drm_dp_dpcd_set_powered()
690 aux->powered_down = !powered; in drm_dp_dpcd_set_powered()
691 mutex_unlock(&aux->hw_mutex); in drm_dp_dpcd_set_powered()
696 * drm_dp_dpcd_set_probe() - Set whether a probing before DPCD access is done
702 WRITE_ONCE(aux->dpcd_probe_disabled, !enable); in drm_dp_dpcd_set_probe()
710 * mode. Eg. on a read, the entire buffer will be filled with the same in dpcd_access_needs_probe()
711 * byte. Do a throw away read to avoid corrupting anything we care in dpcd_access_needs_probe()
713 * gets woken up and subsequently re-enters power save mode. in dpcd_access_needs_probe()
720 return !aux->is_remote && !READ_ONCE(aux->dpcd_probe_disabled); in dpcd_access_needs_probe()
724 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
730 * Returns the number of bytes transferred on success, or a negative error
731 * code on failure. -EIO is returned if the request was NAKed by the sink or
733 * function returns -EPROTO. Errors from the underlying AUX channel transfer
734 * function, with the exception of -EBUSY (which causes the transaction to
750 if (aux->is_remote) in drm_dp_dpcd_read()
762 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
768 * Returns the number of bytes transferred on success, or a negative error
769 * code on failure. -EIO is returned if the request was NAKed by the sink or
771 * function returns -EPROTO. Errors from the underlying AUX channel transfer
772 * function, with the exception of -EBUSY (which causes the transaction to
782 if (aux->is_remote) in drm_dp_dpcd_write()
794 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
798 * Returns a negative error code on failure or 0 on success.
809 * drm_dp_dpcd_read_phy_link_status - get the link status information for a DP PHY
818 * Returns 0 if the information was read successfully or a negative error code
836 DP_LINK_STATUS_SIZE - 1); in drm_dp_dpcd_read_phy_link_status()
842 memmove(&link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS + 1], in drm_dp_dpcd_read_phy_link_status()
843 &link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS], in drm_dp_dpcd_read_phy_link_status()
844 DP_LINK_STATUS_SIZE - (DP_SINK_STATUS - DP_LANE0_1_STATUS) - 1); in drm_dp_dpcd_read_phy_link_status()
845 link_status[DP_SINK_STATUS - DP_LANE0_1_STATUS] = 0; in drm_dp_dpcd_read_phy_link_status()
852 * drm_dp_link_power_up() - power up a DisplayPort link
856 * Returns 0 on success or a negative error code on failure.
879 * According to the DP 1.1 specification, a "Sink Device must exit the in drm_dp_link_power_up()
880 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink in drm_dp_link_power_up()
890 * drm_dp_link_power_down() - power down a DisplayPort link
894 * Returns 0 on success or a negative error code on failure.
933 * drm_dp_dpcd_write_payload() - Write Virtual Channel information to payload table
961 drm_dbg_kms(aux->drm_dev, "failed to write payload allocation %d\n", ret); in drm_dp_dpcd_write_payload()
968 drm_dbg_kms(aux->drm_dev, "failed to read payload table status %d\n", ret); in drm_dp_dpcd_write_payload()
978 drm_dbg_kms(aux->drm_dev, "status not set after read payload table status %d\n", in drm_dp_dpcd_write_payload()
980 ret = -EINVAL; in drm_dp_dpcd_write_payload()
990 * drm_dp_dpcd_clear_payload() - Clear the entire VC Payload ID table
1004 * drm_dp_dpcd_poll_act_handled() - Poll for ACT handled status
1026 drm_err(aux->drm_dev, "Failed to get ACT after %d ms, last status: %02x\n", in drm_dp_dpcd_poll_act_handled()
1028 return -EINVAL; in drm_dp_dpcd_poll_act_handled()
1031 * Failure here isn't unexpected - the hub may have in drm_dp_dpcd_poll_act_handled()
1034 drm_dbg_kms(aux->drm_dev, "Failed to read payload table status: %d\n", status); in drm_dp_dpcd_poll_act_handled()
1047 return edid && edid->revision >= 4 && in is_edid_digital_input_dp()
1048 edid->input & DRM_EDID_INPUT_DIGITAL && in is_edid_digital_input_dp()
1049 (edid->input & DRM_EDID_DIGITAL_TYPE_MASK) == DRM_EDID_DIGITAL_TYPE_DP; in is_edid_digital_input_dp()
1053 * drm_dp_downstream_is_type() - is the downstream facing port of certain type?
1063 * Returns: whether the downstream facing port matches the type.
1075 * drm_dp_downstream_is_tmds() - is the downstream facing port TMDS?
1080 * Returns: whether the downstream facing port is TMDS (HDMI/DVI).
1110 * drm_dp_send_real_edid_checksum() - send back real edid checksum value
1124 drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1125 aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR); in drm_dp_send_real_edid_checksum()
1131 drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1132 aux->name, DP_TEST_REQUEST); in drm_dp_send_real_edid_checksum()
1138 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum()
1139 aux->name); in drm_dp_send_real_edid_checksum()
1145 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1146 aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR); in drm_dp_send_real_edid_checksum()
1153 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1154 aux->name, DP_TEST_EDID_CHECKSUM); in drm_dp_send_real_edid_checksum()
1160 drm_err(aux->drm_dev, "%s: DPCD failed write at register 0x%x\n", in drm_dp_send_real_edid_checksum()
1161 aux->name, DP_TEST_RESPONSE); in drm_dp_send_real_edid_checksum()
1188 * If it is set DP_DPCD_REV at 0000h could be at a value less than in drm_dp_read_extended_dpcd_caps()
1202 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps()
1204 aux->name, dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]); in drm_dp_read_extended_dpcd_caps()
1211 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps()
1219 * drm_dp_read_dpcd_caps() - read DPCD caps and extended DPCD caps if
1240 return -EIO; in drm_dp_read_dpcd_caps()
1246 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps()
1253 * drm_dp_read_downstream_info() - read DPCD downstream port info if available
1255 * @dpcd: A cached copy of the port's DPCD
1263 * there was no downstream info to read, or a negative error code otherwise.
1278 /* Some branches advertise having 0 downstream ports, despite also advertising they have a in drm_dp_read_downstream_info()
1293 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info()
1300 * drm_dp_downstream_max_dotclock() - extract downstream facing port max dot clock
1304 * Returns: Downstream facing port max dot clock in kHz on success,
1328 * drm_dp_downstream_max_tmds_clock() - extract downstream facing port max TMDS clock
1333 * Returns: HDMI/DVI downstream facing port max TMDS clock in kHz on success,
1375 * info. So it's more likely we're dealing with a HDMI 1.4 in drm_dp_downstream_max_tmds_clock()
1393 * drm_dp_downstream_min_tmds_clock() - extract downstream facing port min TMDS clock
1398 * Returns: HDMI/DVI downstream facing port min TMDS clock in kHz on success,
1436 * drm_dp_downstream_max_bpc() - extract downstream facing port max
1439 * @port_cap: downstream facing port capabilities
1493 * drm_dp_downstream_420_passthrough() - determine downstream facing port
1494 * YCbCr 4:2:0 pass-through capability
1496 * @port_cap: downstream facing port capabilities
1498 * Returns: whether the downstream facing port can pass through YCbCr 4:2:0
1524 * drm_dp_downstream_444_to_420_conversion() - determine downstream facing port
1525 * YCbCr 4:4:4->4:2:0 conversion capability
1527 * @port_cap: downstream facing port capabilities
1529 * Returns: whether the downstream facing port can convert YCbCr 4:4:4 to 4:2:0
1553 * drm_dp_downstream_rgb_to_ycbcr_conversion() - determine downstream facing port
1554 * RGB->YCbCr conversion capability
1556 * @port_cap: downstream facing port capabilities
1559 * Returns: whether the downstream facing port can convert RGB->YCbCr for a given
1585 * drm_dp_downstream_mode() - return a mode for downstream facing port
1590 * Provides a suitable mode for downstream facing ports without EDID.
1592 * Returns: A new drm_display_mode on success or NULL on failure
1640 * drm_dp_downstream_id() - identify branch device
1653 * drm_dp_downstream_debug() - debug DP branch devices
1706 seq_puts(m, "\t\tType: N/A\n"); in drm_dp_downstream_debug()
1744 * drm_dp_subconnector_type() - get DP branch device type
1762 /* Can be HDMI or DVI-D, DVI-D is a safer option */ in drm_dp_subconnector_type()
1765 /* Can be VGA or DVI-A, VGA is more popular */ in drm_dp_subconnector_type()
1796 * drm_dp_set_subconnector_property - set subconnector for DP connector
1802 * Called by a driver on every detect event.
1813 drm_object_property_set_value(&connector->base, in drm_dp_set_subconnector_property()
1814 connector->dev->mode_config.dp_subconnector_property, in drm_dp_set_subconnector_property()
1820 * drm_dp_read_sink_count_cap() - Check whether a given connector has a valid sink
1823 * @dpcd: A cached copy of the connector's DPCD RX capabilities
1824 * @desc: A cached copy of the connector's DP descriptor
1828 * Returns: %True if the (e)DP connector has a valid sink count that should
1835 /* Some eDP panels don't set a valid value for the sink count */ in drm_dp_read_sink_count_cap()
1836 return connector->connector_type != DRM_MODE_CONNECTOR_eDP && in drm_dp_read_sink_count_cap()
1844 * drm_dp_read_sink_count() - Retrieve the sink count for a given sink
1849 * Returns: The current sink count reported by @aux, or a negative error code
1866 * I2C-over-AUX implementation
1880 * In case of i2c defer or short i2c ack reply to a write, in drm_dp_i2c_msg_write_status_update()
1884 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { in drm_dp_i2c_msg_write_status_update()
1885 msg->request &= DP_AUX_I2C_MOT; in drm_dp_i2c_msg_write_status_update()
1886 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; in drm_dp_i2c_msg_write_status_update()
1907 if ((msg->request & DP_AUX_I2C_READ) == 0) in drm_dp_aux_req_duration()
1908 len += msg->size * 8; in drm_dp_aux_req_duration()
1922 if (msg->request & DP_AUX_I2C_READ) in drm_dp_aux_reply_duration()
1923 len += msg->size * 8; in drm_dp_aux_reply_duration()
1938 * message includes a START, ADDRESS and STOP. Neither does it
1946 msg->size * I2C_DATA_LEN + in drm_dp_i2c_msg_duration()
1972 "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
1975 * Transfer a single I2C-over-AUX message and handle various error conditions,
1980 * Returns bytes transferred on success, or a negative error code on failure.
1987 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device in drm_dp_i2c_do_msg()
1996 ret = aux->transfer(aux, msg); in drm_dp_i2c_do_msg()
1998 if (ret == -EBUSY) in drm_dp_i2c_do_msg()
2003 * behavior (for instance, when a driver tries to in drm_dp_i2c_do_msg()
2004 * communicate with a non-existent DisplayPort device). in drm_dp_i2c_do_msg()
2007 if (ret == -ETIMEDOUT) in drm_dp_i2c_do_msg()
2008 drm_dbg_kms_ratelimited(aux->drm_dev, "%s: transaction timed out\n", in drm_dp_i2c_do_msg()
2009 aux->name); in drm_dp_i2c_do_msg()
2011 drm_dbg_kms(aux->drm_dev, "%s: transaction failed: %d\n", in drm_dp_i2c_do_msg()
2012 aux->name, ret); in drm_dp_i2c_do_msg()
2017 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { in drm_dp_i2c_do_msg()
2020 * For I2C-over-AUX transactions this isn't enough, we in drm_dp_i2c_do_msg()
2026 drm_dbg_kms(aux->drm_dev, "%s: native nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
2027 aux->name, ret, msg->size); in drm_dp_i2c_do_msg()
2028 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2031 drm_dbg_kms(aux->drm_dev, "%s: native defer\n", aux->name); in drm_dp_i2c_do_msg()
2035 * more careful with DP-to-legacy adapters where a in drm_dp_i2c_do_msg()
2039 * safe for all use-cases. in drm_dp_i2c_do_msg()
2045 drm_err(aux->drm_dev, "%s: invalid native reply %#04x\n", in drm_dp_i2c_do_msg()
2046 aux->name, msg->reply); in drm_dp_i2c_do_msg()
2047 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2050 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { in drm_dp_i2c_do_msg()
2056 if (ret != msg->size) in drm_dp_i2c_do_msg()
2061 drm_dbg_kms(aux->drm_dev, "%s: I2C nack (result=%d, size=%zu)\n", in drm_dp_i2c_do_msg()
2062 aux->name, ret, msg->size); in drm_dp_i2c_do_msg()
2063 aux->i2c_nack_count++; in drm_dp_i2c_do_msg()
2064 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2067 drm_dbg_kms(aux->drm_dev, "%s: I2C defer\n", aux->name); in drm_dp_i2c_do_msg()
2072 aux->i2c_defer_count++; in drm_dp_i2c_do_msg()
2081 drm_err(aux->drm_dev, "%s: invalid I2C reply %#04x\n", in drm_dp_i2c_do_msg()
2082 aux->name, msg->reply); in drm_dp_i2c_do_msg()
2083 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2087 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up\n", aux->name); in drm_dp_i2c_do_msg()
2088 return -EREMOTEIO; in drm_dp_i2c_do_msg()
2094 msg->request = (i2c_msg->flags & I2C_M_RD) ? in drm_dp_i2c_msg_set_request()
2096 if (!(i2c_msg->flags & I2C_M_STOP)) in drm_dp_i2c_msg_set_request()
2097 msg->request |= DP_AUX_I2C_MOT; in drm_dp_i2c_msg_set_request()
2103 * Returns an error code on failure, or a recommended transfer size on success.
2107 int err, ret = orig_msg->size; in drm_dp_i2c_drain_msg()
2113 return err == 0 ? -EPROTO : err; in drm_dp_i2c_drain_msg()
2116 drm_dbg_kms(aux->drm_dev, in drm_dp_i2c_drain_msg()
2118 aux->name, msg.size, err); in drm_dp_i2c_drain_msg()
2122 msg.size -= err; in drm_dp_i2c_drain_msg()
2130 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
2137 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
2142 struct drm_dp_aux *aux = adapter->algo_data; in drm_dp_i2c_xfer()
2148 if (aux->powered_down) in drm_dp_i2c_xfer()
2149 return -EBUSY; in drm_dp_i2c_xfer()
2158 if (!aux->no_zero_sized) { in drm_dp_i2c_xfer()
2160 /* Send a bare address packet to start the transaction. in drm_dp_i2c_xfer()
2171 * changed into a WRITE_STATUS_UPDATE. in drm_dp_i2c_xfer()
2178 * we'll go to smaller sizes if the hardware gives us a in drm_dp_i2c_xfer()
2184 msg.size = min(transfer_size, msgs[i].len - j); in drm_dp_i2c_xfer()
2186 if (j + msg.size == msgs[i].len && aux->no_zero_sized) in drm_dp_i2c_xfer()
2192 * changed into a WRITE_STATUS_UPDATE. in drm_dp_i2c_xfer()
2206 if (!aux->no_zero_sized) { in drm_dp_i2c_xfer()
2207 /* Send a bare address packet to close out the transaction. in drm_dp_i2c_xfer()
2231 mutex_lock(&i2c_to_aux(i2c)->hw_mutex); in lock_bus()
2236 return mutex_trylock(&i2c_to_aux(i2c)->hw_mutex); in trylock_bus()
2241 mutex_unlock(&i2c_to_aux(i2c)->hw_mutex); in unlock_bus()
2266 if (count == aux->crc_count) in drm_dp_aux_get_crc()
2267 return -EAGAIN; /* No CRC yet */ in drm_dp_aux_get_crc()
2269 aux->crc_count = count; in drm_dp_aux_get_crc()
2287 if (WARN_ON(!aux->crtc)) in drm_dp_aux_crc_work()
2290 crtc = aux->crtc; in drm_dp_aux_crc_work()
2291 while (crtc->crc.opened) { in drm_dp_aux_crc_work()
2293 if (!crtc->crc.opened) in drm_dp_aux_crc_work()
2297 if (ret == -EAGAIN) { in drm_dp_aux_crc_work()
2302 if (ret == -EAGAIN) { in drm_dp_aux_crc_work()
2303 drm_dbg_kms(aux->drm_dev, "%s: Get CRC failed after retrying: %d\n", in drm_dp_aux_crc_work()
2304 aux->name, ret); in drm_dp_aux_crc_work()
2307 drm_dbg_kms(aux->drm_dev, "%s: Failed to get a CRC: %d\n", aux->name, ret); in drm_dp_aux_crc_work()
2319 * drm_dp_remote_aux_init() - minimally initialise a remote aux channel
2327 INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); in drm_dp_remote_aux_init()
2332 * drm_dp_aux_init() - minimally initialise an aux channel
2337 * grandparents to their AUX adapters (e.g. the AUX adapter is parented by a
2344 * For devices which use a separate platform device for their AUX adapters, this
2350 mutex_init(&aux->hw_mutex); in drm_dp_aux_init()
2351 mutex_init(&aux->cec.lock); in drm_dp_aux_init()
2352 INIT_WORK(&aux->crc_work, drm_dp_aux_crc_work); in drm_dp_aux_init()
2354 aux->ddc.algo = &drm_dp_i2c_algo; in drm_dp_aux_init()
2355 aux->ddc.algo_data = aux; in drm_dp_aux_init()
2356 aux->ddc.retries = 3; in drm_dp_aux_init()
2358 aux->ddc.lock_ops = &drm_dp_i2c_lock_ops; in drm_dp_aux_init()
2363 * drm_dp_aux_register() - initialise and register aux channel
2376 * For devices where the AUX channel is a device that exists independently of
2378 * recommended to call drm_dp_aux_register() after a &drm_device has been
2387 * Returns 0 on success or a negative error code on failure.
2393 WARN_ON_ONCE(!aux->drm_dev); in drm_dp_aux_register()
2395 if (!aux->ddc.algo) in drm_dp_aux_register()
2398 aux->ddc.owner = THIS_MODULE; in drm_dp_aux_register()
2399 aux->ddc.dev.parent = aux->dev; in drm_dp_aux_register()
2401 strscpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), in drm_dp_aux_register()
2402 sizeof(aux->ddc.name)); in drm_dp_aux_register()
2408 ret = i2c_add_adapter(&aux->ddc); in drm_dp_aux_register()
2419 * drm_dp_aux_unregister() - unregister an AUX adapter
2425 i2c_del_adapter(&aux->ddc); in drm_dp_aux_unregister()
2432 * drm_dp_psr_setup_time() - PSR setup in time usec
2454 return -EINVAL; in drm_dp_psr_setup_time()
2463 * drm_dp_start_crc() - start capture of frame CRCs
2467 * Returns 0 on success or a negative error code on failure.
2482 aux->crc_count = 0; in drm_dp_start_crc()
2483 aux->crtc = crtc; in drm_dp_start_crc()
2484 schedule_work(&aux->crc_work); in drm_dp_start_crc()
2491 * drm_dp_stop_crc() - stop capture of frame CRCs
2494 * Returns 0 on success or a negative error code on failure.
2509 flush_work(&aux->crc_work); in drm_dp_stop_crc()
2510 aux->crtc = NULL; in drm_dp_stop_crc()
2532 /* LG LP140WF6-SPM1 eDP panel */
2533 …{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r', 'T'), false, BIT(DP_DPCD_QUIRK_CONSTAN…
2542 …/* MediaTek panels (at least in U3224KBA) require DSC for modes with a short HBLANK on UHBR links.…
2551 * Get a bit mask of DPCD quirks for the sink/branch device identified by
2569 if (quirk->is_branch != is_branch) in drm_dp_get_quirks()
2572 if (memcmp(quirk->oui, ident->oui, sizeof(ident->oui)) != 0) in drm_dp_get_quirks()
2575 if (memcmp(quirk->device_id, any_device, sizeof(any_device)) != 0 && in drm_dp_get_quirks()
2576 memcmp(quirk->device_id, ident->device_id, sizeof(ident->device_id)) != 0) in drm_dp_get_quirks()
2579 quirks |= quirk->quirks; in drm_dp_get_quirks()
2597 const struct drm_dp_dpcd_ident *ident = &desc->ident; in drm_dp_dump_desc()
2599 drm_dbg_kms(aux->drm_dev, in drm_dp_dump_desc()
2600 "%s: %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n", in drm_dp_dump_desc()
2601 aux->name, device_name, in drm_dp_dump_desc()
2602 (int)sizeof(ident->oui), ident->oui, in drm_dp_dump_desc()
2603 (int)strnlen(ident->device_id, sizeof(ident->device_id)), ident->device_id, in drm_dp_dump_desc()
2604 ident->hw_rev >> 4, ident->hw_rev & 0xf, in drm_dp_dump_desc()
2605 ident->sw_major_rev, ident->sw_minor_rev, in drm_dp_dump_desc()
2606 desc->quirks); in drm_dp_dump_desc()
2610 * drm_dp_read_desc - read sink/branch descriptor from DPCD
2618 * Returns 0 on success or a negative error code on failure.
2623 struct drm_dp_dpcd_ident *ident = &desc->ident; in drm_dp_read_desc()
2631 desc->quirks = drm_dp_get_quirks(ident, is_branch); in drm_dp_read_desc()
2640 * drm_dp_dump_lttpr_desc - read and dump the DPCD descriptor for an LTTPR PHY
2644 * Read the DPCD LTTPR PHY descriptor for @dp_phy and print a debug message
2647 * Returns 0 on success or a negative error code on failure.
2654 if (drm_WARN_ON(aux->drm_dev, dp_phy < DP_PHY_LTTPR1 || dp_phy > DP_MAX_LTTPR_COUNT)) in drm_dp_dump_lttpr_desc()
2655 return -EINVAL; in drm_dp_dump_lttpr_desc()
2668 * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
2675 u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_bpp_incr()
2695 * drm_dp_dsc_sink_max_slice_count() - Get the max slice count
2713 u8 slice_cap1 = dsc_dpcd[DP_DSC_SLICE_CAP_1 - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_max_slice_count()
2725 u8 slice_cap2 = dsc_dpcd[DP_DSC_SLICE_CAP_2 - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_max_slice_count()
2754 * drm_dp_dsc_sink_line_buf_depth() - Get the line buffer depth in bits
2770 u8 line_buf_depth = dsc_dpcd[DP_DSC_LINE_BUF_BIT_DEPTH - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_line_buf_depth()
2798 * drm_dp_dsc_sink_supported_input_bpcs() - Get all the input bits per component
2818 u8 color_depth = dsc_dpcd[DP_DSC_DEC_COLOR_DEPTH_CAP - DP_DSC_SUPPORT]; in drm_dp_dsc_sink_supported_input_bpcs()
2828 /* A DP DSC Sink device shall support 8 bpc. */ in drm_dp_dsc_sink_supported_input_bpcs()
2840 * At least the DELL P2715Q monitor with a DPCD_REV < 0x14 returns in drm_dp_read_lttpr_regs()
2841 * corrupted values when reading from the 0xF0000- range with a block in drm_dp_read_lttpr_regs()
2860 * drm_dp_read_lttpr_common_caps - read the LTTPR common capabilities
2867 * Returns 0 on success or a negative error code on failure.
2880 * drm_dp_read_lttpr_phy_caps - read the capabilities for a given LTTPR PHY
2888 * Returns 0 on success or a negative error code on failure.
2903 return caps[r - DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]; in dp_lttpr_common_cap()
2907 * drm_dp_lttpr_count - get the number of detected LTTPRs
2913 * -ERANGE if more than supported number (8) of LTTPRs are detected
2914 * -EINVAL if the DP_PHY_REPEATER_CNT register contains an invalid value
2925 return 8 - ilog2(count); in drm_dp_lttpr_count()
2927 return -ERANGE; in drm_dp_lttpr_count()
2929 return -EINVAL; in drm_dp_lttpr_count()
2935 * drm_dp_lttpr_max_link_rate - get the maximum link rate supported by all LTTPRs
2949 * drm_dp_lttpr_set_transparent_mode() - set the LTTPR in transparent mode
2953 * Returns: 0 on success or a negative error code on failure.
2964 return (ret == 1) ? 0 : -EIO; in drm_dp_lttpr_set_transparent_mode()
2969 * drm_dp_lttpr_init() - init LTTPR transparency mode according to DP standard
2972 * Negative error code for any non-valid number.
2975 * Returns: 0 on success or a negative error code on failure.
2986 * non-transparent mode and the disable->enable non-transparent mode in drm_dp_lttpr_init()
2994 return -ENODEV; in drm_dp_lttpr_init()
2998 * Roll-back to transparent mode if setting non-transparent in drm_dp_lttpr_init()
3002 return -EINVAL; in drm_dp_lttpr_init()
3010 * drm_dp_lttpr_max_lane_count - get the maximum lane count supported by all LTTPRs
3024 * drm_dp_lttpr_voltage_swing_level_3_supported - check for LTTPR vswing3 support
3040 * drm_dp_lttpr_pre_emphasis_level_3_supported - check for LTTPR preemph3 support
3044 * pre-emphasis level 3.
3056 * drm_dp_get_phy_test_pattern() - get the requested pattern from the sink.
3060 * Returns 0 on success or a negative error code on failure.
3071 data->link_rate = drm_dp_bw_code_to_link_rate(rate); in drm_dp_get_phy_test_pattern()
3076 data->num_lanes = lanes & DP_MAX_LANE_COUNT_MASK; in drm_dp_get_phy_test_pattern()
3079 data->enhanced_frame_cap = true; in drm_dp_get_phy_test_pattern()
3081 err = drm_dp_dpcd_read_byte(aux, DP_PHY_TEST_PATTERN, &data->phy_pattern); in drm_dp_get_phy_test_pattern()
3085 switch (data->phy_pattern) { in drm_dp_get_phy_test_pattern()
3088 &data->custom80, sizeof(data->custom80)); in drm_dp_get_phy_test_pattern()
3095 &data->hbr2_reset, in drm_dp_get_phy_test_pattern()
3096 sizeof(data->hbr2_reset)); in drm_dp_get_phy_test_pattern()
3106 * drm_dp_set_phy_test_pattern() - set the pattern to the sink.
3111 * Returns 0 on success or a negative error code on failure.
3119 test_pattern = data->phy_pattern; in drm_dp_set_phy_test_pattern()
3128 for (i = 0; i < data->num_lanes; i++) { in drm_dp_set_phy_test_pattern()
3222 return "DCI-P3"; in dp_colorimetry_get_name()
3299 vsc->revision, vsc->length); in drm_dp_vsc_sdp_log()
3301 dp_pixelformat_get_name(vsc->pixelformat)); in drm_dp_vsc_sdp_log()
3303 dp_colorimetry_get_name(vsc->pixelformat, vsc->colorimetry)); in drm_dp_vsc_sdp_log()
3304 drm_printf(p, " bpc: %u\n", vsc->bpc); in drm_dp_vsc_sdp_log()
3306 dp_dynamic_range_get_name(vsc->dynamic_range)); in drm_dp_vsc_sdp_log()
3308 dp_content_type_get_name(vsc->content_type)); in drm_dp_vsc_sdp_log()
3315 as_sdp->revision, as_sdp->length); in drm_dp_as_sdp_log()
3316 drm_printf(p, " vtotal: %d\n", as_sdp->vtotal); in drm_dp_as_sdp_log()
3317 drm_printf(p, " target_rr: %d\n", as_sdp->target_rr); in drm_dp_as_sdp_log()
3318 drm_printf(p, " duration_incr_ms: %d\n", as_sdp->duration_incr_ms); in drm_dp_as_sdp_log()
3319 drm_printf(p, " duration_decr_ms: %d\n", as_sdp->duration_decr_ms); in drm_dp_as_sdp_log()
3320 drm_printf(p, " operation_mode: %d\n", as_sdp->mode); in drm_dp_as_sdp_log()
3325 * drm_dp_as_sdp_supported() - check if adaptive sync sdp is supported
3340 drm_dbg_dp(aux->drm_dev, in drm_dp_as_sdp_supported()
3350 * drm_dp_vsc_sdp_supported() - check if vsc sdp is supported
3364 drm_dbg_dp(aux->drm_dev, "failed to read DP_DPRX_FEATURE_ENUMERATION_LIST\n"); in drm_dp_vsc_sdp_supported()
3373 * drm_dp_vsc_sdp_pack() - pack a given vsc sdp into generic dp_sdp
3375 * table 2-118 - table 2-120 in DP 1.4a specification
3388 * Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119 in drm_dp_vsc_sdp_pack()
3391 sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */ in drm_dp_vsc_sdp_pack()
3392 sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet Type */ in drm_dp_vsc_sdp_pack()
3393 sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */ in drm_dp_vsc_sdp_pack()
3394 sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */ in drm_dp_vsc_sdp_pack()
3396 if (vsc->revision == 0x6) { in drm_dp_vsc_sdp_pack()
3397 sdp->db[0] = 1; in drm_dp_vsc_sdp_pack()
3398 sdp->db[3] = 1; in drm_dp_vsc_sdp_pack()
3403 * Format as per DP 1.4a spec and DP 2.0 respectively. in drm_dp_vsc_sdp_pack()
3405 if (!(vsc->revision == 0x5 || vsc->revision == 0x7)) in drm_dp_vsc_sdp_pack()
3410 sdp->db[16] = (vsc->pixelformat & 0xf) << 4; /* DB16[7:4] */ in drm_dp_vsc_sdp_pack()
3411 sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */ in drm_dp_vsc_sdp_pack()
3413 switch (vsc->bpc) { in drm_dp_vsc_sdp_pack()
3418 sdp->db[17] = 0x1; /* DB17[3:0] */ in drm_dp_vsc_sdp_pack()
3421 sdp->db[17] = 0x2; in drm_dp_vsc_sdp_pack()
3424 sdp->db[17] = 0x3; in drm_dp_vsc_sdp_pack()
3427 sdp->db[17] = 0x4; in drm_dp_vsc_sdp_pack()
3430 WARN(1, "Missing case %d\n", vsc->bpc); in drm_dp_vsc_sdp_pack()
3431 return -EINVAL; in drm_dp_vsc_sdp_pack()
3435 if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA) in drm_dp_vsc_sdp_pack()
3436 sdp->db[17] |= 0x80; /* DB17[7] */ in drm_dp_vsc_sdp_pack()
3439 sdp->db[18] = vsc->content_type & 0x7; in drm_dp_vsc_sdp_pack()
3447 * drm_dp_get_pcon_max_frl_bw() - maximum frl supported by PCON
3486 * drm_dp_pcon_frl_prepare() - Prepare PCON for FRL.
3505 * drm_dp_pcon_is_frl_ready() - Is PCON ready for FRL
3527 * drm_dp_pcon_frl_configure_1() - Set HDMI LINK Configuration-Step1
3576 return -EINVAL; in drm_dp_pcon_frl_configure_1()
3584 * drm_dp_pcon_frl_configure_2() - Set HDMI Link configuration Step-2
3614 * drm_dp_pcon_reset_frl_config() - Re-Set HDMI Link configuration.
3626 * drm_dp_pcon_frl_enable() - Enable HDMI link through FRL
3640 drm_dbg_kms(aux->drm_dev, "%s: PCON in Autonomous mode, can't enable FRL\n", in drm_dp_pcon_frl_enable()
3641 aux->name); in drm_dp_pcon_frl_enable()
3642 return -EINVAL; in drm_dp_pcon_frl_enable()
3650 * drm_dp_pcon_hdmi_link_active() - check if the PCON HDMI LINK status is active.
3669 * drm_dp_pcon_hdmi_link_mode() - get the PCON HDMI LINK MODE
3699 * drm_dp_pcon_hdmi_frl_link_error_count() - print the error count per lane
3711 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_dp_pcon_hdmi_frl_link_error_count()
3713 for (i = 0; i < hdmi->max_lanes; i++) { in drm_dp_pcon_hdmi_frl_link_error_count()
3732 drm_err(aux->drm_dev, "%s: More than %d errors since the last read for lane %d", in drm_dp_pcon_hdmi_frl_link_error_count()
3733 aux->name, num_error, i); in drm_dp_pcon_hdmi_frl_link_error_count()
3739 * drm_dp_pcon_enc_is_dsc_1_2 - Does PCON Encoder supports DSC 1.2
3749 buf = pcon_dsc_dpcd[DP_PCON_DSC_VERSION - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_enc_is_dsc_1_2()
3761 * drm_dp_pcon_dsc_max_slices - Get max slices supported by PCON DSC Encoder
3770 slice_cap1 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_1 - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slices()
3771 slice_cap2 = pcon_dsc_dpcd[DP_PCON_DSC_SLICE_CAP_2 - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slices()
3799 * drm_dp_pcon_dsc_max_slice_width() - Get max slice width for Pcon DSC encoder
3808 buf = pcon_dsc_dpcd[DP_PCON_DSC_MAX_SLICE_WIDTH - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_max_slice_width()
3815 * drm_dp_pcon_dsc_bpp_incr() - Get bits per pixel increment for PCON DSC encoder
3824 buf = pcon_dsc_dpcd[DP_PCON_DSC_BPP_INCR - DP_PCON_DSC_ENCODER]; in drm_dp_pcon_dsc_bpp_incr()
3864 * drm_dp_pcon_pps_default() - Let PCON fill the default pps parameters
3877 * drm_dp_pcon_pps_override_buf() - Configure PPS encoder override buffer for
3897 * drm_dp_pcon_pps_override_param() - Write PPS parameters to DSC encoder
3924 * drm_dp_pcon_convert_rgb_to_ycbcr() - Configure the PCon to convert RGB to Ycbcr
3926 * @color_spc: Color-space/s for which conversion is to be enabled, 0 for disable.
3949 * drm_edp_backlight_set_level() - Set the backlight level of an eDP panel via AUX
3967 if (!(bl->aux_set || bl->luminance_set)) in drm_edp_backlight_set_level()
3970 if (bl->luminance_set) { in drm_edp_backlight_set_level()
3977 } else if (bl->lsb_reg_used) { in drm_edp_backlight_set_level()
3986 drm_err(aux->drm_dev, in drm_edp_backlight_set_level()
3988 aux->name, ret); in drm_edp_backlight_set_level()
4004 if (!bl->aux_enable) in drm_edp_backlight_set_enable()
4009 drm_err(aux->drm_dev, "%s: Failed to read eDP display control register: %d\n", in drm_edp_backlight_set_enable()
4010 aux->name, ret); in drm_edp_backlight_set_enable()
4020 drm_err(aux->drm_dev, "%s: Failed to write eDP display control register: %d\n", in drm_edp_backlight_set_enable()
4021 aux->name, ret); in drm_edp_backlight_set_enable()
4029 * drm_edp_backlight_enable() - Enable an eDP panel's backlight using DPCD
4034 * This function handles enabling DPCD backlight controls on a panel over DPCD, while additionally
4039 * that the driver handle enabling/disabling the panel through implementation-specific means using
4041 * this function becomes a no-op, and the driver is expected to handle powering the panel on using
4052 if (bl->aux_set) in drm_edp_backlight_enable()
4057 if (bl->luminance_set) in drm_edp_backlight_enable()
4060 if (bl->pwmgen_bit_count) { in drm_edp_backlight_enable()
4061 ret = drm_dp_dpcd_write_byte(aux, DP_EDP_PWMGEN_BIT_COUNT, bl->pwmgen_bit_count); in drm_edp_backlight_enable()
4063 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", in drm_edp_backlight_enable()
4064 aux->name, ret); in drm_edp_backlight_enable()
4067 if (bl->pwm_freq_pre_divider) { in drm_edp_backlight_enable()
4069 bl->pwm_freq_pre_divider); in drm_edp_backlight_enable()
4071 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_enable()
4073 aux->name, ret); in drm_edp_backlight_enable()
4080 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux backlight mode: %d\n", in drm_edp_backlight_enable()
4081 aux->name, ret); in drm_edp_backlight_enable()
4082 return ret < 0 ? ret : -EIO; in drm_edp_backlight_enable()
4097 * drm_edp_backlight_disable() - Disable an eDP backlight using DPCD, if supported
4101 * This function handles disabling DPCD backlight controls on a panel over AUX.
4104 * that the driver handle enabling/disabling the panel through implementation-specific means using
4106 * this function becomes a no-op, and the driver is expected to handle powering the panel off using
4109 * Returns: %0 on success or no-op, negative error code on failure.
4131 if (!bl->aux_set) in drm_edp_backlight_probe_max()
4136 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap: %d\n", in drm_edp_backlight_probe_max()
4137 aux->name, ret); in drm_edp_backlight_probe_max()
4138 return -ENODEV; in drm_edp_backlight_probe_max()
4142 bl->max = (1 << pn) - 1; in drm_edp_backlight_probe_max()
4149 * - Where F = PWM Frequency Pre-Divider value programmed by field 7:0 of the in drm_edp_backlight_probe_max()
4151 * - Where P = 2^Pn, where Pn is the value programmed by field 4:0 of the in drm_edp_backlight_probe_max()
4163 * - Pn is in the range of Pn_min and Pn_max in drm_edp_backlight_probe_max()
4164 * - F is in the range of 1 and 255 in drm_edp_backlight_probe_max()
4165 * - FxP is within 25% of desired value. in drm_edp_backlight_probe_max()
4170 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap min: %d\n", in drm_edp_backlight_probe_max()
4171 aux->name, ret); in drm_edp_backlight_probe_max()
4176 drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count cap max: %d\n", in drm_edp_backlight_probe_max()
4177 aux->name, ret); in drm_edp_backlight_probe_max()
4187 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_probe_max()
4189 aux->name, driver_pwm_freq_hz); in drm_edp_backlight_probe_max()
4193 for (pn = pn_max; pn >= pn_min; pn--) { in drm_edp_backlight_probe_max()
4202 drm_dbg_kms(aux->drm_dev, "%s: Failed to write aux pwmgen bit count: %d\n", in drm_edp_backlight_probe_max()
4203 aux->name, ret); in drm_edp_backlight_probe_max()
4206 bl->pwmgen_bit_count = pn; in drm_edp_backlight_probe_max()
4207 bl->max = (1 << pn) - 1; in drm_edp_backlight_probe_max()
4210 bl->pwm_freq_pre_divider = f; in drm_edp_backlight_probe_max()
4211 drm_dbg_kms(aux->drm_dev, "%s: Using backlight frequency from driver (%dHz)\n", in drm_edp_backlight_probe_max()
4212 aux->name, driver_pwm_freq_hz); in drm_edp_backlight_probe_max()
4228 drm_dbg_kms(aux->drm_dev, "%s: Failed to read backlight mode: %d\n", in drm_edp_backlight_probe_state()
4229 aux->name, ret); in drm_edp_backlight_probe_state()
4230 return ret < 0 ? ret : -EIO; in drm_edp_backlight_probe_state()
4234 if (!bl->aux_set) in drm_edp_backlight_probe_state()
4238 int size = 1 + bl->lsb_reg_used; in drm_edp_backlight_probe_state()
4240 if (bl->luminance_set) { in drm_edp_backlight_probe_state()
4244 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_probe_state()
4246 aux->name, ret); in drm_edp_backlight_probe_state()
4260 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_probe_state()
4262 aux->name, ret); in drm_edp_backlight_probe_state()
4266 if (bl->lsb_reg_used) in drm_edp_backlight_probe_state()
4277 return bl->max; in drm_edp_backlight_probe_state()
4281 * drm_edp_backlight_init() - Probe a display panel's TCON using the standard VESA eDP backlight
4287 * @edp_dpcd: A cached copy of the eDP DPCD
4290 * @need_luminance: Tells us if a we want to manipulate backlight using luminance values
4292 * Initializes a &drm_edp_backlight_info struct by probing @aux for it's backlight capabilities,
4295 * If @driver_pwm_freq_hz is non-zero, this will be used as the backlight frequency. Otherwise, the
4309 bl->aux_enable = true; in drm_edp_backlight_init()
4311 bl->aux_set = true; in drm_edp_backlight_init()
4313 bl->lsb_reg_used = true; in drm_edp_backlight_init()
4316 bl->luminance_set = true; in drm_edp_backlight_init()
4319 if (!bl->aux_set && !(edp_dpcd[2] & DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP) && in drm_edp_backlight_init()
4320 !bl->luminance_set) { in drm_edp_backlight_init()
4321 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4322 "%s: Panel does not support AUX, PWM or luminance-based brightness control. Aborting\n", in drm_edp_backlight_init()
4323 aux->name); in drm_edp_backlight_init()
4324 return -EINVAL; in drm_edp_backlight_init()
4327 if (bl->luminance_set) { in drm_edp_backlight_init()
4328 bl->max = max_luminance; in drm_edp_backlight_init()
4340 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4342 aux->name, bl->aux_set, bl->aux_enable, *current_mode); in drm_edp_backlight_init()
4343 if (bl->aux_set) { in drm_edp_backlight_init()
4344 drm_dbg_kms(aux->drm_dev, in drm_edp_backlight_init()
4346 aux->name, *current_level, bl->max, bl->pwm_freq_pre_divider, in drm_edp_backlight_init()
4347 bl->lsb_reg_used); in drm_edp_backlight_init()
4364 if (!bl->enabled) { in dp_aux_backlight_update_status()
4365 drm_edp_backlight_enable(bl->aux, &bl->info, brightness); in dp_aux_backlight_update_status()
4366 bl->enabled = true; in dp_aux_backlight_update_status()
4369 ret = drm_edp_backlight_set_level(bl->aux, &bl->info, brightness); in dp_aux_backlight_update_status()
4371 if (bl->enabled) { in dp_aux_backlight_update_status()
4372 drm_edp_backlight_disable(bl->aux, &bl->info); in dp_aux_backlight_update_status()
4373 bl->enabled = false; in dp_aux_backlight_update_status()
4385 * drm_panel_dp_aux_backlight - create and use DP AUX backlight
4393 * When the panel is enabled backlight will be enabled after a
4399 * A typical implementation for a panel driver supporting backlight
4406 * Return: 0 on success or a negative error code on failure.
4417 if (!panel || !panel->dev || !aux) in drm_panel_dp_aux_backlight()
4418 return -EINVAL; in drm_panel_dp_aux_backlight()
4426 DRM_DEV_INFO(panel->dev, "DP AUX backlight is not supported\n"); in drm_panel_dp_aux_backlight()
4430 bl = devm_kzalloc(panel->dev, sizeof(*bl), GFP_KERNEL); in drm_panel_dp_aux_backlight()
4432 return -ENOMEM; in drm_panel_dp_aux_backlight()
4434 bl->aux = aux; in drm_panel_dp_aux_backlight()
4436 ret = drm_edp_backlight_init(aux, &bl->info, 0, 0, edp_dpcd, in drm_panel_dp_aux_backlight()
4443 props.max_brightness = bl->info.max; in drm_panel_dp_aux_backlight()
4445 bl->base = devm_backlight_device_register(panel->dev, "dp_aux_backlight", in drm_panel_dp_aux_backlight()
4446 panel->dev, bl, in drm_panel_dp_aux_backlight()
4448 if (IS_ERR(bl->base)) in drm_panel_dp_aux_backlight()
4449 return PTR_ERR(bl->base); in drm_panel_dp_aux_backlight()
4451 backlight_disable(bl->base); in drm_panel_dp_aux_backlight()
4453 panel->backlight = bl->base; in drm_panel_dp_aux_backlight()
4473 * drm_dp_link_symbol_cycles - calculate the link symbol count with/without dsc
4475 * @pixels: number of pixels in a scanline
4476 * @dsc_slice_count: number of slices for DSC or '0' for non-DSC
4482 * non-DSC case (@dsc_slice_count == 0) and return the count.
4504 * drm_dp_bw_overhead - Calculate the BW overhead of a DP link stream
4507 * @dsc_slice_count: number of slices for DSC or '0' for non-DSC
4511 * Calculate the BW allocation overhead of a DP link stream, depending
4513 * - @lane_count
4514 * - SST/MST mode (@flags / %DRM_DP_OVERHEAD_MST)
4515 * - symbol size (@flags / %DRM_DP_OVERHEAD_UHBR)
4516 * - FEC mode (@flags / %DRM_DP_OVERHEAD_FEC)
4517 * - SSC/REF_CLK mode (@flags / %DRM_DP_OVERHEAD_SSC_REF_CLK)
4519 * - @hactive timing
4520 * - @bpp_x16 color depth
4521 * - compression mode (@dsc_slice_count != 0)
4555 * After each 250 data symbols on 2-4 lanes: in drm_dp_bw_overhead()
4559 * After 256 (2-4 lanes) or 128 (1 lane) FEC blocks: in drm_dp_bw_overhead()
4588 * drm_dp_bw_channel_coding_efficiency - Get a DP link's channel coding efficiency
4589 * @is_uhbr: Whether the link has a 128b/132b channel coding
4593 * the 8b -> 10b, 128b -> 132b pixel data to link symbol conversion overhead
4599 * Returns the efficiency in the 100%/coding-overhead% ratio in
4617 * drm_dp_max_dprx_data_rate - Get the max data bandwidth of a DPRX sink
4621 * Given a link rate and lanes, get the data bandwidth.
4629 * the whole MST path until the DPRX link) and (Thunderbolt) DP tunnels -
4630 * which in turn can encapsulate an MST link with its own limit - with each
4631 * SST or MST encapsulated tunnel sharing the BW of a tunnel group.