Lines Matching +full:needs +full:- +full:hpd
1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
159 * serves double-duty of keeping track of the direction and
165 * each other's read-modify-write.
230 ret = regmap_bulk_read(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_read_u16()
244 regmap_bulk_write(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_write_u16()
252 drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); in get_new_adjusted_display_mode()
256 drm_atomic_get_new_crtc_state(state, conn_state->crtc); in get_new_adjusted_display_mode()
258 return &crtc_state->adjusted_mode; in get_new_adjusted_display_mode()
266 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_get_dsi_freq()
268 bit_rate_khz = mode->clock * in ti_sn_bridge_get_dsi_freq()
269 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_get_dsi_freq()
270 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); in ti_sn_bridge_get_dsi_freq()
301 if (pdata->refclk) { in ti_sn_bridge_set_refclk_freq()
302 refclk_rate = clk_get_rate(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
305 clk_prepare_enable(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
321 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK, in ti_sn_bridge_set_refclk_freq()
328 pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; in ti_sn_bridge_set_refclk_freq()
334 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
340 * HPD on this bridge chip is a bit useless. This is an eDP bridge in ti_sn65dsi86_enable_comms()
341 * so the HPD is an internal signal that's only there to signal that in ti_sn65dsi86_enable_comms()
344 * voltage, and temperate--I measured it at about 200 ms). One in ti_sn65dsi86_enable_comms()
345 * particular panel asserted HPD 84 ms after it was powered on meaning in ti_sn65dsi86_enable_comms()
346 * that we saw HPD 284 ms after power on. ...but the same panel said in ti_sn65dsi86_enable_comms()
347 * that instead of looking at HPD you could just hardcode a delay of in ti_sn65dsi86_enable_comms()
349 * delay in its prepare and always disable HPD. in ti_sn65dsi86_enable_comms()
351 * For DisplayPort bridge type, we need HPD. So we use the bridge type in ti_sn65dsi86_enable_comms()
352 * to conditionally disable HPD. in ti_sn65dsi86_enable_comms()
354 * can be called before. So for DisplayPort, HPD will be enabled once in ti_sn65dsi86_enable_comms()
355 * bridge type is set. We are using bridge type instead of "no-hpd" in ti_sn65dsi86_enable_comms()
360 if (pdata->bridge.type != DRM_MODE_CONNECTOR_DisplayPort) in ti_sn65dsi86_enable_comms()
361 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE, in ti_sn65dsi86_enable_comms()
364 pdata->comms_enabled = true; in ti_sn65dsi86_enable_comms()
366 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
371 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
373 pdata->comms_enabled = false; in ti_sn65dsi86_disable_comms()
374 clk_disable_unprepare(pdata->refclk); in ti_sn65dsi86_disable_comms()
376 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
384 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_resume()
393 gpiod_set_value_cansleep(pdata->enable_gpio, 1); in ti_sn65dsi86_resume()
413 if (pdata->refclk) in ti_sn65dsi86_resume()
424 if (pdata->refclk) in ti_sn65dsi86_suspend()
427 gpiod_set_value_cansleep(pdata->enable_gpio, 0); in ti_sn65dsi86_suspend()
429 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_suspend()
444 struct ti_sn65dsi86 *pdata = s->private; in status_show()
449 pm_runtime_get_sync(pdata->dev); in status_show()
453 regmap_read(pdata->regmap, reg, &val); in status_show()
457 pm_runtime_put_autosuspend(pdata->dev); in status_show()
463 /* -----------------------------------------------------------------------------
471 struct device *dev = pdata->dev; in ti_sn65dsi86_add_aux_device()
476 id = (client->adapter->nr << 10) | client->addr; in ti_sn65dsi86_add_aux_device()
480 return -ENODEV; in ti_sn65dsi86_add_aux_device()
486 /* -----------------------------------------------------------------------------
499 u32 request = msg->request & ~(DP_AUX_I2C_MOT | DP_AUX_I2C_WRITE_STATUS_UPDATE); in ti_sn_aux_transfer()
500 u32 request_val = AUX_CMD_REQ(msg->request); in ti_sn_aux_transfer()
501 u8 *buf = msg->buffer; in ti_sn_aux_transfer()
502 unsigned int len = msg->size; in ti_sn_aux_transfer()
506 u8 addr_len[SN_AUX_LENGTH_REG + 1 - SN_AUX_ADDR_19_16_REG]; in ti_sn_aux_transfer()
509 return -EINVAL; in ti_sn_aux_transfer()
511 pm_runtime_get_sync(pdata->dev); in ti_sn_aux_transfer()
512 mutex_lock(&pdata->comms_mutex); in ti_sn_aux_transfer()
517 * do it. Fail right away. This prevents non-refclk users from reading in ti_sn_aux_transfer()
520 if (!pdata->comms_enabled) { in ti_sn_aux_transfer()
521 ret = -EIO; in ti_sn_aux_transfer()
530 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); in ti_sn_aux_transfer()
532 msg->reply = 0; in ti_sn_aux_transfer()
535 ret = -EINVAL; in ti_sn_aux_transfer()
540 put_unaligned_be32((msg->address & SN_AUX_ADDR_MASK) << 8 | len, in ti_sn_aux_transfer()
542 regmap_bulk_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, addr_len, in ti_sn_aux_transfer()
546 regmap_bulk_write(pdata->regmap, SN_AUX_WDATA_REG(0), buf, len); in ti_sn_aux_transfer()
549 regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, in ti_sn_aux_transfer()
554 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); in ti_sn_aux_transfer()
557 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, in ti_sn_aux_transfer()
562 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); in ti_sn_aux_transfer()
572 ret = -ETIMEDOUT; in ti_sn_aux_transfer()
577 ret = regmap_read(pdata->regmap, SN_AUX_LENGTH_REG, &short_len); in ti_sn_aux_transfer()
585 msg->reply |= DP_AUX_I2C_REPLY_NACK; in ti_sn_aux_transfer()
589 msg->reply |= DP_AUX_NATIVE_REPLY_NACK; in ti_sn_aux_transfer()
597 ret = regmap_bulk_read(pdata->regmap, SN_AUX_RDATA_REG(0), buf, len); in ti_sn_aux_transfer()
600 mutex_unlock(&pdata->comms_mutex); in ti_sn_aux_transfer()
601 pm_runtime_mark_last_busy(pdata->dev); in ti_sn_aux_transfer()
602 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_aux_transfer()
612 * The HPD in this chip is a bit useless (See comment in in ti_sn_aux_wait_hpd_asserted()
614 * for HPD, we just assume it's asserted after the wait_us delay. in ti_sn_aux_wait_hpd_asserted()
630 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_aux_probe()
633 pdata->aux.name = "ti-sn65dsi86-aux"; in ti_sn_aux_probe()
634 pdata->aux.dev = &adev->dev; in ti_sn_aux_probe()
635 pdata->aux.transfer = ti_sn_aux_transfer; in ti_sn_aux_probe()
636 pdata->aux.wait_hpd_asserted = ti_sn_aux_wait_hpd_asserted; in ti_sn_aux_probe()
637 drm_dp_aux_init(&pdata->aux); in ti_sn_aux_probe()
639 ret = devm_of_dp_aux_populate_ep_devices(&pdata->aux); in ti_sn_aux_probe()
647 return ti_sn65dsi86_add_aux_device(pdata, &pdata->bridge_aux, "bridge"); in ti_sn_aux_probe()
661 /*------------------------------------------------------------------------------
675 struct device *dev = pdata->dev; in ti_sn_attach_host()
681 host = of_find_mipi_dsi_host_by_node(pdata->host_node); in ti_sn_attach_host()
683 return -EPROBE_DEFER; in ti_sn_attach_host()
685 dsi = devm_mipi_dsi_device_register_full(&adev->dev, host, &info); in ti_sn_attach_host()
690 dsi->lanes = 4; in ti_sn_attach_host()
691 dsi->format = MIPI_DSI_FMT_RGB888; in ti_sn_attach_host()
692 dsi->mode_flags = MIPI_DSI_MODE_VIDEO; in ti_sn_attach_host()
696 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val); in ti_sn_attach_host()
699 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; in ti_sn_attach_host()
701 pdata->dsi = dsi; in ti_sn_attach_host()
703 return devm_mipi_dsi_attach(&adev->dev, dsi); in ti_sn_attach_host()
713 pdata->aux.drm_dev = bridge->dev; in ti_sn_bridge_attach()
714 ret = drm_dp_aux_register(&pdata->aux); in ti_sn_bridge_attach()
716 drm_err(bridge->dev, "Failed to register DP AUX channel: %d\n", ret); in ti_sn_bridge_attach()
724 ret = drm_bridge_attach(encoder, pdata->next_bridge, in ti_sn_bridge_attach()
725 &pdata->bridge, flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR); in ti_sn_bridge_attach()
732 pdata->connector = drm_bridge_connector_init(pdata->bridge.dev, in ti_sn_bridge_attach()
733 pdata->bridge.encoder); in ti_sn_bridge_attach()
734 if (IS_ERR(pdata->connector)) { in ti_sn_bridge_attach()
735 ret = PTR_ERR(pdata->connector); in ti_sn_bridge_attach()
739 drm_connector_attach_encoder(pdata->connector, pdata->bridge.encoder); in ti_sn_bridge_attach()
744 drm_dp_aux_unregister(&pdata->aux); in ti_sn_bridge_attach()
750 drm_dp_aux_unregister(&bridge_to_ti_sn65dsi86(bridge)->aux); in ti_sn_bridge_detach()
759 if (mode->clock > 594000) in ti_sn_bridge_mode_valid()
767 if ((mode->hsync_start - mode->hdisplay) > 0xff) in ti_sn_bridge_mode_valid()
770 if ((mode->vsync_start - mode->vdisplay) > 0xff) in ti_sn_bridge_mode_valid()
773 if ((mode->hsync_end - mode->hsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
776 if ((mode->vsync_end - mode->vsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
779 if ((mode->htotal - mode->hsync_end) > 0xff) in ti_sn_bridge_mode_valid()
782 if ((mode->vtotal - mode->vsync_end) > 0xff) in ti_sn_bridge_mode_valid()
794 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); in ti_sn_bridge_atomic_disable()
803 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_set_dsi_rate()
806 bit_rate_mhz = (mode->clock / 1000) * in ti_sn_bridge_set_dsi_rate()
807 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_set_dsi_rate()
808 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); in ti_sn_bridge_set_dsi_rate()
812 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); in ti_sn_bridge_set_dsi_rate()
813 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); in ti_sn_bridge_set_dsi_rate()
818 if (connector->display_info.bpc <= 6) in ti_sn_bridge_get_bpp()
840 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_calc_min_dp_rate_idx()
843 bit_rate_khz = mode->clock * bpp; in ti_sn_bridge_calc_min_dp_rate_idx()
847 1000 * pdata->dp_lanes * DP_CLK_FUDGE_DEN); in ti_sn_bridge_calc_min_dp_rate_idx()
849 for (i = 1; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++) in ti_sn_bridge_calc_min_dp_rate_idx()
865 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()
867 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
876 ret = drm_dp_dpcd_read(&pdata->aux, DP_SUPPORTED_LINK_RATES, in ti_sn_bridge_read_valid_rates()
880 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
906 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
911 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()
913 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
921 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
943 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_set_video_timings()
946 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in ti_sn_bridge_set_video_timings()
948 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in ti_sn_bridge_set_video_timings()
952 mode->hdisplay); in ti_sn_bridge_set_video_timings()
954 mode->vdisplay); in ti_sn_bridge_set_video_timings()
955 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
956 (mode->hsync_end - mode->hsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
957 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
958 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
960 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
961 (mode->vsync_end - mode->vsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
962 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
963 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
966 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
967 (mode->htotal - mode->hsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
968 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
969 (mode->vtotal - mode->vsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
971 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
972 (mode->hsync_start - mode->hdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
973 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
974 (mode->vsync_start - mode->vdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
984 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
986 DRM_DEV_ERROR(pdata->dev, in ti_sn_get_max_lanes()
1002 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG, in ti_sn_link_training()
1006 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1); in ti_sn_link_training()
1008 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val, in ti_sn_link_training()
1024 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); in ti_sn_link_training()
1025 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, in ti_sn_link_training()
1033 ret = -EIO; in ti_sn_link_training()
1042 DRM_DEV_INFO(pdata->dev, "Link training needed %d retries\n", i); in ti_sn_link_training()
1047 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_link_training()
1061 int ret = -EINVAL; in ti_sn_bridge_atomic_enable()
1066 bridge->encoder); in ti_sn_bridge_atomic_enable()
1068 dev_err_ratelimited(pdata->dev, "Could not get the connector\n"); in ti_sn_bridge_atomic_enable()
1073 pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes); in ti_sn_bridge_atomic_enable()
1076 val = CHA_DSI_LANES(SN_MAX_DP_LANES - pdata->dsi->lanes); in ti_sn_bridge_atomic_enable()
1077 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG, in ti_sn_bridge_atomic_enable()
1080 regmap_write(pdata->regmap, SN_LN_ASSIGN_REG, pdata->ln_assign); in ti_sn_bridge_atomic_enable()
1081 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, LN_POLRS_MASK, in ti_sn_bridge_atomic_enable()
1082 pdata->ln_polrs << LN_POLRS_OFFSET); in ti_sn_bridge_atomic_enable()
1096 if (pdata->bridge.type == DRM_MODE_CONNECTOR_eDP) { in ti_sn_bridge_atomic_enable()
1097 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_atomic_enable()
1100 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1103 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1110 regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val); in ti_sn_bridge_atomic_enable()
1113 val = DP_NUM_LANES(min(pdata->dp_lanes, 3)); in ti_sn_bridge_atomic_enable()
1114 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, in ti_sn_bridge_atomic_enable()
1131 DRM_DEV_ERROR(pdata->dev, "%s (%d)\n", last_err_str, ret); in ti_sn_bridge_atomic_enable()
1139 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, in ti_sn_bridge_atomic_enable()
1148 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_atomic_pre_enable()
1150 if (!pdata->refclk) in ti_sn_bridge_atomic_pre_enable()
1163 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1165 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, 0); in ti_sn_bridge_atomic_post_disable()
1167 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1169 if (!pdata->refclk) in ti_sn_bridge_atomic_post_disable()
1172 pm_runtime_put_sync(pdata->dev); in ti_sn_bridge_atomic_post_disable()
1183 * as the chip won't report HPD just after being powered on. in ti_sn_bridge_detect()
1185 * debounce time (~100-400 ms). in ti_sn_bridge_detect()
1188 regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val); in ti_sn_bridge_detect()
1199 return drm_edid_read_ddc(connector, &pdata->aux.ddc); in ti_sn_bridge_edid_read()
1207 debugfs = debugfs_create_dir(dev_name(pdata->dev), root); in ti_sn65dsi86_debugfs_init()
1216 * Device needs to be powered on before reading the HPD state in ti_sn_bridge_hpd_enable()
1217 * for reliable hpd detection in ti_sn_bridge_detect() due to in ti_sn_bridge_hpd_enable()
1221 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_hpd_enable()
1228 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_hpd_disable()
1264 * data-lanes but not lane-polarities but not vice versa. in ti_sn_bridge_parse_lanes()
1270 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in ti_sn_bridge_parse_lanes()
1273 of_property_read_u32_array(endpoint, "data-lanes", in ti_sn_bridge_parse_lanes()
1275 of_property_read_u32_array(endpoint, "lane-polarities", in ti_sn_bridge_parse_lanes()
1284 * data-lanes had fewer elements so that we nicely initialize in ti_sn_bridge_parse_lanes()
1287 for (i = SN_MAX_DP_LANES - 1; i >= 0; i--) { in ti_sn_bridge_parse_lanes()
1293 pdata->dp_lanes = dp_lanes; in ti_sn_bridge_parse_lanes()
1294 pdata->ln_assign = ln_assign; in ti_sn_bridge_parse_lanes()
1295 pdata->ln_polrs = ln_polrs; in ti_sn_bridge_parse_lanes()
1300 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_parse_dsi_host()
1302 pdata->host_node = of_graph_get_remote_node(np, 0, 0); in ti_sn_bridge_parse_dsi_host()
1304 if (!pdata->host_node) { in ti_sn_bridge_parse_dsi_host()
1306 return -ENODEV; in ti_sn_bridge_parse_dsi_host()
1315 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_probe()
1316 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_probe()
1319 pdata->next_bridge = devm_drm_of_get_bridge(&adev->dev, np, 1, 0); in ti_sn_bridge_probe()
1320 if (IS_ERR(pdata->next_bridge)) in ti_sn_bridge_probe()
1321 return dev_err_probe(&adev->dev, PTR_ERR(pdata->next_bridge), in ti_sn_bridge_probe()
1330 pdata->bridge.of_node = np; in ti_sn_bridge_probe()
1331 pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort in ti_sn_bridge_probe()
1334 if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort) { in ti_sn_bridge_probe()
1335 pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT | in ti_sn_bridge_probe()
1343 * HPD doesn't _really_ matter then. The only exception is in in ti_sn_bridge_probe()
1345 * the bridge is added. We always consistently have HPD disabled in ti_sn_bridge_probe()
1348 mutex_lock(&pdata->comms_mutex); in ti_sn_bridge_probe()
1349 if (pdata->comms_enabled) in ti_sn_bridge_probe()
1350 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, in ti_sn_bridge_probe()
1352 mutex_unlock(&pdata->comms_mutex); in ti_sn_bridge_probe()
1355 drm_bridge_add(&pdata->bridge); in ti_sn_bridge_probe()
1359 dev_err_probe(&adev->dev, ret, "failed to attach dsi host\n"); in ti_sn_bridge_probe()
1366 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_probe()
1372 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_remove()
1377 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_remove()
1379 of_node_put(pdata->host_node); in ti_sn_bridge_remove()
1394 /* -----------------------------------------------------------------------------
1400 return atomic_xchg(&pdata->pwm_pin_busy, 1) ? -EBUSY : 0; in ti_sn_pwm_pin_request()
1405 atomic_set(&pdata->pwm_pin_busy, 0); in ti_sn_pwm_pin_release()
1429 * - The PWM signal is not driven when the chip is powered down, or in its
1431 * described in the documentation. In order to save power, state->enabled is
1433 * to determine if the chip needs to be kept powered.
1434 * - Changing both period and duty_cycle is not done atomically, neither is the
1435 * multi-byte register updates, so the output might briefly be undefined
1450 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1456 if (state->enabled) { in ti_sn_pwm_apply()
1457 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1463 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_pwm_apply()
1476 * PWM_FREQ = ----------------------------------- in ti_sn_pwm_apply()
1491 * PWM_PRE_DIV >= ------------------------- in ti_sn_pwm_apply()
1500 * BACKLIGHT_SCALE = ---------------------- - 1 in ti_sn_pwm_apply()
1508 if (state->period <= NSEC_PER_SEC / pdata->pwm_refclk_freq) { in ti_sn_pwm_apply()
1509 ret = -EINVAL; in ti_sn_pwm_apply()
1518 pdata->pwm_refclk_freq); in ti_sn_pwm_apply()
1519 period = min(state->period, period_max); in ti_sn_pwm_apply()
1521 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1523 scale = div64_u64(period * pdata->pwm_refclk_freq, (u64)NSEC_PER_SEC * pre_div) - 1; in ti_sn_pwm_apply()
1529 * ------- = --------------------- in ti_sn_pwm_apply()
1536 backlight = div64_u64(state->duty_cycle * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1541 ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); in ti_sn_pwm_apply()
1551 pwm_en_inv = FIELD_PREP(SN_PWM_EN_MASK, state->enabled) | in ti_sn_pwm_apply()
1552 FIELD_PREP(SN_PWM_INV_MASK, state->polarity == PWM_POLARITY_INVERSED); in ti_sn_pwm_apply()
1553 ret = regmap_write(pdata->regmap, SN_PWM_EN_INV_REG, pwm_en_inv); in ti_sn_pwm_apply()
1559 pdata->pwm_enabled = state->enabled; in ti_sn_pwm_apply()
1562 if (!pdata->pwm_enabled) in ti_sn_pwm_apply()
1578 ret = regmap_read(pdata->regmap, SN_PWM_EN_INV_REG, &pwm_en_inv); in ti_sn_pwm_get_state()
1590 ret = regmap_read(pdata->regmap, SN_PWM_PRE_DIV_REG, &pre_div); in ti_sn_pwm_get_state()
1594 state->enabled = FIELD_GET(SN_PWM_EN_MASK, pwm_en_inv); in ti_sn_pwm_get_state()
1596 state->polarity = PWM_POLARITY_INVERSED; in ti_sn_pwm_get_state()
1598 state->polarity = PWM_POLARITY_NORMAL; in ti_sn_pwm_get_state()
1600 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * (scale + 1), in ti_sn_pwm_get_state()
1601 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1602 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight, in ti_sn_pwm_get_state()
1603 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1605 if (state->duty_cycle > state->period) in ti_sn_pwm_get_state()
1606 state->duty_cycle = state->period; in ti_sn_pwm_get_state()
1622 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_probe()
1624 pdata->pchip = chip = devm_pwmchip_alloc(&adev->dev, 1, 0); in ti_sn_pwm_probe()
1630 chip->ops = &ti_sn_pwm_ops; in ti_sn_pwm_probe()
1631 chip->of_xlate = of_pwm_single_xlate; in ti_sn_pwm_probe()
1633 devm_pm_runtime_enable(&adev->dev); in ti_sn_pwm_probe()
1640 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_remove()
1642 pwmchip_remove(pdata->pchip); in ti_sn_pwm_remove()
1644 if (pdata->pwm_enabled) in ti_sn_pwm_remove()
1645 pm_runtime_put_sync(&adev->dev); in ti_sn_pwm_remove()
1678 /* -----------------------------------------------------------------------------
1687 if (WARN_ON(gpiospec->args_count < chip->of_gpio_n_cells)) in tn_sn_bridge_of_xlate()
1688 return -EINVAL; in tn_sn_bridge_of_xlate()
1690 if (gpiospec->args[0] > chip->ngpio || gpiospec->args[0] < 1) in tn_sn_bridge_of_xlate()
1691 return -EINVAL; in tn_sn_bridge_of_xlate()
1694 *flags = gpiospec->args[1]; in tn_sn_bridge_of_xlate()
1696 return gpiospec->args[0] - SN_GPIO_PHYSICAL_OFFSET; in tn_sn_bridge_of_xlate()
1710 return test_bit(offset, pdata->gchip_output) ? in ti_sn_bridge_gpio_get_direction()
1722 * powered--we just power it on to read the pin. NOTE: part of in ti_sn_bridge_gpio_get()
1728 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_get()
1729 ret = regmap_read(pdata->regmap, SN_GPIO_IO_REG, &val); in ti_sn_bridge_gpio_get()
1730 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_get()
1744 return regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, in ti_sn_bridge_gpio_set()
1756 if (!test_and_clear_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_input()
1759 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_input()
1763 set_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_input()
1772 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_input()
1784 if (test_and_set_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_output()
1787 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1793 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_output()
1797 clear_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_output()
1798 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1832 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_gpio_probe()
1836 if (!of_property_read_bool(pdata->dev->of_node, "gpio-controller")) in ti_sn_gpio_probe()
1839 pdata->gchip.label = dev_name(pdata->dev); in ti_sn_gpio_probe()
1840 pdata->gchip.parent = pdata->dev; in ti_sn_gpio_probe()
1841 pdata->gchip.owner = THIS_MODULE; in ti_sn_gpio_probe()
1842 pdata->gchip.of_xlate = tn_sn_bridge_of_xlate; in ti_sn_gpio_probe()
1843 pdata->gchip.of_gpio_n_cells = 2; in ti_sn_gpio_probe()
1844 pdata->gchip.request = ti_sn_bridge_gpio_request; in ti_sn_gpio_probe()
1845 pdata->gchip.free = ti_sn_bridge_gpio_free; in ti_sn_gpio_probe()
1846 pdata->gchip.get_direction = ti_sn_bridge_gpio_get_direction; in ti_sn_gpio_probe()
1847 pdata->gchip.direction_input = ti_sn_bridge_gpio_direction_input; in ti_sn_gpio_probe()
1848 pdata->gchip.direction_output = ti_sn_bridge_gpio_direction_output; in ti_sn_gpio_probe()
1849 pdata->gchip.get = ti_sn_bridge_gpio_get; in ti_sn_gpio_probe()
1850 pdata->gchip.set = ti_sn_bridge_gpio_set; in ti_sn_gpio_probe()
1851 pdata->gchip.can_sleep = true; in ti_sn_gpio_probe()
1852 pdata->gchip.names = ti_sn_bridge_gpio_names; in ti_sn_gpio_probe()
1853 pdata->gchip.ngpio = SN_NUM_GPIOS; in ti_sn_gpio_probe()
1854 pdata->gchip.base = -1; in ti_sn_gpio_probe()
1855 ret = devm_gpiochip_add_data(&adev->dev, &pdata->gchip, pdata); in ti_sn_gpio_probe()
1857 dev_err(pdata->dev, "can't add gpio chip\n"); in ti_sn_gpio_probe()
1892 /* -----------------------------------------------------------------------------
1910 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i]; in ti_sn65dsi86_parse_regulators()
1912 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM, in ti_sn65dsi86_parse_regulators()
1913 pdata->supplies); in ti_sn65dsi86_parse_regulators()
1918 struct device *dev = &client->dev; in ti_sn65dsi86_probe()
1923 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { in ti_sn65dsi86_probe()
1925 return -ENODEV; in ti_sn65dsi86_probe()
1932 pdata->dev = dev; in ti_sn65dsi86_probe()
1934 mutex_init(&pdata->comms_mutex); in ti_sn65dsi86_probe()
1936 pdata->regmap = devm_regmap_init_i2c(client, in ti_sn65dsi86_probe()
1938 if (IS_ERR(pdata->regmap)) in ti_sn65dsi86_probe()
1939 return dev_err_probe(dev, PTR_ERR(pdata->regmap), in ti_sn65dsi86_probe()
1942 pdata->enable_gpio = devm_gpiod_get_optional(dev, "enable", in ti_sn65dsi86_probe()
1944 if (IS_ERR(pdata->enable_gpio)) in ti_sn65dsi86_probe()
1945 return dev_err_probe(dev, PTR_ERR(pdata->enable_gpio), in ti_sn65dsi86_probe()
1952 pdata->refclk = devm_clk_get_optional(dev, "refclk"); in ti_sn65dsi86_probe()
1953 if (IS_ERR(pdata->refclk)) in ti_sn65dsi86_probe()
1954 return dev_err_probe(dev, PTR_ERR(pdata->refclk), in ti_sn65dsi86_probe()
1958 pm_runtime_set_autosuspend_delay(pdata->dev, 500); in ti_sn65dsi86_probe()
1959 pm_runtime_use_autosuspend(pdata->dev); in ti_sn65dsi86_probe()
1965 ret = regmap_bulk_read(pdata->regmap, SN_DEVICE_ID_REGS, id_buf, ARRAY_SIZE(id_buf)); in ti_sn65dsi86_probe()
1972 return dev_err_probe(dev, -EOPNOTSUPP, "unsupported device id\n"); in ti_sn65dsi86_probe()
1976 * motiviation here is to solve the chicken-and-egg problem of probe in ti_sn65dsi86_probe()
1978 * The panel wants its HPD GPIO (provided by sn65dsi86 on some boards) in ti_sn65dsi86_probe()
1980 * bus or the pwm_chip. Having sub-devices allows the some sub devices in ti_sn65dsi86_probe()
1981 * to finish probing even if others return -EPROBE_DEFER and gets us in ti_sn65dsi86_probe()
1986 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->gpio_aux, "gpio"); in ti_sn65dsi86_probe()
1992 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->pwm_aux, "pwm"); in ti_sn65dsi86_probe()
2003 return ti_sn65dsi86_add_aux_device(pdata, &pdata->aux_aux, "aux"); in ti_sn65dsi86_probe()