Lines Matching +full:lane +full:- +full:polarities
1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
159 * serves double-duty of keeping track of the direction and
165 * each other's read-modify-write.
230 ret = regmap_bulk_read(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_read_u16()
244 regmap_bulk_write(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_write_u16()
252 drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); in get_new_adjusted_display_mode()
256 drm_atomic_get_new_crtc_state(state, conn_state->crtc); in get_new_adjusted_display_mode()
258 return &crtc_state->adjusted_mode; in get_new_adjusted_display_mode()
266 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_get_dsi_freq()
268 bit_rate_khz = mode->clock * in ti_sn_bridge_get_dsi_freq()
269 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_get_dsi_freq()
270 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2); in ti_sn_bridge_get_dsi_freq()
301 if (pdata->refclk) { in ti_sn_bridge_set_refclk_freq()
302 refclk_rate = clk_get_rate(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
305 clk_prepare_enable(pdata->refclk); in ti_sn_bridge_set_refclk_freq()
321 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK, in ti_sn_bridge_set_refclk_freq()
328 pdata->pwm_refclk_freq = ti_sn_bridge_refclk_lut[i]; in ti_sn_bridge_set_refclk_freq()
334 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
344 * voltage, and temperate--I measured it at about 200 ms). One in ti_sn65dsi86_enable_comms()
355 * bridge type is set. We are using bridge type instead of "no-hpd" in ti_sn65dsi86_enable_comms()
360 if (pdata->bridge.type != DRM_MODE_CONNECTOR_DisplayPort) in ti_sn65dsi86_enable_comms()
361 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE, in ti_sn65dsi86_enable_comms()
364 pdata->comms_enabled = true; in ti_sn65dsi86_enable_comms()
366 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_enable_comms()
371 mutex_lock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
373 pdata->comms_enabled = false; in ti_sn65dsi86_disable_comms()
374 clk_disable_unprepare(pdata->refclk); in ti_sn65dsi86_disable_comms()
376 mutex_unlock(&pdata->comms_mutex); in ti_sn65dsi86_disable_comms()
384 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_resume()
393 gpiod_set_value_cansleep(pdata->enable_gpio, 1); in ti_sn65dsi86_resume()
402 if (pdata->refclk) in ti_sn65dsi86_resume()
413 if (pdata->refclk) in ti_sn65dsi86_suspend()
416 gpiod_set_value_cansleep(pdata->enable_gpio, 0); in ti_sn65dsi86_suspend()
418 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies); in ti_sn65dsi86_suspend()
433 struct ti_sn65dsi86 *pdata = s->private; in status_show()
438 pm_runtime_get_sync(pdata->dev); in status_show()
442 regmap_read(pdata->regmap, reg, &val); in status_show()
446 pm_runtime_put_autosuspend(pdata->dev); in status_show()
452 /* -----------------------------------------------------------------------------
477 struct device *dev = pdata->dev; in ti_sn65dsi86_add_aux_device()
484 return -ENOMEM; in ti_sn65dsi86_add_aux_device()
486 aux->name = name; in ti_sn65dsi86_add_aux_device()
487 aux->id = (client->adapter->nr << 10) | client->addr; in ti_sn65dsi86_add_aux_device()
488 aux->dev.parent = dev; in ti_sn65dsi86_add_aux_device()
489 aux->dev.release = ti_sn65dsi86_aux_device_release; in ti_sn65dsi86_add_aux_device()
490 device_set_of_node_from_dev(&aux->dev, dev); in ti_sn65dsi86_add_aux_device()
510 /* -----------------------------------------------------------------------------
523 u32 request = msg->request & ~(DP_AUX_I2C_MOT | DP_AUX_I2C_WRITE_STATUS_UPDATE); in ti_sn_aux_transfer()
524 u32 request_val = AUX_CMD_REQ(msg->request); in ti_sn_aux_transfer()
525 u8 *buf = msg->buffer; in ti_sn_aux_transfer()
526 unsigned int len = msg->size; in ti_sn_aux_transfer()
530 u8 addr_len[SN_AUX_LENGTH_REG + 1 - SN_AUX_ADDR_19_16_REG]; in ti_sn_aux_transfer()
533 return -EINVAL; in ti_sn_aux_transfer()
535 pm_runtime_get_sync(pdata->dev); in ti_sn_aux_transfer()
536 mutex_lock(&pdata->comms_mutex); in ti_sn_aux_transfer()
541 * do it. Fail right away. This prevents non-refclk users from reading in ti_sn_aux_transfer()
544 if (!pdata->comms_enabled) { in ti_sn_aux_transfer()
545 ret = -EIO; in ti_sn_aux_transfer()
554 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val); in ti_sn_aux_transfer()
556 msg->reply = 0; in ti_sn_aux_transfer()
559 ret = -EINVAL; in ti_sn_aux_transfer()
564 put_unaligned_be32((msg->address & SN_AUX_ADDR_MASK) << 8 | len, in ti_sn_aux_transfer()
566 regmap_bulk_write(pdata->regmap, SN_AUX_ADDR_19_16_REG, addr_len, in ti_sn_aux_transfer()
570 regmap_bulk_write(pdata->regmap, SN_AUX_WDATA_REG(0), buf, len); in ti_sn_aux_transfer()
573 regmap_write(pdata->regmap, SN_AUX_CMD_STATUS_REG, in ti_sn_aux_transfer()
578 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND); in ti_sn_aux_transfer()
581 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val, in ti_sn_aux_transfer()
586 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val); in ti_sn_aux_transfer()
596 ret = -ETIMEDOUT; in ti_sn_aux_transfer()
601 ret = regmap_read(pdata->regmap, SN_AUX_LENGTH_REG, &short_len); in ti_sn_aux_transfer()
609 msg->reply |= DP_AUX_I2C_REPLY_NACK; in ti_sn_aux_transfer()
613 msg->reply |= DP_AUX_NATIVE_REPLY_NACK; in ti_sn_aux_transfer()
621 ret = regmap_bulk_read(pdata->regmap, SN_AUX_RDATA_REG(0), buf, len); in ti_sn_aux_transfer()
624 mutex_unlock(&pdata->comms_mutex); in ti_sn_aux_transfer()
625 pm_runtime_mark_last_busy(pdata->dev); in ti_sn_aux_transfer()
626 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_aux_transfer()
654 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_aux_probe()
657 pdata->aux.name = "ti-sn65dsi86-aux"; in ti_sn_aux_probe()
658 pdata->aux.dev = &adev->dev; in ti_sn_aux_probe()
659 pdata->aux.transfer = ti_sn_aux_transfer; in ti_sn_aux_probe()
660 pdata->aux.wait_hpd_asserted = ti_sn_aux_wait_hpd_asserted; in ti_sn_aux_probe()
661 drm_dp_aux_init(&pdata->aux); in ti_sn_aux_probe()
663 ret = devm_of_dp_aux_populate_ep_devices(&pdata->aux); in ti_sn_aux_probe()
671 return ti_sn65dsi86_add_aux_device(pdata, &pdata->bridge_aux, "bridge"); in ti_sn_aux_probe()
685 /*------------------------------------------------------------------------------
699 struct device *dev = pdata->dev; in ti_sn_attach_host()
705 host = of_find_mipi_dsi_host_by_node(pdata->host_node); in ti_sn_attach_host()
707 return -EPROBE_DEFER; in ti_sn_attach_host()
709 dsi = devm_mipi_dsi_device_register_full(&adev->dev, host, &info); in ti_sn_attach_host()
714 dsi->lanes = 4; in ti_sn_attach_host()
715 dsi->format = MIPI_DSI_FMT_RGB888; in ti_sn_attach_host()
716 dsi->mode_flags = MIPI_DSI_MODE_VIDEO; in ti_sn_attach_host()
720 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val); in ti_sn_attach_host()
723 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS; in ti_sn_attach_host()
725 pdata->dsi = dsi; in ti_sn_attach_host()
727 return devm_mipi_dsi_attach(&adev->dev, dsi); in ti_sn_attach_host()
737 pdata->aux.drm_dev = bridge->dev; in ti_sn_bridge_attach()
738 ret = drm_dp_aux_register(&pdata->aux); in ti_sn_bridge_attach()
740 drm_err(bridge->dev, "Failed to register DP AUX channel: %d\n", ret); in ti_sn_bridge_attach()
748 ret = drm_bridge_attach(encoder, pdata->next_bridge, in ti_sn_bridge_attach()
749 &pdata->bridge, flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR); in ti_sn_bridge_attach()
756 pdata->connector = drm_bridge_connector_init(pdata->bridge.dev, in ti_sn_bridge_attach()
757 pdata->bridge.encoder); in ti_sn_bridge_attach()
758 if (IS_ERR(pdata->connector)) { in ti_sn_bridge_attach()
759 ret = PTR_ERR(pdata->connector); in ti_sn_bridge_attach()
763 drm_connector_attach_encoder(pdata->connector, pdata->bridge.encoder); in ti_sn_bridge_attach()
768 drm_dp_aux_unregister(&pdata->aux); in ti_sn_bridge_attach()
774 drm_dp_aux_unregister(&bridge_to_ti_sn65dsi86(bridge)->aux); in ti_sn_bridge_detach()
783 if (mode->clock > 594000) in ti_sn_bridge_mode_valid()
791 if ((mode->hsync_start - mode->hdisplay) > 0xff) in ti_sn_bridge_mode_valid()
794 if ((mode->vsync_start - mode->vdisplay) > 0xff) in ti_sn_bridge_mode_valid()
797 if ((mode->hsync_end - mode->hsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
800 if ((mode->vsync_end - mode->vsync_start) > 0x7fff) in ti_sn_bridge_mode_valid()
803 if ((mode->htotal - mode->hsync_end) > 0xff) in ti_sn_bridge_mode_valid()
806 if ((mode->vtotal - mode->vsync_end) > 0xff) in ti_sn_bridge_mode_valid()
818 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); in ti_sn_bridge_atomic_disable()
827 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_set_dsi_rate()
830 bit_rate_mhz = (mode->clock / 1000) * in ti_sn_bridge_set_dsi_rate()
831 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format); in ti_sn_bridge_set_dsi_rate()
832 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2); in ti_sn_bridge_set_dsi_rate()
836 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF); in ti_sn_bridge_set_dsi_rate()
837 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val); in ti_sn_bridge_set_dsi_rate()
842 if (connector->display_info.bpc <= 6) in ti_sn_bridge_get_bpp()
864 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_calc_min_dp_rate_idx()
867 bit_rate_khz = mode->clock * bpp; in ti_sn_bridge_calc_min_dp_rate_idx()
871 1000 * pdata->dp_lanes * DP_CLK_FUDGE_DEN); in ti_sn_bridge_calc_min_dp_rate_idx()
873 for (i = 1; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++) in ti_sn_bridge_calc_min_dp_rate_idx()
889 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()
891 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
900 ret = drm_dp_dpcd_read(&pdata->aux, DP_SUPPORTED_LINK_RATES, in ti_sn_bridge_read_valid_rates()
904 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
930 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
935 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()
937 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
945 DRM_DEV_ERROR(pdata->dev, in ti_sn_bridge_read_valid_rates()
967 get_new_adjusted_display_mode(&pdata->bridge, state); in ti_sn_bridge_set_video_timings()
970 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in ti_sn_bridge_set_video_timings()
972 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in ti_sn_bridge_set_video_timings()
976 mode->hdisplay); in ti_sn_bridge_set_video_timings()
978 mode->vdisplay); in ti_sn_bridge_set_video_timings()
979 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
980 (mode->hsync_end - mode->hsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
981 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
982 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
984 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG, in ti_sn_bridge_set_video_timings()
985 (mode->vsync_end - mode->vsync_start) & 0xFF); in ti_sn_bridge_set_video_timings()
986 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG, in ti_sn_bridge_set_video_timings()
987 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) | in ti_sn_bridge_set_video_timings()
990 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
991 (mode->htotal - mode->hsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
992 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG, in ti_sn_bridge_set_video_timings()
993 (mode->vtotal - mode->vsync_end) & 0xFF); in ti_sn_bridge_set_video_timings()
995 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
996 (mode->hsync_start - mode->hdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
997 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG, in ti_sn_bridge_set_video_timings()
998 (mode->vsync_start - mode->vdisplay) & 0xFF); in ti_sn_bridge_set_video_timings()
1008 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LANE_COUNT, &data); in ti_sn_get_max_lanes()
1010 DRM_DEV_ERROR(pdata->dev, in ti_sn_get_max_lanes()
1011 "Can't read lane count (%d); assuming 4\n", ret); in ti_sn_get_max_lanes()
1026 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG, in ti_sn_link_training()
1030 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1); in ti_sn_link_training()
1032 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val, in ti_sn_link_training()
1048 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A); in ti_sn_link_training()
1049 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val, in ti_sn_link_training()
1057 ret = -EIO; in ti_sn_link_training()
1066 DRM_DEV_INFO(pdata->dev, "Link training needed %d retries\n", i); in ti_sn_link_training()
1071 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_link_training()
1085 int ret = -EINVAL; in ti_sn_bridge_atomic_enable()
1090 bridge->encoder); in ti_sn_bridge_atomic_enable()
1092 dev_err_ratelimited(pdata->dev, "Could not get the connector\n"); in ti_sn_bridge_atomic_enable()
1097 pdata->dp_lanes = min(pdata->dp_lanes, max_dp_lanes); in ti_sn_bridge_atomic_enable()
1099 /* DSI_A lane config */ in ti_sn_bridge_atomic_enable()
1100 val = CHA_DSI_LANES(SN_MAX_DP_LANES - pdata->dsi->lanes); in ti_sn_bridge_atomic_enable()
1101 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG, in ti_sn_bridge_atomic_enable()
1104 regmap_write(pdata->regmap, SN_LN_ASSIGN_REG, pdata->ln_assign); in ti_sn_bridge_atomic_enable()
1105 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, LN_POLRS_MASK, in ti_sn_bridge_atomic_enable()
1106 pdata->ln_polrs << LN_POLRS_OFFSET); in ti_sn_bridge_atomic_enable()
1120 if (pdata->bridge.type == DRM_MODE_CONNECTOR_eDP) { in ti_sn_bridge_atomic_enable()
1121 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_atomic_enable()
1124 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1127 regmap_update_bits(pdata->regmap, SN_TRAINING_SETTING_REG, in ti_sn_bridge_atomic_enable()
1134 regmap_update_bits(pdata->regmap, SN_DATA_FORMAT_REG, BPP_18_RGB, val); in ti_sn_bridge_atomic_enable()
1136 /* DP lane config */ in ti_sn_bridge_atomic_enable()
1137 val = DP_NUM_LANES(min(pdata->dp_lanes, 3)); in ti_sn_bridge_atomic_enable()
1138 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, in ti_sn_bridge_atomic_enable()
1155 DRM_DEV_ERROR(pdata->dev, "%s (%d)\n", last_err_str, ret); in ti_sn_bridge_atomic_enable()
1163 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, in ti_sn_bridge_atomic_enable()
1172 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_atomic_pre_enable()
1174 if (!pdata->refclk) in ti_sn_bridge_atomic_pre_enable()
1187 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1189 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, 0); in ti_sn_bridge_atomic_post_disable()
1191 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); in ti_sn_bridge_atomic_post_disable()
1193 if (!pdata->refclk) in ti_sn_bridge_atomic_post_disable()
1196 pm_runtime_put_sync(pdata->dev); in ti_sn_bridge_atomic_post_disable()
1208 * debounce time (~100-400 ms). in ti_sn_bridge_detect()
1211 regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val); in ti_sn_bridge_detect()
1222 return drm_edid_read_ddc(connector, &pdata->aux.ddc); in ti_sn_bridge_edid_read()
1230 debugfs = debugfs_create_dir(dev_name(pdata->dev), root); in ti_sn65dsi86_debugfs_init()
1244 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_hpd_enable()
1251 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_hpd_disable()
1284 * Read config from the device tree about lane remapping and lane in ti_sn_bridge_parse_lanes()
1285 * polarities. These are optional and we assume identity map and in ti_sn_bridge_parse_lanes()
1287 * data-lanes but not lane-polarities but not vice versa. in ti_sn_bridge_parse_lanes()
1293 endpoint = of_graph_get_endpoint_by_regs(np, 1, -1); in ti_sn_bridge_parse_lanes()
1296 of_property_read_u32_array(endpoint, "data-lanes", in ti_sn_bridge_parse_lanes()
1298 of_property_read_u32_array(endpoint, "lane-polarities", in ti_sn_bridge_parse_lanes()
1307 * data-lanes had fewer elements so that we nicely initialize in ti_sn_bridge_parse_lanes()
1310 for (i = SN_MAX_DP_LANES - 1; i >= 0; i--) { in ti_sn_bridge_parse_lanes()
1316 pdata->dp_lanes = dp_lanes; in ti_sn_bridge_parse_lanes()
1317 pdata->ln_assign = ln_assign; in ti_sn_bridge_parse_lanes()
1318 pdata->ln_polrs = ln_polrs; in ti_sn_bridge_parse_lanes()
1323 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_parse_dsi_host()
1325 pdata->host_node = of_graph_get_remote_node(np, 0, 0); in ti_sn_bridge_parse_dsi_host()
1327 if (!pdata->host_node) { in ti_sn_bridge_parse_dsi_host()
1329 return -ENODEV; in ti_sn_bridge_parse_dsi_host()
1338 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_probe()
1339 struct device_node *np = pdata->dev->of_node; in ti_sn_bridge_probe()
1342 pdata->next_bridge = devm_drm_of_get_bridge(&adev->dev, np, 1, 0); in ti_sn_bridge_probe()
1343 if (IS_ERR(pdata->next_bridge)) in ti_sn_bridge_probe()
1344 return dev_err_probe(&adev->dev, PTR_ERR(pdata->next_bridge), in ti_sn_bridge_probe()
1353 pdata->bridge.of_node = np; in ti_sn_bridge_probe()
1354 pdata->bridge.type = pdata->next_bridge->type == DRM_MODE_CONNECTOR_DisplayPort in ti_sn_bridge_probe()
1357 if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort) { in ti_sn_bridge_probe()
1358 pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT | in ti_sn_bridge_probe()
1371 mutex_lock(&pdata->comms_mutex); in ti_sn_bridge_probe()
1372 if (pdata->comms_enabled) in ti_sn_bridge_probe()
1373 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, in ti_sn_bridge_probe()
1375 mutex_unlock(&pdata->comms_mutex); in ti_sn_bridge_probe()
1378 drm_bridge_add(&pdata->bridge); in ti_sn_bridge_probe()
1382 dev_err_probe(&adev->dev, ret, "failed to attach dsi host\n"); in ti_sn_bridge_probe()
1389 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_probe()
1395 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_bridge_remove()
1400 drm_bridge_remove(&pdata->bridge); in ti_sn_bridge_remove()
1402 of_node_put(pdata->host_node); in ti_sn_bridge_remove()
1417 /* -----------------------------------------------------------------------------
1423 return atomic_xchg(&pdata->pwm_pin_busy, 1) ? -EBUSY : 0; in ti_sn_pwm_pin_request()
1428 atomic_set(&pdata->pwm_pin_busy, 0); in ti_sn_pwm_pin_release()
1452 * - The PWM signal is not driven when the chip is powered down, or in its
1454 * described in the documentation. In order to save power, state->enabled is
1457 * - Changing both period and duty_cycle is not done atomically, neither is the
1458 * multi-byte register updates, so the output might briefly be undefined
1473 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1479 if (state->enabled) { in ti_sn_pwm_apply()
1480 if (!pdata->pwm_enabled) { in ti_sn_pwm_apply()
1486 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_pwm_apply()
1499 * PWM_FREQ = ----------------------------------- in ti_sn_pwm_apply()
1514 * PWM_PRE_DIV >= ------------------------- in ti_sn_pwm_apply()
1523 * BACKLIGHT_SCALE = ---------------------- - 1 in ti_sn_pwm_apply()
1531 if (state->period <= NSEC_PER_SEC / pdata->pwm_refclk_freq) { in ti_sn_pwm_apply()
1532 ret = -EINVAL; in ti_sn_pwm_apply()
1541 pdata->pwm_refclk_freq); in ti_sn_pwm_apply()
1542 period = min(state->period, period_max); in ti_sn_pwm_apply()
1544 pre_div = DIV64_U64_ROUND_UP(period * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1546 scale = div64_u64(period * pdata->pwm_refclk_freq, (u64)NSEC_PER_SEC * pre_div) - 1; in ti_sn_pwm_apply()
1552 * ------- = --------------------- in ti_sn_pwm_apply()
1559 backlight = div64_u64(state->duty_cycle * pdata->pwm_refclk_freq, in ti_sn_pwm_apply()
1564 ret = regmap_write(pdata->regmap, SN_PWM_PRE_DIV_REG, pre_div); in ti_sn_pwm_apply()
1574 pwm_en_inv = FIELD_PREP(SN_PWM_EN_MASK, state->enabled) | in ti_sn_pwm_apply()
1575 FIELD_PREP(SN_PWM_INV_MASK, state->polarity == PWM_POLARITY_INVERSED); in ti_sn_pwm_apply()
1576 ret = regmap_write(pdata->regmap, SN_PWM_EN_INV_REG, pwm_en_inv); in ti_sn_pwm_apply()
1582 pdata->pwm_enabled = state->enabled; in ti_sn_pwm_apply()
1585 if (!pdata->pwm_enabled) in ti_sn_pwm_apply()
1601 ret = regmap_read(pdata->regmap, SN_PWM_EN_INV_REG, &pwm_en_inv); in ti_sn_pwm_get_state()
1613 ret = regmap_read(pdata->regmap, SN_PWM_PRE_DIV_REG, &pre_div); in ti_sn_pwm_get_state()
1617 state->enabled = FIELD_GET(SN_PWM_EN_MASK, pwm_en_inv); in ti_sn_pwm_get_state()
1619 state->polarity = PWM_POLARITY_INVERSED; in ti_sn_pwm_get_state()
1621 state->polarity = PWM_POLARITY_NORMAL; in ti_sn_pwm_get_state()
1623 state->period = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * (scale + 1), in ti_sn_pwm_get_state()
1624 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1625 state->duty_cycle = DIV_ROUND_UP_ULL((u64)NSEC_PER_SEC * pre_div * backlight, in ti_sn_pwm_get_state()
1626 pdata->pwm_refclk_freq); in ti_sn_pwm_get_state()
1628 if (state->duty_cycle > state->period) in ti_sn_pwm_get_state()
1629 state->duty_cycle = state->period; in ti_sn_pwm_get_state()
1645 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_probe()
1647 pdata->pchip = chip = devm_pwmchip_alloc(&adev->dev, 1, 0); in ti_sn_pwm_probe()
1653 chip->ops = &ti_sn_pwm_ops; in ti_sn_pwm_probe()
1654 chip->of_xlate = of_pwm_single_xlate; in ti_sn_pwm_probe()
1656 devm_pm_runtime_enable(&adev->dev); in ti_sn_pwm_probe()
1663 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_pwm_remove()
1665 pwmchip_remove(pdata->pchip); in ti_sn_pwm_remove()
1667 if (pdata->pwm_enabled) in ti_sn_pwm_remove()
1668 pm_runtime_put_sync(&adev->dev); in ti_sn_pwm_remove()
1701 /* -----------------------------------------------------------------------------
1710 if (WARN_ON(gpiospec->args_count < chip->of_gpio_n_cells)) in tn_sn_bridge_of_xlate()
1711 return -EINVAL; in tn_sn_bridge_of_xlate()
1713 if (gpiospec->args[0] > chip->ngpio || gpiospec->args[0] < 1) in tn_sn_bridge_of_xlate()
1714 return -EINVAL; in tn_sn_bridge_of_xlate()
1717 *flags = gpiospec->args[1]; in tn_sn_bridge_of_xlate()
1719 return gpiospec->args[0] - SN_GPIO_PHYSICAL_OFFSET; in tn_sn_bridge_of_xlate()
1733 return test_bit(offset, pdata->gchip_output) ? in ti_sn_bridge_gpio_get_direction()
1745 * powered--we just power it on to read the pin. NOTE: part of in ti_sn_bridge_gpio_get()
1751 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_get()
1752 ret = regmap_read(pdata->regmap, SN_GPIO_IO_REG, &val); in ti_sn_bridge_gpio_get()
1753 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_get()
1767 if (!test_bit(offset, pdata->gchip_output)) { in ti_sn_bridge_gpio_set()
1768 dev_err(pdata->dev, "Ignoring GPIO set while input\n"); in ti_sn_bridge_gpio_set()
1773 ret = regmap_update_bits(pdata->regmap, SN_GPIO_IO_REG, in ti_sn_bridge_gpio_set()
1777 dev_warn(pdata->dev, in ti_sn_bridge_gpio_set()
1788 if (!test_and_clear_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_input()
1791 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_input()
1795 set_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_input()
1804 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_input()
1816 if (test_and_set_bit(offset, pdata->gchip_output)) in ti_sn_bridge_gpio_direction_output()
1819 pm_runtime_get_sync(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1825 ret = regmap_update_bits(pdata->regmap, SN_GPIO_CTRL_REG, in ti_sn_bridge_gpio_direction_output()
1829 clear_bit(offset, pdata->gchip_output); in ti_sn_bridge_gpio_direction_output()
1830 pm_runtime_put_autosuspend(pdata->dev); in ti_sn_bridge_gpio_direction_output()
1864 struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent); in ti_sn_gpio_probe()
1868 if (!of_property_read_bool(pdata->dev->of_node, "gpio-controller")) in ti_sn_gpio_probe()
1871 pdata->gchip.label = dev_name(pdata->dev); in ti_sn_gpio_probe()
1872 pdata->gchip.parent = pdata->dev; in ti_sn_gpio_probe()
1873 pdata->gchip.owner = THIS_MODULE; in ti_sn_gpio_probe()
1874 pdata->gchip.of_xlate = tn_sn_bridge_of_xlate; in ti_sn_gpio_probe()
1875 pdata->gchip.of_gpio_n_cells = 2; in ti_sn_gpio_probe()
1876 pdata->gchip.request = ti_sn_bridge_gpio_request; in ti_sn_gpio_probe()
1877 pdata->gchip.free = ti_sn_bridge_gpio_free; in ti_sn_gpio_probe()
1878 pdata->gchip.get_direction = ti_sn_bridge_gpio_get_direction; in ti_sn_gpio_probe()
1879 pdata->gchip.direction_input = ti_sn_bridge_gpio_direction_input; in ti_sn_gpio_probe()
1880 pdata->gchip.direction_output = ti_sn_bridge_gpio_direction_output; in ti_sn_gpio_probe()
1881 pdata->gchip.get = ti_sn_bridge_gpio_get; in ti_sn_gpio_probe()
1882 pdata->gchip.set = ti_sn_bridge_gpio_set; in ti_sn_gpio_probe()
1883 pdata->gchip.can_sleep = true; in ti_sn_gpio_probe()
1884 pdata->gchip.names = ti_sn_bridge_gpio_names; in ti_sn_gpio_probe()
1885 pdata->gchip.ngpio = SN_NUM_GPIOS; in ti_sn_gpio_probe()
1886 pdata->gchip.base = -1; in ti_sn_gpio_probe()
1887 ret = devm_gpiochip_add_data(&adev->dev, &pdata->gchip, pdata); in ti_sn_gpio_probe()
1889 dev_err(pdata->dev, "can't add gpio chip\n"); in ti_sn_gpio_probe()
1924 /* -----------------------------------------------------------------------------
1942 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i]; in ti_sn65dsi86_parse_regulators()
1944 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM, in ti_sn65dsi86_parse_regulators()
1945 pdata->supplies); in ti_sn65dsi86_parse_regulators()
1950 struct device *dev = &client->dev; in ti_sn65dsi86_probe()
1955 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { in ti_sn65dsi86_probe()
1957 return -ENODEV; in ti_sn65dsi86_probe()
1964 pdata->dev = dev; in ti_sn65dsi86_probe()
1966 mutex_init(&pdata->comms_mutex); in ti_sn65dsi86_probe()
1968 pdata->regmap = devm_regmap_init_i2c(client, in ti_sn65dsi86_probe()
1970 if (IS_ERR(pdata->regmap)) in ti_sn65dsi86_probe()
1971 return dev_err_probe(dev, PTR_ERR(pdata->regmap), in ti_sn65dsi86_probe()
1974 pdata->enable_gpio = devm_gpiod_get_optional(dev, "enable", in ti_sn65dsi86_probe()
1976 if (IS_ERR(pdata->enable_gpio)) in ti_sn65dsi86_probe()
1977 return dev_err_probe(dev, PTR_ERR(pdata->enable_gpio), in ti_sn65dsi86_probe()
1984 pdata->refclk = devm_clk_get_optional(dev, "refclk"); in ti_sn65dsi86_probe()
1985 if (IS_ERR(pdata->refclk)) in ti_sn65dsi86_probe()
1986 return dev_err_probe(dev, PTR_ERR(pdata->refclk), in ti_sn65dsi86_probe()
1990 pm_runtime_set_autosuspend_delay(pdata->dev, 500); in ti_sn65dsi86_probe()
1991 pm_runtime_use_autosuspend(pdata->dev); in ti_sn65dsi86_probe()
1997 ret = regmap_bulk_read(pdata->regmap, SN_DEVICE_ID_REGS, id_buf, ARRAY_SIZE(id_buf)); in ti_sn65dsi86_probe()
2004 return dev_err_probe(dev, -EOPNOTSUPP, "unsupported device id\n"); in ti_sn65dsi86_probe()
2008 * motiviation here is to solve the chicken-and-egg problem of probe in ti_sn65dsi86_probe()
2012 * bus or the pwm_chip. Having sub-devices allows the some sub devices in ti_sn65dsi86_probe()
2013 * to finish probing even if others return -EPROBE_DEFER and gets us in ti_sn65dsi86_probe()
2018 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->gpio_aux, "gpio"); in ti_sn65dsi86_probe()
2024 ret = ti_sn65dsi86_add_aux_device(pdata, &pdata->pwm_aux, "pwm"); in ti_sn65dsi86_probe()
2035 return ti_sn65dsi86_add_aux_device(pdata, &pdata->aux_aux, "aux"); in ti_sn65dsi86_probe()