1 // SPDX-License-Identifier: GPL-2.0
24 #define FLD_MASK(start, end)    (((1 << ((start) - (end) + 1)) - 1) << (end))
32 #define PPI_D0S_CLRSIPOCOUNT	0x0164 /* Assertion timer for Lane 0 */
33 #define PPI_D1S_CLRSIPOCOUNT	0x0168 /* Assertion timer for Lane 1 */
34 #define PPI_D2S_CLRSIPOCOUNT	0x016C /* Assertion timer for Lane 2 */
35 #define PPI_D3S_CLRSIPOCOUNT	0x0170 /* Assertion timer for Lane 3 */
39 #define DSI_STARTDSI		0x0204 /* START control bit of DSI-TX */
51 #define VP_CTRL_DEPOL		BIT(18) /* Polarity of DE signal */
121 #define SYS_RST_I2CS		BIT(0) /* Reset I2C-Slave controller */
122 #define SYS_RST_I2CM		BIT(1) /* Reset I2C-Master controller */
125 #define SYS_RST_DSIRX		BIT(4) /* Reset DSI-RX and App controller */
160 	int ret = ctx->error;  in tc358764_clear_error()
162 	ctx->error = 0;  in tc358764_clear_error()
168 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);  in tc358764_read()
171 	if (ctx->error)  in tc358764_read()
179 	dev_dbg(ctx->dev, "read: addr=0x%04x data=0x%08x\n", addr, *val);  in tc358764_read()
184 	struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);  in tc358764_write()
188 	if (ctx->error)  in tc358764_write()
200 		ctx->error = ret;  in tc358764_write()
213 	if (ctx->error)  in tc358764_init()
215 	dev_info(ctx->dev, "ID: %#x\n", v);  in tc358764_init()
264 	gpiod_set_value(ctx->gpio_reset, 1);  in tc358764_reset()
266 	gpiod_set_value(ctx->gpio_reset, 0);  in tc358764_reset()
277 	ret = regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);  in tc358764_post_disable()
279 		dev_err(ctx->dev, "error disabling regulators (%d)\n", ret);  in tc358764_post_disable()
287 	ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);  in tc358764_pre_enable()
289 		dev_err(ctx->dev, "error enabling regulators (%d)\n", ret);  in tc358764_pre_enable()
294 		dev_err(ctx->dev, "error initializing bridge (%d)\n", ret);  in tc358764_pre_enable()
302 	return drm_bridge_attach(bridge->encoder, ctx->next_bridge, bridge, flags);  in tc358764_attach()
313 	struct device *dev = ctx->dev;  in tc358764_parse_dt()
315 	ctx->gpio_reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);  in tc358764_parse_dt()
316 	if (IS_ERR(ctx->gpio_reset)) {  in tc358764_parse_dt()
318 		return PTR_ERR(ctx->gpio_reset);  in tc358764_parse_dt()
321 	ctx->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0);  in tc358764_parse_dt()
322 	if (IS_ERR(ctx->next_bridge))  in tc358764_parse_dt()
323 		return PTR_ERR(ctx->next_bridge);  in tc358764_parse_dt()
332 	for (i = 0; i < ARRAY_SIZE(ctx->supplies); ++i)  in tc358764_configure_regulators()
333 		ctx->supplies[i].supply = tc358764_supplies[i];  in tc358764_configure_regulators()
335 	ret = devm_regulator_bulk_get(ctx->dev, ARRAY_SIZE(ctx->supplies),  in tc358764_configure_regulators()
336 				      ctx->supplies);  in tc358764_configure_regulators()
338 		dev_err(ctx->dev, "failed to get regulators: %d\n", ret);  in tc358764_configure_regulators()
345 	struct device *dev = &dsi->dev;  in tc358764_probe()
351 		return -ENOMEM;  in tc358764_probe()
355 	ctx->dev = dev;  in tc358764_probe()
357 	dsi->lanes = 4;  in tc358764_probe()
358 	dsi->format = MIPI_DSI_FMT_RGB888;  in tc358764_probe()
359 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST  in tc358764_probe()
370 	ctx->bridge.funcs = &tc358764_bridge_funcs;  in tc358764_probe()
371 	ctx->bridge.of_node = dev->of_node;  in tc358764_probe()
372 	ctx->bridge.pre_enable_prev_first = true;  in tc358764_probe()
374 	drm_bridge_add(&ctx->bridge);  in tc358764_probe()
378 		drm_bridge_remove(&ctx->bridge);  in tc358764_probe()
390 	drm_bridge_remove(&ctx->bridge);  in tc358764_remove()
411 MODULE_DESCRIPTION("MIPI-DSI based Driver for TC358764 DSI/LVDS Bridge");