Lines Matching +full:dual +full:- +full:lane
1 // SPDX-License-Identifier: GPL-2.0+
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
17 #include <linux/media-bus-format.h>
197 #define N_LANES(n) (((n) - 1) & 0x3)
253 unsigned int lane_mbps; /* per lane */
269 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
270 struct dw_mipi_dsi *slave; /* dual-dsi slave ptr */
281 return dsi->slave || dsi->master;
309 writel(val, dsi->base + reg);
314 return readl(dsi->base + reg);
321 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data;
325 if (device->lanes > dsi->plat_data->max_data_lanes) {
326 dev_err(dsi->dev, "the number of data lanes(%u) is too many\n",
327 device->lanes);
328 return -EINVAL;
331 dsi->lanes = device->lanes;
332 dsi->channel = device->channel;
333 dsi->format = device->format;
334 dsi->mode_flags = device->mode_flags;
336 bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node, 1, 0);
340 bridge->pre_enable_prev_first = true;
341 dsi->panel_bridge = bridge;
343 drm_bridge_add(&dsi->bridge);
345 if (pdata->host_ops && pdata->host_ops->attach) {
346 ret = pdata->host_ops->attach(pdata->priv_data, device);
358 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data;
361 if (pdata->host_ops && pdata->host_ops->detach) {
362 ret = pdata->host_ops->detach(pdata->priv_data, device);
367 drm_of_panel_bridge_remove(host->dev->of_node, 1, 0);
369 drm_bridge_remove(&dsi->bridge);
377 bool lpm = msg->flags & MIPI_DSI_MSG_USE_LPM;
383 * should be computed according to byte lane, lane number and only
389 if (msg->flags & MIPI_DSI_MSG_REQ_ACK)
409 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
413 dev_err(dsi->dev, "failed to get available command FIFO\n");
420 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
424 dev_err(dsi->dev, "failed to write command FIFO\n");
434 const u8 *tx_buf = packet->payload;
435 int len = packet->payload_length, pld_data_bytes = sizeof(u32), ret;
449 len -= pld_data_bytes;
452 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
456 dev_err(dsi->dev,
463 memcpy(&word, packet->header, sizeof(packet->header));
470 int i, j, ret, len = msg->rx_len;
471 u8 *buf = msg->rx_buf;
475 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
479 dev_err(dsi->dev, "Timeout during read operation\n");
485 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS,
489 dev_err(dsi->dev, "Read payload FIFO is empty\n");
510 dev_err(dsi->dev, "failed to create packet: %d\n", ret);
515 if (dsi->slave)
516 dw_mipi_message_config(dsi->slave, msg);
521 if (dsi->slave) {
522 ret = dw_mipi_dsi_write(dsi->slave, &packet);
527 if (msg->rx_buf && msg->rx_len) {
531 nb_bytes = msg->rx_len;
554 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data;
557 if (pdata->get_input_bus_fmts)
558 return pdata->get_input_bus_fmts(pdata->priv_data,
579 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data;
582 bridge_state->input_bus_cfg.flags =
585 if (pdata->mode_fixup) {
586 ret = pdata->mode_fixup(pdata->priv_data, &crtc_state->mode,
587 &crtc_state->adjusted_mode);
590 DRM_MODE_ARG(&crtc_state->mode));
591 return -EINVAL;
604 * enabling low power is panel-dependent, we should use the
609 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
611 else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
617 if (dsi->vpg_defs.vpg) {
619 val |= dsi->vpg_defs.vpg_horizontal ?
621 val |= dsi->vpg_defs.vpg_ber_pattern ? VID_MODE_VPG_MODE : 0;
643 if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
658 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops;
667 if (phy_ops->get_esc_clk_rate) {
668 ret = phy_ops->get_esc_clk_rate(dsi->plat_data->priv_data,
681 esc_clk_division = (dsi->lane_mbps >> 3) / esc_rate + 1;
688 * high speed transmission counter timeout and byte lane...
699 switch (dsi->format) {
714 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
716 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
719 dsi_write(dsi, DSI_DPI_VCID, DPI_VCID(dsi->channel));
728 if (dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)
739 * only burst mode is supported here. For non-burst video modes,
742 * non-burst video modes, see dw_mipi_dsi_video_mode_config()...
747 VID_PKT_SIZE(mode->hdisplay / 2) :
748 VID_PKT_SIZE(mode->hdisplay));
756 * to the timeout clock division (TO_CLK_DIVISION) and byte lane...
761 * the Bus-Turn-Around Timeout Counter should be computed
762 * according to byte lane...
772 return minimum_lbccs[dsi->lanes - 1];
775 /* Get lane byte clock cycles. */
783 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
785 lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
788 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
790 dev_err(dsi->dev, "failed to get bpp\n");
794 lbcc = div_u64((u64)hcomponent * mode->clock * bpp, dsi->lanes * 8);
797 frac = lbcc % mode->clock;
798 lbcc = lbcc / mode->clock;
815 htotal = mode->htotal;
816 hsa = mode->hsync_end - mode->hsync_start;
817 hbp = mode->htotal - mode->hsync_end;
838 vactive = mode->vdisplay;
839 vsa = mode->vsync_end - mode->vsync_start;
840 vfp = mode->vsync_start - mode->vdisplay;
841 vbp = mode->vtotal - mode->vsync_end;
851 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops;
856 ret = phy_ops->get_timing(dsi->plat_data->priv_data,
857 dsi->lane_mbps, &timing);
859 DRM_DEV_ERROR(dsi->dev, "Retrieving phy timings failed\n");
863 * data & clock lane timers should be computed according to panel
864 * blankings and to the automatic clock lane control mode...
896 N_LANES(dsi->lanes));
917 ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val,
922 ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS,
926 DRM_DEBUG_DRIVER("failed to wait phy clk lane stop state\n");
941 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops;
944 * Switch to command mode before panel-bridge post_disable &
946 * Note: panel-bridge disable & panel disable has been called
951 if (phy_ops->power_off)
952 phy_ops->power_off(dsi->plat_data->priv_data);
954 if (dsi->slave) {
955 dw_mipi_dsi_disable(dsi->slave);
956 clk_disable_unprepare(dsi->slave->pclk);
957 pm_runtime_put(dsi->slave->dev);
961 clk_disable_unprepare(dsi->pclk);
962 pm_runtime_put(dsi->dev);
968 if (dsi->master)
969 return dsi->master->lanes + dsi->lanes;
972 if (dsi->slave)
973 return dsi->lanes + dsi->slave->lanes;
975 /* single-dsi, so no other instance to consider */
976 return dsi->lanes;
982 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops;
983 void *priv_data = dsi->plat_data->priv_data;
987 clk_prepare_enable(dsi->pclk);
989 ret = phy_ops->get_lane_mbps(priv_data, adjusted_mode, dsi->mode_flags,
990 lanes, dsi->format, &dsi->lane_mbps);
994 pm_runtime_get_sync(dsi->dev);
1010 ret = phy_ops->init(priv_data);
1018 /* Switch to cmd mode for panel-bridge pre_enable & panel prepare */
1021 if (phy_ops->power_on)
1022 phy_ops->power_on(dsi->plat_data->priv_data);
1031 dw_mipi_dsi_mode_set(dsi, &dsi->mode);
1032 if (dsi->slave)
1033 dw_mipi_dsi_mode_set(dsi->slave, &dsi->mode);
1043 drm_mode_copy(&dsi->mode, adjusted_mode);
1051 /* Switch to video mode for panel-bridge enable & panel enable */
1053 if (dsi->slave)
1054 dw_mipi_dsi_set_mode(dsi->slave, MIPI_DSI_MODE_VIDEO);
1063 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data;
1066 if (pdata->mode_valid)
1067 mode_status = pdata->mode_valid(pdata->priv_data, mode,
1068 dsi->mode_flags,
1070 dsi->format);
1082 encoder->encoder_type = DRM_MODE_ENCODER_DSI;
1084 /* Attach the panel-bridge to the dsi bridge */
1085 return drm_bridge_attach(encoder, dsi->panel_bridge, bridge,
1112 return -ENODEV;
1114 dsi = vpg->dsi;
1116 *vpg->reg = (bool)val;
1120 if (*vpg->reg)
1121 mode_cfg |= vpg->mask;
1123 mode_cfg &= ~vpg->mask;
1135 return -ENODEV;
1137 *val = *vpg->reg;
1155 dsi->debugfs_vpg = kmemdup(debugfs, sizeof(debugfs), GFP_KERNEL);
1156 if (!dsi->debugfs_vpg)
1160 debugfs_create_file(dsi->debugfs_vpg[i].name, 0644,
1161 dsi->debugfs, &dsi->debugfs_vpg[i],
1167 dsi->debugfs = debugfs_create_dir(dev_name(dsi->dev), NULL);
1168 if (IS_ERR(dsi->debugfs)) {
1169 dev_err(dsi->dev, "failed to create debugfs root\n");
1178 debugfs_remove_recursive(dsi->debugfs);
1179 kfree(dsi->debugfs_vpg);
1193 struct device *dev = &pdev->dev;
1203 dsi->dev = dev;
1204 dsi->plat_data = plat_data;
1206 if (!plat_data->phy_ops->init || !plat_data->phy_ops->get_lane_mbps ||
1207 !plat_data->phy_ops->get_timing) {
1209 return ERR_PTR(-ENODEV);
1212 if (!plat_data->base) {
1213 dsi->base = devm_platform_ioremap_resource(pdev, 0);
1214 if (IS_ERR(dsi->base))
1215 return ERR_PTR(-ENODEV);
1218 dsi->base = plat_data->base;
1221 dsi->pclk = devm_clk_get(dev, "pclk");
1222 if (IS_ERR(dsi->pclk)) {
1223 ret = PTR_ERR(dsi->pclk);
1236 if (ret != -EPROBE_DEFER)
1243 ret = clk_prepare_enable(dsi->pclk);
1253 clk_disable_unprepare(dsi->pclk);
1259 dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
1260 dsi->dsi_host.dev = dev;
1261 ret = mipi_dsi_host_register(&dsi->dsi_host);
1269 dsi->bridge.driver_private = dsi;
1270 dsi->bridge.of_node = pdev->dev.of_node;
1277 mipi_dsi_host_unregister(&dsi->dsi_host);
1279 pm_runtime_disable(dsi->dev);
1286 dsi->slave = slave;
1287 dsi->slave->master = dsi;
1290 dsi->slave->lanes = dsi->lanes;
1291 dsi->slave->channel = dsi->channel;
1292 dsi->slave->format = dsi->format;
1293 dsi->slave->mode_flags = dsi->mode_flags;
1299 return &dsi->bridge;
1325 return drm_bridge_attach(encoder, &dsi->bridge, NULL, 0);
1334 MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
1338 MODULE_ALIAS("platform:dw-mipi-dsi");