Lines Matching refs:post_divider
363 u8 *post_divider)
381 for (*post_divider = 1;
382 pixelclock < (PLL_OUT_FREQ_MIN / (*post_divider));)
383 *post_divider += 1;
385 if (*post_divider > POST_DIVIDER_MAX) {
386 for (*post_divider = 1;
388 (PLL_OUT_FREQ_ABS_MIN / (*post_divider)));)
389 *post_divider += 1;
391 if (*post_divider > POST_DIVIDER_MAX) {
392 DRM_ERROR("cannot find property post_divider(%d)\n",
393 *post_divider);
399 if (*post_divider == 7) {
401 *post_divider = 8;
402 } else if (*post_divider == 11) {
404 *post_divider = 12;
405 } else if ((*post_divider == 13) || (*post_divider == 14)) {
407 *post_divider = 15;
410 if (pixelclock * (*post_divider) > PLL_OUT_FREQ_ABS_MAX) {
412 pixelclock * (*post_divider),
418 *n = XTAL_FRQ / (*post_divider);
426 u8 post_divider)
440 post_divider << 4);
485 u8 post_divider = 0;
488 &m, &n, &post_divider);
496 m, n, post_divider);
568 ret |= anx7625_odfc_config(ctx, post_divider - 1);