Lines Matching refs:pixelclock
360 static int anx7625_calculate_m_n(u32 pixelclock,
365 if (pixelclock > PLL_OUT_FREQ_ABS_MAX / POST_DIVIDER_MIN) {
367 DRM_ERROR("pixelclock too high, act(%d), maximum(%lu)\n",
368 pixelclock,
373 if (pixelclock < PLL_OUT_FREQ_ABS_MIN / POST_DIVIDER_MAX) {
375 DRM_ERROR("pixelclock too low, act(%d), maximum(%lu)\n",
376 pixelclock,
382 pixelclock < (PLL_OUT_FREQ_MIN / (*post_divider));)
387 (pixelclock <
410 if (pixelclock * (*post_divider) > PLL_OUT_FREQ_ABS_MAX) {
412 pixelclock * (*post_divider),
417 *m = pixelclock;
487 ret = anx7625_calculate_m_n(ctx->dt.pixelclock.min * 1000,
500 (ctx->dt.pixelclock.min / 1000) & 0xFF);
502 (ctx->dt.pixelclock.min / 1000) >> 8);
694 u16 freq = ctx->dt.pixelclock.min / 1000;
2194 "drm mode invalid, pixelclock too high.\n");
2212 ctx->dt.pixelclock.min = mode->clock;
2224 DRM_DEV_DEBUG_DRIVER(dev, "pixelclock(%d).\n", ctx->dt.pixelclock.min);