Lines Matching full:register

9 /* Register definitions for TX_P2                              */
13  * Core Register Definitions
16 /* Device ID Low Byte Register */
19 /* Device ID High Byte Register */
22 /* Device version register */
25 /* Power Down Control Register */
34 /* Reset Control Register 1 */
45 /* Reset Control Register 2 */
51 /* Video Control Register 1 */
58 /* Video Control Register 2 */
70 /* Video Control Register 3 */
74 /* Video Control Register 5 */
85 /* Video Control Register 6 */
94 /* Video Control Register 8 */
98 /* Total Line Status Low Byte Register */
101 /* Total Line Status High Byte Register */
104 /* Active Line Status Low Byte Register */
107 /* Active Line Status High Byte Register */
110 /* Vertical Front Porch Status Register */
113 /* Vertical SYNC Width Status Register */
116 /* Vertical Back Porch Status Register */
119 /* Total Pixel Status Low Byte Register */
122 /* Total Pixel Status High Byte Register */
125 /* Active Pixel Status Low Byte Register */
128 /* Active Pixel Status High Byte Register */
131 /* Horizontal Front Porch Status Low Byte Register */
134 /* Horizontal Front Porch Statys High Byte Register */
137 /* Horizontal SYNC Width Status Low Byte Register */
140 /* Horizontal SYNC Width Status High Byte Register */
143 /* Horizontal Back Porch Status Low Byte Register */
146 /* Horizontal Back Porch Status High Byte Register */
149 /* InfoFrame AVI Packet DB1 Register */
152 /* Bit Control Specific Register */
157 /* InfoFrame Audio Packet DB1 Register */
160 /* InfoFrame MPEG Packet DB1 Register */
166 /* Audio Channel Num Register 5 */
180 /* Analog Debug Register 1 */
183 /* Analog Debug Register 2 */
196 /* Analog Control 0 Register */
199 /* Common Interrupt Status Register 1 */
203 /* Common Interrupt Status Register 2 */
210 /* Common Interrupt Status Register 4 */
218 /* DP Interrupt Status Register */
223 /* Common Interrupt Mask Register */
228 /* DP Interrupts Mask Register */
231 /* Interrupt Control Register */