Lines Matching +full:0 +full:xf004
40 static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
41 static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff };
49 for (i = 0x81; i <= 0x9f; i++) in ast_set_def_ext_reg()
50 ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00); in ast_set_def_ext_reg()
57 index = 0xa0; in ast_set_def_ext_reg()
58 while (*ext_reg_info != 0xff) { in ast_set_def_ext_reg()
59 ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info); in ast_set_def_ext_reg()
65 /* ast_set_index_reg-mask(ast, AST_IO_VGACRI, 0xa1, 0xff, 0x3); */ in ast_set_def_ext_reg()
68 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01); in ast_set_def_ext_reg()
69 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00); in ast_set_def_ext_reg()
72 reg = 0x04; in ast_set_def_ext_reg()
74 reg |= 0x20; in ast_set_def_ext_reg()
75 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg); in ast_set_def_ext_reg()
82 __ast_write32(regs, 0xf004, r & 0xffff0000); in __ast_mindwm()
83 __ast_write32(regs, 0xf000, 0x1); in __ast_mindwm()
86 data = __ast_read32(regs, 0xf004) & 0xffff0000; in __ast_mindwm()
87 } while (data != (r & 0xffff0000)); in __ast_mindwm()
89 return __ast_read32(regs, 0x10000 + (r & 0x0000ffff)); in __ast_mindwm()
96 __ast_write32(regs, 0xf004, r & 0xffff0000); in __ast_moutdwm()
97 __ast_write32(regs, 0xf000, 0x1); in __ast_moutdwm()
100 data = __ast_read32(regs, 0xf004) & 0xffff0000; in __ast_moutdwm()
101 } while (data != (r & 0xffff0000)); in __ast_moutdwm()
103 __ast_write32(regs, 0x10000 + (r & 0x0000ffff), v); in __ast_moutdwm()
128 0xFF00FF00,
129 0xCC33CC33,
130 0xAA55AA55,
131 0xFFFE0001,
132 0x683501FE,
133 0x0F1929B0,
134 0x2D0B4346,
135 0x60767F02,
136 0x6FBE36A6,
137 0x3A253035,
138 0x3019686D,
139 0x41C6167E,
140 0x620152BF,
141 0x20F050E0
148 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
149 ast_moutdwm(ast, 0x1e6e0070, 0x00000001 | (datagen << 3)); in mmctestburst2_ast2150()
150 timeout = 0; in mmctestburst2_ast2150()
152 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
154 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
155 return 0xffffffff; in mmctestburst2_ast2150()
158 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
159 ast_moutdwm(ast, 0x1e6e0070, 0x00000003 | (datagen << 3)); in mmctestburst2_ast2150()
160 timeout = 0; in mmctestburst2_ast2150()
162 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
164 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
165 return 0xffffffff; in mmctestburst2_ast2150()
168 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7; in mmctestburst2_ast2150()
169 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
173 #if 0 /* unused in DDX driver - here for completeness */
178 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
179 ast_moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen << 3));
180 timeout = 0;
182 data = ast_mindwm(ast, 0x1e6e0070) & 0x40;
184 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
185 return 0xffffffff;
188 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7;
189 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
198 for (i = 0; i < 8; i++) in cbrtest_ast2150()
200 return 0; in cbrtest_ast2150()
208 for (patcnt = 0; patcnt < CBR_PATNUM_AST2150; patcnt++) { in cbrscan_ast2150()
209 ast_moutdwm(ast, 0x1e6e007c, pattern_AST2150[patcnt]); in cbrscan_ast2150()
210 for (loop = 0; loop < CBR_PASSNUM_AST2150; loop++) { in cbrscan_ast2150()
215 return 0; in cbrscan_ast2150()
226 dll_min[0] = dll_min[1] = dll_min[2] = dll_min[3] = 0xff; in cbrdlli_ast2150()
227 dll_max[0] = dll_max[1] = dll_max[2] = dll_max[3] = 0x0; in cbrdlli_ast2150()
228 passcnt = 0; in cbrdlli_ast2150()
230 for (dlli = 0; dlli < 100; dlli++) { in cbrdlli_ast2150()
231 ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); in cbrdlli_ast2150()
233 if (data != 0) { in cbrdlli_ast2150()
234 if (data & 0x1) { in cbrdlli_ast2150()
235 if (dll_min[0] > dlli) in cbrdlli_ast2150()
236 dll_min[0] = dlli; in cbrdlli_ast2150()
237 if (dll_max[0] < dlli) in cbrdlli_ast2150()
238 dll_max[0] = dlli; in cbrdlli_ast2150()
244 if (dll_max[0] == 0 || (dll_max[0]-dll_min[0]) < CBR_THRESHOLD_AST2150) in cbrdlli_ast2150()
247 dlli = dll_min[0] + (((dll_max[0] - dll_min[0]) * 7) >> 4); in cbrdlli_ast2150()
248 ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); in cbrdlli_ast2150()
259 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_init_dram_reg()
261 if ((j & 0x80) == 0) { /* VGA only */ in ast_init_dram_reg()
264 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_reg()
265 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_reg()
266 ast_write32(ast, 0x10100, 0xa8); in ast_init_dram_reg()
270 } while (ast_read32(ast, 0x10100) != 0xa8); in ast_init_dram_reg()
277 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_reg()
278 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_reg()
279 ast_write32(ast, 0x12000, 0x1688A8A8); in ast_init_dram_reg()
282 } while (ast_read32(ast, 0x12000) != 0x01); in ast_init_dram_reg()
284 ast_write32(ast, 0x10000, 0xfc600309); in ast_init_dram_reg()
287 } while (ast_read32(ast, 0x10000) != 0x01); in ast_init_dram_reg()
290 while (dram_reg_info->index != 0xffff) { in ast_init_dram_reg()
291 if (dram_reg_info->index == 0xff00) {/* delay fn */ in ast_init_dram_reg()
292 for (i = 0; i < 15; i++) in ast_init_dram_reg()
294 } else if (dram_reg_info->index == 0x4 && !IS_AST_GEN1(ast)) { in ast_init_dram_reg()
297 data = 0x00000d89; in ast_init_dram_reg()
299 data = 0x00000c8d; in ast_init_dram_reg()
301 temp = ast_read32(ast, 0x12070); in ast_init_dram_reg()
302 temp &= 0xc; in ast_init_dram_reg()
304 ast_write32(ast, 0x10000 + dram_reg_info->index, data | temp); in ast_init_dram_reg()
306 ast_write32(ast, 0x10000 + dram_reg_info->index, dram_reg_info->data); in ast_init_dram_reg()
311 data = ast_read32(ast, 0x10120); in ast_init_dram_reg()
312 if (data == 0x5061) { /* 266Mhz */ in ast_init_dram_reg()
313 data = ast_read32(ast, 0x10004); in ast_init_dram_reg()
314 if (data & 0x40) in ast_init_dram_reg()
322 temp = ast_read32(ast, 0x10140); in ast_init_dram_reg()
323 ast_write32(ast, 0x10140, temp | 0x40); in ast_init_dram_reg()
327 temp = ast_read32(ast, 0x1200c); in ast_init_dram_reg()
328 ast_write32(ast, 0x1200c, temp & 0xfffffffd); in ast_init_dram_reg()
329 temp = ast_read32(ast, 0x12040); in ast_init_dram_reg()
330 ast_write32(ast, 0x12040, temp | 0x40); in ast_init_dram_reg()
339 j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_init_dram_reg()
340 } while ((j & 0x40) == 0); in ast_init_dram_reg()
361 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); /* Enable DVO */ in ast_post_gpu()
366 #define AST_DDR3 0
408 0xFF00FF00,
409 0xCC33CC33,
410 0xAA55AA55,
411 0x88778877,
412 0x92CC4D6E,
413 0x543D3CDE,
414 0xF1E843C7,
415 0x7C61D253
422 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test()
423 ast_moutdwm(ast, 0x1e6e0070, (datagen << 3) | test_ctl); in mmc_test()
424 timeout = 0; in mmc_test()
426 data = ast_mindwm(ast, 0x1e6e0070) & 0x3000; in mmc_test()
427 if (data & 0x2000) in mmc_test()
430 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test()
434 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test()
442 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test2()
443 ast_moutdwm(ast, 0x1e6e0070, (datagen << 3) | test_ctl); in mmc_test2()
444 timeout = 0; in mmc_test2()
446 data = ast_mindwm(ast, 0x1e6e0070) & 0x1000; in mmc_test2()
448 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test2()
449 return 0xffffffff; in mmc_test2()
452 data = ast_mindwm(ast, 0x1e6e0078); in mmc_test2()
453 data = (data | (data >> 16)) & 0xffff; in mmc_test2()
454 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test2()
461 return mmc_test(ast, datagen, 0xc1); in mmc_test_burst()
466 return mmc_test2(ast, datagen, 0x41); in mmc_test_burst2()
471 return mmc_test(ast, datagen, 0xc5); in mmc_test_single()
476 return mmc_test2(ast, datagen, 0x05); in mmc_test_single2()
481 return mmc_test(ast, datagen, 0x85); in mmc_test_single_2500()
488 data = mmc_test_single2(ast, 0); in cbr_test()
489 if ((data & 0xff) && (data & 0xff00)) in cbr_test()
490 return 0; in cbr_test()
491 for (i = 0; i < 8; i++) { in cbr_test()
493 if ((data & 0xff) && (data & 0xff00)) in cbr_test()
494 return 0; in cbr_test()
498 else if (data & 0xff) in cbr_test()
508 for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { in cbr_scan()
509 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan()
510 for (loop = 0; loop < CBR_PASSNUM2; loop++) { in cbr_scan()
511 if ((data = cbr_test(ast)) != 0) { in cbr_scan()
514 return 0; in cbr_scan()
519 return 0; in cbr_scan()
528 data = mmc_test_burst2(ast, 0); in cbr_test2()
529 if (data == 0xffff) in cbr_test2()
530 return 0; in cbr_test2()
531 data |= mmc_test_single2(ast, 0); in cbr_test2()
532 if (data == 0xffff) in cbr_test2()
533 return 0; in cbr_test2()
535 return ~data & 0xffff; in cbr_test2()
542 data2 = 0xffff; in cbr_scan2()
543 for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { in cbr_scan2()
544 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan2()
545 for (loop = 0; loop < CBR_PASSNUM2; loop++) { in cbr_scan2()
546 if ((data = cbr_test2(ast)) != 0) { in cbr_scan2()
549 return 0; in cbr_scan2()
554 return 0; in cbr_scan2()
561 if (!mmc_test_burst(ast, 0)) in cbr_test3()
563 if (!mmc_test_single(ast, 0)) in cbr_test3()
572 for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { in cbr_scan3()
573 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan3()
574 for (loop = 0; loop < 2; loop++) { in cbr_scan3()
586 u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt, retry = 0; in finetuneDQI_L()
589 for (cnt = 0; cnt < 16; cnt++) { in finetuneDQI_L()
590 dllmin[cnt] = 0xff; in finetuneDQI_L()
591 dllmax[cnt] = 0x0; in finetuneDQI_L()
593 passcnt = 0; in finetuneDQI_L()
594 for (dlli = 0; dlli < 76; dlli++) { in finetuneDQI_L()
595 ast_moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli << 16) | (dlli << 24)); in finetuneDQI_L()
596 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE1); in finetuneDQI_L()
598 if (data != 0) { in finetuneDQI_L()
599 mask = 0x00010001; in finetuneDQI_L()
600 for (cnt = 0; cnt < 16; cnt++) { in finetuneDQI_L()
616 gold_sadj[0] = 0x0; in finetuneDQI_L()
617 passcnt = 0; in finetuneDQI_L()
618 for (cnt = 0; cnt < 16; cnt++) { in finetuneDQI_L()
620 gold_sadj[0] += dllmin[cnt]; in finetuneDQI_L()
631 gold_sadj[0] = gold_sadj[0] >> 4; in finetuneDQI_L()
632 gold_sadj[1] = gold_sadj[0]; in finetuneDQI_L()
634 data = 0; in finetuneDQI_L()
635 for (cnt = 0; cnt < 8; cnt++) { in finetuneDQI_L()
639 if (gold_sadj[0] >= dlli) { in finetuneDQI_L()
640 dlli = ((gold_sadj[0] - dlli) * 19) >> 5; in finetuneDQI_L()
645 dlli = ((dlli - gold_sadj[0]) * 19) >> 5; in finetuneDQI_L()
649 dlli = (8 - dlli) & 0x7; in finetuneDQI_L()
654 ast_moutdwm(ast, 0x1E6E0080, data); in finetuneDQI_L()
656 data = 0; in finetuneDQI_L()
666 dlli = (dlli - 1) & 0x7; in finetuneDQI_L()
674 dlli = (8 - dlli) & 0x7; in finetuneDQI_L()
679 ast_moutdwm(ast, 0x1E6E0084, data); in finetuneDQI_L()
692 reg_mcr0c = ast_mindwm(ast, 0x1E6E000C); in finetuneDQSI()
693 reg_mcr18 = ast_mindwm(ast, 0x1E6E0018); in finetuneDQSI()
694 reg_mcr18 &= 0x0000ffff; in finetuneDQSI()
695 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); in finetuneDQSI()
697 for (dlli = 0; dlli < 76; dlli++) { in finetuneDQSI()
698 tag[0][dlli] = 0x0; in finetuneDQSI()
699 tag[1][dlli] = 0x0; in finetuneDQSI()
701 for (dqidly = 0; dqidly < 32; dqidly++) { in finetuneDQSI()
702 pass[dqidly][0][0] = 0xff; in finetuneDQSI()
703 pass[dqidly][0][1] = 0x0; in finetuneDQSI()
704 pass[dqidly][1][0] = 0xff; in finetuneDQSI()
705 pass[dqidly][1][1] = 0x0; in finetuneDQSI()
707 for (dqidly = 0; dqidly < 32; dqidly++) { in finetuneDQSI()
708 passcnt[0] = passcnt[1] = 0; in finetuneDQSI()
709 for (dqsip = 0; dqsip < 2; dqsip++) { in finetuneDQSI()
710 ast_moutdwm(ast, 0x1E6E000C, 0); in finetuneDQSI()
711 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18 | (dqidly << 16) | (dqsip << 23)); in finetuneDQSI()
712 ast_moutdwm(ast, 0x1E6E000C, reg_mcr0c); in finetuneDQSI()
713 for (dlli = 0; dlli < 76; dlli++) { in finetuneDQSI()
714 ast_moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); in finetuneDQSI()
715 ast_moutdwm(ast, 0x1E6E0070, 0); in finetuneDQSI()
716 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE0); in finetuneDQSI()
718 if (dlli == 0) in finetuneDQSI()
722 if (dlli < pass[dqidly][dqsip][0]) in finetuneDQSI()
723 pass[dqidly][dqsip][0] = (u16) dlli; in finetuneDQSI()
729 pass[dqidly][dqsip][0] = 0xff; in finetuneDQSI()
730 pass[dqidly][dqsip][1] = 0x0; in finetuneDQSI()
734 if (passcnt[0] == 0 && passcnt[1] == 0) in finetuneDQSI()
738 g_dqidly = g_dqsip = g_margin = g_side = 0; in finetuneDQSI()
740 for (dqidly = 0; dqidly < 32; dqidly++) { in finetuneDQSI()
741 for (dqsip = 0; dqsip < 2; dqsip++) { in finetuneDQSI()
742 if (pass[dqidly][dqsip][0] > pass[dqidly][dqsip][1]) in finetuneDQSI()
744 diff = pass[dqidly][dqsip][1] - pass[dqidly][dqsip][0]; in finetuneDQSI()
747 passcnt[0] = passcnt[1] = 0; in finetuneDQSI()
748 for (dlli = pass[dqidly][dqsip][0]; dlli > 0 && tag[dqsip][dlli] != 0; dlli--, passcnt[0]++); in finetuneDQSI()
749 for (dlli = pass[dqidly][dqsip][1]; dlli < 76 && tag[dqsip][dlli] != 0; dlli++, passcnt[1]++); in finetuneDQSI()
750 if (passcnt[0] > passcnt[1]) in finetuneDQSI()
751 passcnt[0] = passcnt[1]; in finetuneDQSI()
752 passcnt[1] = 0; in finetuneDQSI()
753 if (passcnt[0] > g_side) in finetuneDQSI()
754 passcnt[1] = passcnt[0] - g_side; in finetuneDQSI()
755 if (diff > (g_margin+1) && (passcnt[1] > 0 || passcnt[0] > 8)) { in finetuneDQSI()
759 g_side = passcnt[0]; in finetuneDQSI()
765 g_side = passcnt[0]; in finetuneDQSI()
770 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); in finetuneDQSI()
775 u32 dllmin[2], dllmax[2], dlli, data, passcnt, retry = 0; in cbr_dll2()
783 dllmin[0] = dllmin[1] = 0xff; in cbr_dll2()
784 dllmax[0] = dllmax[1] = 0x0; in cbr_dll2()
785 passcnt = 0; in cbr_dll2()
786 for (dlli = 0; dlli < 76; dlli++) { in cbr_dll2()
787 ast_moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); in cbr_dll2()
788 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE2); in cbr_dll2()
790 if (data != 0) { in cbr_dll2()
791 if (data & 0x1) { in cbr_dll2()
792 if (dllmin[0] > dlli) { in cbr_dll2()
793 dllmin[0] = dlli; in cbr_dll2()
795 if (dllmax[0] < dlli) { in cbr_dll2()
796 dllmax[0] = dlli; in cbr_dll2()
799 if (data & 0x2) { in cbr_dll2()
814 if (dllmax[0] == 0 || (dllmax[0]-dllmin[0]) < CBR_THRESHOLD) { in cbr_dll2()
817 if (dllmax[1] == 0 || (dllmax[1]-dllmin[1]) < CBR_THRESHOLD) { in cbr_dll2()
824 dlli += (dllmin[0] + dllmax[0]) >> 1; in cbr_dll2()
825 ast_moutdwm(ast, 0x1E6E0068, ast_mindwm(ast, 0x1E720058) | (dlli << 16)); in cbr_dll2()
833 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in get_ddr3_info()
836 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr3_info()
837 trap_AC2 = 0x00020000 + (trap << 16); in get_ddr3_info()
838 trap_AC2 |= 0x00300000 + ((trap & 0x2) << 19); in get_ddr3_info()
839 trap_MRS = 0x00000010 + (trap << 4); in get_ddr3_info()
840 trap_MRS |= ((trap & 0x2) << 18); in get_ddr3_info()
842 param->reg_MADJ = 0x00034C4C; in get_ddr3_info()
843 param->reg_SADJ = 0x00001800; in get_ddr3_info()
844 param->reg_DRV = 0x000000F0; in get_ddr3_info()
846 param->rodt = 0; in get_ddr3_info()
850 ast_moutdwm(ast, 0x1E6E2020, 0x0190); in get_ddr3_info()
851 param->wodt = 0; in get_ddr3_info()
852 param->reg_AC1 = 0x22202725; in get_ddr3_info()
853 param->reg_AC2 = 0xAA007613 | trap_AC2; in get_ddr3_info()
854 param->reg_DQSIC = 0x000000BA; in get_ddr3_info()
855 param->reg_MRS = 0x04001400 | trap_MRS; in get_ddr3_info()
856 param->reg_EMRS = 0x00000000; in get_ddr3_info()
857 param->reg_IOZ = 0x00000023; in get_ddr3_info()
858 param->reg_DQIDLY = 0x00000074; in get_ddr3_info()
859 param->reg_FREQ = 0x00004DC0; in get_ddr3_info()
866 param->reg_AC2 = 0xAA007613 | trap_AC2; in get_ddr3_info()
869 param->reg_AC2 = 0xAA00761C | trap_AC2; in get_ddr3_info()
872 param->reg_AC2 = 0xAA007636 | trap_AC2; in get_ddr3_info()
878 ast_moutdwm(ast, 0x1E6E2020, 0x03F1); in get_ddr3_info()
880 param->reg_AC1 = 0x33302825; in get_ddr3_info()
881 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
882 param->reg_DQSIC = 0x000000E2; in get_ddr3_info()
883 param->reg_MRS = 0x04001600 | trap_MRS; in get_ddr3_info()
884 param->reg_EMRS = 0x00000000; in get_ddr3_info()
885 param->reg_IOZ = 0x00000034; in get_ddr3_info()
886 param->reg_DRV = 0x000000FA; in get_ddr3_info()
887 param->reg_DQIDLY = 0x00000089; in get_ddr3_info()
888 param->reg_FREQ = 0x00005040; in get_ddr3_info()
896 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
899 param->reg_AC2 = 0xCC009622 | trap_AC2; in get_ddr3_info()
902 param->reg_AC2 = 0xCC00963F | trap_AC2; in get_ddr3_info()
908 ast_moutdwm(ast, 0x1E6E2020, 0x01F0); in get_ddr3_info()
910 param->reg_AC1 = 0x33302825; in get_ddr3_info()
911 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
912 param->reg_DQSIC = 0x000000E2; in get_ddr3_info()
913 param->reg_MRS = 0x04001600 | trap_MRS; in get_ddr3_info()
914 param->reg_EMRS = 0x00000000; in get_ddr3_info()
915 param->reg_IOZ = 0x00000023; in get_ddr3_info()
916 param->reg_DRV = 0x000000FA; in get_ddr3_info()
917 param->reg_DQIDLY = 0x00000089; in get_ddr3_info()
918 param->reg_FREQ = 0x000050C0; in get_ddr3_info()
926 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
929 param->reg_AC2 = 0xCC009622 | trap_AC2; in get_ddr3_info()
932 param->reg_AC2 = 0xCC00963F | trap_AC2; in get_ddr3_info()
938 ast_moutdwm(ast, 0x1E6E2020, 0x0230); in get_ddr3_info()
939 param->wodt = 0; in get_ddr3_info()
940 param->reg_AC1 = 0x33302926; in get_ddr3_info()
941 param->reg_AC2 = 0xCD44961A; in get_ddr3_info()
942 param->reg_DQSIC = 0x000000FC; in get_ddr3_info()
943 param->reg_MRS = 0x00081830; in get_ddr3_info()
944 param->reg_EMRS = 0x00000000; in get_ddr3_info()
945 param->reg_IOZ = 0x00000045; in get_ddr3_info()
946 param->reg_DQIDLY = 0x00000097; in get_ddr3_info()
947 param->reg_FREQ = 0x000052C0; in get_ddr3_info()
952 ast_moutdwm(ast, 0x1E6E2020, 0x0270); in get_ddr3_info()
954 param->reg_AC1 = 0x33302926; in get_ddr3_info()
955 param->reg_AC2 = 0xDE44A61D; in get_ddr3_info()
956 param->reg_DQSIC = 0x00000117; in get_ddr3_info()
957 param->reg_MRS = 0x00081A30; in get_ddr3_info()
958 param->reg_EMRS = 0x00000000; in get_ddr3_info()
959 param->reg_IOZ = 0x070000BB; in get_ddr3_info()
960 param->reg_DQIDLY = 0x000000A0; in get_ddr3_info()
961 param->reg_FREQ = 0x000054C0; in get_ddr3_info()
966 ast_moutdwm(ast, 0x1E6E2020, 0x0290); in get_ddr3_info()
969 param->reg_AC1 = 0x33302926; in get_ddr3_info()
970 param->reg_AC2 = 0xEF44B61E; in get_ddr3_info()
971 param->reg_DQSIC = 0x00000125; in get_ddr3_info()
972 param->reg_MRS = 0x00081A30; in get_ddr3_info()
973 param->reg_EMRS = 0x00000040; in get_ddr3_info()
974 param->reg_DRV = 0x000000F5; in get_ddr3_info()
975 param->reg_IOZ = 0x00000023; in get_ddr3_info()
976 param->reg_DQIDLY = 0x00000088; in get_ddr3_info()
977 param->reg_FREQ = 0x000055C0; in get_ddr3_info()
982 ast_moutdwm(ast, 0x1E6E2020, 0x0140); in get_ddr3_info()
983 param->reg_MADJ = 0x00136868; in get_ddr3_info()
984 param->reg_SADJ = 0x00004534; in get_ddr3_info()
987 param->reg_AC1 = 0x33302A37; in get_ddr3_info()
988 param->reg_AC2 = 0xEF56B61E; in get_ddr3_info()
989 param->reg_DQSIC = 0x0000013F; in get_ddr3_info()
990 param->reg_MRS = 0x00101A50; in get_ddr3_info()
991 param->reg_EMRS = 0x00000040; in get_ddr3_info()
992 param->reg_DRV = 0x000000FA; in get_ddr3_info()
993 param->reg_IOZ = 0x00000023; in get_ddr3_info()
994 param->reg_DQIDLY = 0x00000078; in get_ddr3_info()
995 param->reg_FREQ = 0x000057C0; in get_ddr3_info()
1000 ast_moutdwm(ast, 0x1E6E2020, 0x02E1); in get_ddr3_info()
1001 param->reg_MADJ = 0x00136868; in get_ddr3_info()
1002 param->reg_SADJ = 0x00004534; in get_ddr3_info()
1005 param->reg_AC1 = 0x32302A37; in get_ddr3_info()
1006 param->reg_AC2 = 0xDF56B61F; in get_ddr3_info()
1007 param->reg_DQSIC = 0x0000014D; in get_ddr3_info()
1008 param->reg_MRS = 0x00101A50; in get_ddr3_info()
1009 param->reg_EMRS = 0x00000004; in get_ddr3_info()
1010 param->reg_DRV = 0x000000F5; in get_ddr3_info()
1011 param->reg_IOZ = 0x00000023; in get_ddr3_info()
1012 param->reg_DQIDLY = 0x00000078; in get_ddr3_info()
1013 param->reg_FREQ = 0x000058C0; in get_ddr3_info()
1018 ast_moutdwm(ast, 0x1E6E2020, 0x0160); in get_ddr3_info()
1019 param->reg_MADJ = 0x00136868; in get_ddr3_info()
1020 param->reg_SADJ = 0x00004534; in get_ddr3_info()
1023 param->reg_AC1 = 0x32302A37; in get_ddr3_info()
1024 param->reg_AC2 = 0xEF56B621; in get_ddr3_info()
1025 param->reg_DQSIC = 0x0000015A; in get_ddr3_info()
1026 param->reg_MRS = 0x02101A50; in get_ddr3_info()
1027 param->reg_EMRS = 0x00000004; in get_ddr3_info()
1028 param->reg_DRV = 0x000000F5; in get_ddr3_info()
1029 param->reg_IOZ = 0x00000034; in get_ddr3_info()
1030 param->reg_DQIDLY = 0x00000078; in get_ddr3_info()
1031 param->reg_FREQ = 0x000059C0; in get_ddr3_info()
1039 param->dram_config = 0x130; in get_ddr3_info()
1043 param->dram_config = 0x131; in get_ddr3_info()
1046 param->dram_config = 0x132; in get_ddr3_info()
1049 param->dram_config = 0x133; in get_ddr3_info()
1056 param->dram_config |= 0x00; in get_ddr3_info()
1059 param->dram_config |= 0x04; in get_ddr3_info()
1062 param->dram_config |= 0x08; in get_ddr3_info()
1065 param->dram_config |= 0x0c; in get_ddr3_info()
1073 u32 data, data2, retry = 0; in ddr3_init()
1076 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in ddr3_init()
1077 ast_moutdwm(ast, 0x1E6E0018, 0x00000100); in ddr3_init()
1078 ast_moutdwm(ast, 0x1E6E0024, 0x00000000); in ddr3_init()
1079 ast_moutdwm(ast, 0x1E6E0034, 0x00000000); in ddr3_init()
1081 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ); in ddr3_init()
1082 ast_moutdwm(ast, 0x1E6E0068, param->reg_SADJ); in ddr3_init()
1084 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); in ddr3_init()
1087 ast_moutdwm(ast, 0x1E6E0004, param->dram_config); in ddr3_init()
1088 ast_moutdwm(ast, 0x1E6E0008, 0x90040f); in ddr3_init()
1089 ast_moutdwm(ast, 0x1E6E0010, param->reg_AC1); in ddr3_init()
1090 ast_moutdwm(ast, 0x1E6E0014, param->reg_AC2); in ddr3_init()
1091 ast_moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); in ddr3_init()
1092 ast_moutdwm(ast, 0x1E6E0080, 0x00000000); in ddr3_init()
1093 ast_moutdwm(ast, 0x1E6E0084, 0x00000000); in ddr3_init()
1094 ast_moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); in ddr3_init()
1095 ast_moutdwm(ast, 0x1E6E0018, 0x4000A170); in ddr3_init()
1096 ast_moutdwm(ast, 0x1E6E0018, 0x00002370); in ddr3_init()
1097 ast_moutdwm(ast, 0x1E6E0038, 0x00000000); in ddr3_init()
1098 ast_moutdwm(ast, 0x1E6E0040, 0xFF444444); in ddr3_init()
1099 ast_moutdwm(ast, 0x1E6E0044, 0x22222222); in ddr3_init()
1100 ast_moutdwm(ast, 0x1E6E0048, 0x22222222); in ddr3_init()
1101 ast_moutdwm(ast, 0x1E6E004C, 0x00000002); in ddr3_init()
1102 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr3_init()
1103 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr3_init()
1104 ast_moutdwm(ast, 0x1E6E0054, 0); in ddr3_init()
1105 ast_moutdwm(ast, 0x1E6E0060, param->reg_DRV); in ddr3_init()
1106 ast_moutdwm(ast, 0x1E6E006C, param->reg_IOZ); in ddr3_init()
1107 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr3_init()
1108 ast_moutdwm(ast, 0x1E6E0074, 0x00000000); in ddr3_init()
1109 ast_moutdwm(ast, 0x1E6E0078, 0x00000000); in ddr3_init()
1110 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr3_init()
1113 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1114 } while (!(data & 0x08000000)); in ddr3_init()
1115 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1116 data = (data >> 8) & 0xff; in ddr3_init()
1117 while ((data & 0x08) || ((data & 0x7) < 2) || (data < 4)) { in ddr3_init()
1118 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr3_init()
1119 if ((data2 & 0xff) > param->madj_max) { in ddr3_init()
1122 ast_moutdwm(ast, 0x1E6E0064, data2); in ddr3_init()
1123 if (data2 & 0x00100000) { in ddr3_init()
1124 data2 = ((data2 & 0xff) >> 3) + 3; in ddr3_init()
1126 data2 = ((data2 & 0xff) >> 2) + 5; in ddr3_init()
1128 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr3_init()
1129 data2 += data & 0xff; in ddr3_init()
1131 ast_moutdwm(ast, 0x1E6E0068, data); in ddr3_init()
1133 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr3_init()
1135 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr3_init()
1136 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1137 data = data | 0x200; in ddr3_init()
1138 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1140 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1141 } while (!(data & 0x08000000)); in ddr3_init()
1143 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1144 data = (data >> 8) & 0xff; in ddr3_init()
1146 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0068) & 0xffff); in ddr3_init()
1147 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr3_init()
1148 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1150 ast_moutdwm(ast, 0x1E6E0034, 0x00000001); in ddr3_init()
1151 ast_moutdwm(ast, 0x1E6E000C, 0x00000040); in ddr3_init()
1154 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); in ddr3_init()
1155 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr3_init()
1156 ast_moutdwm(ast, 0x1E6E0028, 0x00000005); in ddr3_init()
1157 ast_moutdwm(ast, 0x1E6E0028, 0x00000007); in ddr3_init()
1158 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr3_init()
1159 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr3_init()
1160 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS); in ddr3_init()
1161 ast_moutdwm(ast, 0x1E6E000C, 0x00005C08); in ddr3_init()
1162 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr3_init()
1164 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr3_init()
1165 data = 0; in ddr3_init()
1167 data = 0x300; in ddr3_init()
1170 data = data | 0x3000 | ((param->reg_AC2 & 0x60000) >> 3); in ddr3_init()
1172 ast_moutdwm(ast, 0x1E6E0034, data | 0x3); in ddr3_init()
1178 ast_moutdwm(ast, 0x1E6E0120, param->reg_FREQ); in ddr3_init()
1181 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr3_init()
1182 ast_moutdwm(ast, 0x1E6E0070, 0x221); in ddr3_init()
1184 data = ast_mindwm(ast, 0x1E6E0070); in ddr3_init()
1185 } while (!(data & 0x00001000)); in ddr3_init()
1186 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr3_init()
1187 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr3_init()
1188 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr3_init()
1198 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in get_ddr2_info()
1201 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr2_info()
1203 trap_AC2 += 0x00110000; in get_ddr2_info()
1204 trap_MRS = 0x00000040 | (trap << 4); in get_ddr2_info()
1207 param->reg_MADJ = 0x00034C4C; in get_ddr2_info()
1208 param->reg_SADJ = 0x00001800; in get_ddr2_info()
1209 param->reg_DRV = 0x000000F0; in get_ddr2_info()
1211 param->rodt = 0; in get_ddr2_info()
1215 ast_moutdwm(ast, 0x1E6E2020, 0x0130); in get_ddr2_info()
1216 param->wodt = 0; in get_ddr2_info()
1217 param->reg_AC1 = 0x11101513; in get_ddr2_info()
1218 param->reg_AC2 = 0x78117011; in get_ddr2_info()
1219 param->reg_DQSIC = 0x00000092; in get_ddr2_info()
1220 param->reg_MRS = 0x00000842; in get_ddr2_info()
1221 param->reg_EMRS = 0x00000000; in get_ddr2_info()
1222 param->reg_DRV = 0x000000F0; in get_ddr2_info()
1223 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1224 param->reg_DQIDLY = 0x0000005A; in get_ddr2_info()
1225 param->reg_FREQ = 0x00004AC0; in get_ddr2_info()
1230 ast_moutdwm(ast, 0x1E6E2020, 0x0190); in get_ddr2_info()
1232 param->reg_AC1 = 0x22202613; in get_ddr2_info()
1233 param->reg_AC2 = 0xAA009016 | trap_AC2; in get_ddr2_info()
1234 param->reg_DQSIC = 0x000000BA; in get_ddr2_info()
1235 param->reg_MRS = 0x00000A02 | trap_MRS; in get_ddr2_info()
1236 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1237 param->reg_DRV = 0x000000FA; in get_ddr2_info()
1238 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1239 param->reg_DQIDLY = 0x00000074; in get_ddr2_info()
1240 param->reg_FREQ = 0x00004DC0; in get_ddr2_info()
1246 param->reg_AC2 = 0xAA009012 | trap_AC2; in get_ddr2_info()
1249 param->reg_AC2 = 0xAA009016 | trap_AC2; in get_ddr2_info()
1252 param->reg_AC2 = 0xAA009023 | trap_AC2; in get_ddr2_info()
1255 param->reg_AC2 = 0xAA00903B | trap_AC2; in get_ddr2_info()
1261 ast_moutdwm(ast, 0x1E6E2020, 0x03F1); in get_ddr2_info()
1263 param->rodt = 0; in get_ddr2_info()
1264 param->reg_AC1 = 0x33302714; in get_ddr2_info()
1265 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1266 param->reg_DQSIC = 0x000000E2; in get_ddr2_info()
1267 param->reg_MRS = 0x00000C02 | trap_MRS; in get_ddr2_info()
1268 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1269 param->reg_DRV = 0x000000FA; in get_ddr2_info()
1270 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1271 param->reg_DQIDLY = 0x00000089; in get_ddr2_info()
1272 param->reg_FREQ = 0x00005040; in get_ddr2_info()
1278 param->reg_AC2 = 0xCC00B016 | trap_AC2; in get_ddr2_info()
1282 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1285 param->reg_AC2 = 0xCC00B02B | trap_AC2; in get_ddr2_info()
1288 param->reg_AC2 = 0xCC00B03F | trap_AC2; in get_ddr2_info()
1295 ast_moutdwm(ast, 0x1E6E2020, 0x01F0); in get_ddr2_info()
1297 param->rodt = 0; in get_ddr2_info()
1298 param->reg_AC1 = 0x33302714; in get_ddr2_info()
1299 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1300 param->reg_DQSIC = 0x000000E2; in get_ddr2_info()
1301 param->reg_MRS = 0x00000C02 | trap_MRS; in get_ddr2_info()
1302 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1303 param->reg_DRV = 0x000000FA; in get_ddr2_info()
1304 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1305 param->reg_DQIDLY = 0x00000089; in get_ddr2_info()
1306 param->reg_FREQ = 0x000050C0; in get_ddr2_info()
1312 param->reg_AC2 = 0xCC00B016 | trap_AC2; in get_ddr2_info()
1316 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1319 param->reg_AC2 = 0xCC00B02B | trap_AC2; in get_ddr2_info()
1322 param->reg_AC2 = 0xCC00B03F | trap_AC2; in get_ddr2_info()
1328 ast_moutdwm(ast, 0x1E6E2020, 0x0230); in get_ddr2_info()
1329 param->wodt = 0; in get_ddr2_info()
1330 param->reg_AC1 = 0x33302815; in get_ddr2_info()
1331 param->reg_AC2 = 0xCD44B01E; in get_ddr2_info()
1332 param->reg_DQSIC = 0x000000FC; in get_ddr2_info()
1333 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1334 param->reg_EMRS = 0x00000000; in get_ddr2_info()
1335 param->reg_DRV = 0x00000000; in get_ddr2_info()
1336 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1337 param->reg_DQIDLY = 0x00000097; in get_ddr2_info()
1338 param->reg_FREQ = 0x000052C0; in get_ddr2_info()
1343 ast_moutdwm(ast, 0x1E6E2020, 0x0261); in get_ddr2_info()
1346 param->reg_AC1 = 0x33302815; in get_ddr2_info()
1347 param->reg_AC2 = 0xDE44C022; in get_ddr2_info()
1348 param->reg_DQSIC = 0x00000117; in get_ddr2_info()
1349 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1350 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1351 param->reg_DRV = 0x0000000A; in get_ddr2_info()
1352 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1353 param->reg_DQIDLY = 0x000000A0; in get_ddr2_info()
1354 param->reg_FREQ = 0x000054C0; in get_ddr2_info()
1359 ast_moutdwm(ast, 0x1E6E2020, 0x0120); in get_ddr2_info()
1362 param->reg_AC1 = 0x33302815; in get_ddr2_info()
1363 param->reg_AC2 = 0xEF44D024; in get_ddr2_info()
1364 param->reg_DQSIC = 0x00000125; in get_ddr2_info()
1365 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1366 param->reg_EMRS = 0x00000004; in get_ddr2_info()
1367 param->reg_DRV = 0x000000F9; in get_ddr2_info()
1368 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1369 param->reg_DQIDLY = 0x000000A7; in get_ddr2_info()
1370 param->reg_FREQ = 0x000055C0; in get_ddr2_info()
1375 ast_moutdwm(ast, 0x1E6E2020, 0x02A1); in get_ddr2_info()
1378 param->reg_AC1 = 0x43402915; in get_ddr2_info()
1379 param->reg_AC2 = 0xFF44E025; in get_ddr2_info()
1380 param->reg_DQSIC = 0x00000132; in get_ddr2_info()
1381 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1382 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1383 param->reg_DRV = 0x0000000A; in get_ddr2_info()
1384 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1385 param->reg_DQIDLY = 0x000000AD; in get_ddr2_info()
1386 param->reg_FREQ = 0x000056C0; in get_ddr2_info()
1391 ast_moutdwm(ast, 0x1E6E2020, 0x0140); in get_ddr2_info()
1394 param->reg_AC1 = 0x43402915; in get_ddr2_info()
1395 param->reg_AC2 = 0xFF44E027; in get_ddr2_info()
1396 param->reg_DQSIC = 0x0000013F; in get_ddr2_info()
1397 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1398 param->reg_EMRS = 0x00000004; in get_ddr2_info()
1399 param->reg_DRV = 0x000000F5; in get_ddr2_info()
1400 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1401 param->reg_DQIDLY = 0x000000B3; in get_ddr2_info()
1402 param->reg_FREQ = 0x000057C0; in get_ddr2_info()
1410 param->dram_config = 0x100; in get_ddr2_info()
1414 param->dram_config = 0x121; in get_ddr2_info()
1417 param->dram_config = 0x122; in get_ddr2_info()
1420 param->dram_config = 0x123; in get_ddr2_info()
1427 param->dram_config |= 0x00; in get_ddr2_info()
1430 param->dram_config |= 0x04; in get_ddr2_info()
1433 param->dram_config |= 0x08; in get_ddr2_info()
1436 param->dram_config |= 0x0c; in get_ddr2_info()
1443 u32 data, data2, retry = 0; in ddr2_init()
1446 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in ddr2_init()
1447 ast_moutdwm(ast, 0x1E6E0018, 0x00000100); in ddr2_init()
1448 ast_moutdwm(ast, 0x1E6E0024, 0x00000000); in ddr2_init()
1449 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ); in ddr2_init()
1450 ast_moutdwm(ast, 0x1E6E0068, param->reg_SADJ); in ddr2_init()
1452 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); in ddr2_init()
1455 ast_moutdwm(ast, 0x1E6E0004, param->dram_config); in ddr2_init()
1456 ast_moutdwm(ast, 0x1E6E0008, 0x90040f); in ddr2_init()
1457 ast_moutdwm(ast, 0x1E6E0010, param->reg_AC1); in ddr2_init()
1458 ast_moutdwm(ast, 0x1E6E0014, param->reg_AC2); in ddr2_init()
1459 ast_moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); in ddr2_init()
1460 ast_moutdwm(ast, 0x1E6E0080, 0x00000000); in ddr2_init()
1461 ast_moutdwm(ast, 0x1E6E0084, 0x00000000); in ddr2_init()
1462 ast_moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); in ddr2_init()
1463 ast_moutdwm(ast, 0x1E6E0018, 0x4000A130); in ddr2_init()
1464 ast_moutdwm(ast, 0x1E6E0018, 0x00002330); in ddr2_init()
1465 ast_moutdwm(ast, 0x1E6E0038, 0x00000000); in ddr2_init()
1466 ast_moutdwm(ast, 0x1E6E0040, 0xFF808000); in ddr2_init()
1467 ast_moutdwm(ast, 0x1E6E0044, 0x88848466); in ddr2_init()
1468 ast_moutdwm(ast, 0x1E6E0048, 0x44440008); in ddr2_init()
1469 ast_moutdwm(ast, 0x1E6E004C, 0x00000000); in ddr2_init()
1470 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr2_init()
1471 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr2_init()
1472 ast_moutdwm(ast, 0x1E6E0054, 0); in ddr2_init()
1473 ast_moutdwm(ast, 0x1E6E0060, param->reg_DRV); in ddr2_init()
1474 ast_moutdwm(ast, 0x1E6E006C, param->reg_IOZ); in ddr2_init()
1475 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr2_init()
1476 ast_moutdwm(ast, 0x1E6E0074, 0x00000000); in ddr2_init()
1477 ast_moutdwm(ast, 0x1E6E0078, 0x00000000); in ddr2_init()
1478 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr2_init()
1482 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1483 } while (!(data & 0x08000000)); in ddr2_init()
1484 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1485 data = (data >> 8) & 0xff; in ddr2_init()
1486 while ((data & 0x08) || ((data & 0x7) < 2) || (data < 4)) { in ddr2_init()
1487 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr2_init()
1488 if ((data2 & 0xff) > param->madj_max) { in ddr2_init()
1491 ast_moutdwm(ast, 0x1E6E0064, data2); in ddr2_init()
1492 if (data2 & 0x00100000) { in ddr2_init()
1493 data2 = ((data2 & 0xff) >> 3) + 3; in ddr2_init()
1495 data2 = ((data2 & 0xff) >> 2) + 5; in ddr2_init()
1497 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr2_init()
1498 data2 += data & 0xff; in ddr2_init()
1500 ast_moutdwm(ast, 0x1E6E0068, data); in ddr2_init()
1502 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr2_init()
1504 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr2_init()
1505 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1506 data = data | 0x200; in ddr2_init()
1507 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1509 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1510 } while (!(data & 0x08000000)); in ddr2_init()
1512 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1513 data = (data >> 8) & 0xff; in ddr2_init()
1515 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0008) & 0xffff); in ddr2_init()
1516 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr2_init()
1517 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1519 ast_moutdwm(ast, 0x1E6E0034, 0x00000001); in ddr2_init()
1520 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr2_init()
1523 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); in ddr2_init()
1524 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr2_init()
1525 ast_moutdwm(ast, 0x1E6E0028, 0x00000005); in ddr2_init()
1526 ast_moutdwm(ast, 0x1E6E0028, 0x00000007); in ddr2_init()
1527 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1528 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr2_init()
1530 ast_moutdwm(ast, 0x1E6E000C, 0x00005C08); in ddr2_init()
1531 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS); in ddr2_init()
1532 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr2_init()
1533 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS | 0x380); in ddr2_init()
1534 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1535 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr2_init()
1536 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1538 ast_moutdwm(ast, 0x1E6E000C, 0x7FFF5C01); in ddr2_init()
1539 data = 0; in ddr2_init()
1541 data = 0x500; in ddr2_init()
1544 data = data | 0x3000 | ((param->reg_AC2 & 0x60000) >> 3); in ddr2_init()
1546 ast_moutdwm(ast, 0x1E6E0034, data | 0x3); in ddr2_init()
1547 ast_moutdwm(ast, 0x1E6E0120, param->reg_FREQ); in ddr2_init()
1555 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr2_init()
1556 ast_moutdwm(ast, 0x1E6E0070, 0x221); in ddr2_init()
1558 data = ast_mindwm(ast, 0x1E6E0070); in ddr2_init()
1559 } while (!(data & 0x00001000)); in ddr2_init()
1560 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr2_init()
1561 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr2_init()
1562 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr2_init()
1573 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2300()
1574 if ((reg & 0x80) == 0) {/* vga only */ in ast_post_chip_2300()
1575 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_post_chip_2300()
1576 ast_write32(ast, 0xf000, 0x1); in ast_post_chip_2300()
1577 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_post_chip_2300()
1580 } while (ast_read32(ast, 0x12000) != 0x1); in ast_post_chip_2300()
1582 ast_write32(ast, 0x10000, 0xfc600309); in ast_post_chip_2300()
1585 } while (ast_read32(ast, 0x10000) != 0x1); in ast_post_chip_2300()
1588 temp = ast_read32(ast, 0x12008); in ast_post_chip_2300()
1589 temp |= 0x73; in ast_post_chip_2300()
1590 ast_write32(ast, 0x12008, temp); in ast_post_chip_2300()
1594 temp = ast_mindwm(ast, 0x1e6e2070); in ast_post_chip_2300()
1595 if (temp & 0x01000000) in ast_post_chip_2300()
1597 switch (temp & 0x18000000) { in ast_post_chip_2300()
1598 case 0: in ast_post_chip_2300()
1602 case 0x08000000: in ast_post_chip_2300()
1605 case 0x10000000: in ast_post_chip_2300()
1608 case 0x18000000: in ast_post_chip_2300()
1612 switch (temp & 0x0c) { in ast_post_chip_2300()
1614 case 0x00: in ast_post_chip_2300()
1618 case 0x04: in ast_post_chip_2300()
1622 case 0x08: in ast_post_chip_2300()
1626 case 0x0c: in ast_post_chip_2300()
1639 temp = ast_mindwm(ast, 0x1e6e2040); in ast_post_chip_2300()
1640 ast_moutdwm(ast, 0x1e6e2040, temp | 0x40); in ast_post_chip_2300()
1645 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2300()
1646 } while ((reg & 0x40) == 0); in ast_post_chip_2300()
1651 ast_moutdwm(ast, 0x1E6E0074, 0x0000FFFF); in cbr_test_2500()
1652 ast_moutdwm(ast, 0x1E6E007C, 0xFF00FF00); in cbr_test_2500()
1653 if (!mmc_test_burst(ast, 0)) in cbr_test_2500()
1655 if (!mmc_test_single_2500(ast, 0)) in cbr_test_2500()
1662 ast_moutdwm(ast, 0x1E6E0074, 0x0000FFFF); in ddr_test_2500()
1663 ast_moutdwm(ast, 0x1E6E007C, 0xFF00FF00); in ddr_test_2500()
1664 if (!mmc_test_burst(ast, 0)) in ddr_test_2500()
1672 if (!mmc_test_single_2500(ast, 0)) in ddr_test_2500()
1679 ast_moutdwm(ast, 0x1E6E0034, 0x00020080); in ddr_init_common_2500()
1680 ast_moutdwm(ast, 0x1E6E0008, 0x2003000F); in ddr_init_common_2500()
1681 ast_moutdwm(ast, 0x1E6E0038, 0x00000FFF); in ddr_init_common_2500()
1682 ast_moutdwm(ast, 0x1E6E0040, 0x88448844); in ddr_init_common_2500()
1683 ast_moutdwm(ast, 0x1E6E0044, 0x24422288); in ddr_init_common_2500()
1684 ast_moutdwm(ast, 0x1E6E0048, 0x22222222); in ddr_init_common_2500()
1685 ast_moutdwm(ast, 0x1E6E004C, 0x22222222); in ddr_init_common_2500()
1686 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr_init_common_2500()
1687 ast_moutdwm(ast, 0x1E6E0208, 0x00000000); in ddr_init_common_2500()
1688 ast_moutdwm(ast, 0x1E6E0218, 0x00000000); in ddr_init_common_2500()
1689 ast_moutdwm(ast, 0x1E6E0220, 0x00000000); in ddr_init_common_2500()
1690 ast_moutdwm(ast, 0x1E6E0228, 0x00000000); in ddr_init_common_2500()
1691 ast_moutdwm(ast, 0x1E6E0230, 0x00000000); in ddr_init_common_2500()
1692 ast_moutdwm(ast, 0x1E6E02A8, 0x00000000); in ddr_init_common_2500()
1693 ast_moutdwm(ast, 0x1E6E02B0, 0x00000000); in ddr_init_common_2500()
1694 ast_moutdwm(ast, 0x1E6E0240, 0x86000000); in ddr_init_common_2500()
1695 ast_moutdwm(ast, 0x1E6E0244, 0x00008600); in ddr_init_common_2500()
1696 ast_moutdwm(ast, 0x1E6E0248, 0x80000000); in ddr_init_common_2500()
1697 ast_moutdwm(ast, 0x1E6E024C, 0x80808080); in ddr_init_common_2500()
1704 pass = 0; in ddr_phy_init_2500()
1705 ast_moutdwm(ast, 0x1E6E0060, 0x00000005); in ddr_phy_init_2500()
1707 for (timecnt = 0; timecnt < TIMEOUT; timecnt++) { in ddr_phy_init_2500()
1708 data = ast_mindwm(ast, 0x1E6E0060) & 0x1; in ddr_phy_init_2500()
1713 data = ast_mindwm(ast, 0x1E6E0300) & 0x000A0000; in ddr_phy_init_2500()
1718 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr_phy_init_2500()
1720 ast_moutdwm(ast, 0x1E6E0060, 0x00000005); in ddr_phy_init_2500()
1724 ast_moutdwm(ast, 0x1E6E0060, 0x00000006); in ddr_phy_init_2500()
1729 * 1Gb : 0x80000000 ~ 0x87FFFFFF
1730 * 2Gb : 0x80000000 ~ 0x8FFFFFFF
1731 * 4Gb : 0x80000000 ~ 0x9FFFFFFF
1732 * 8Gb : 0x80000000 ~ 0xBFFFFFFF
1738 reg_04 = ast_mindwm(ast, 0x1E6E0004) & 0xfffffffc; in check_dram_size_2500()
1739 reg_14 = ast_mindwm(ast, 0x1E6E0014) & 0xffffff00; in check_dram_size_2500()
1741 ast_moutdwm(ast, 0xA0100000, 0x41424344); in check_dram_size_2500()
1742 ast_moutdwm(ast, 0x90100000, 0x35363738); in check_dram_size_2500()
1743 ast_moutdwm(ast, 0x88100000, 0x292A2B2C); in check_dram_size_2500()
1744 ast_moutdwm(ast, 0x80100000, 0x1D1E1F10); in check_dram_size_2500()
1747 if (ast_mindwm(ast, 0xA0100000) == 0x41424344) { in check_dram_size_2500()
1748 reg_04 |= 0x03; in check_dram_size_2500()
1749 reg_14 |= (tRFC >> 24) & 0xFF; in check_dram_size_2500()
1751 } else if (ast_mindwm(ast, 0x90100000) == 0x35363738) { in check_dram_size_2500()
1752 reg_04 |= 0x02; in check_dram_size_2500()
1753 reg_14 |= (tRFC >> 16) & 0xFF; in check_dram_size_2500()
1755 } else if (ast_mindwm(ast, 0x88100000) == 0x292A2B2C) { in check_dram_size_2500()
1756 reg_04 |= 0x01; in check_dram_size_2500()
1757 reg_14 |= (tRFC >> 8) & 0xFF; in check_dram_size_2500()
1759 reg_14 |= tRFC & 0xFF; in check_dram_size_2500()
1761 ast_moutdwm(ast, 0x1E6E0004, reg_04); in check_dram_size_2500()
1762 ast_moutdwm(ast, 0x1E6E0014, reg_14); in check_dram_size_2500()
1769 reg_04 = ast_mindwm(ast, 0x1E6E0004); in enable_cache_2500()
1770 ast_moutdwm(ast, 0x1E6E0004, reg_04 | 0x1000); in enable_cache_2500()
1773 data = ast_mindwm(ast, 0x1E6E0004); in enable_cache_2500()
1774 while (!(data & 0x80000)); in enable_cache_2500()
1775 ast_moutdwm(ast, 0x1E6E0004, reg_04 | 0x400); in enable_cache_2500()
1783 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in set_mpll_2500()
1784 ast_moutdwm(ast, 0x1E6E0034, 0x00020080); in set_mpll_2500()
1785 for (addr = 0x1e6e0004; addr < 0x1e6e0090;) { in set_mpll_2500()
1786 ast_moutdwm(ast, addr, 0x0); in set_mpll_2500()
1789 ast_moutdwm(ast, 0x1E6E0034, 0x00020000); in set_mpll_2500()
1791 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in set_mpll_2500()
1792 data = ast_mindwm(ast, 0x1E6E2070) & 0x00800000; in set_mpll_2500()
1795 param = 0x930023E0; in set_mpll_2500()
1796 ast_moutdwm(ast, 0x1E6E2160, 0x00011320); in set_mpll_2500()
1799 param = 0x93002400; in set_mpll_2500()
1801 ast_moutdwm(ast, 0x1E6E2020, param); in set_mpll_2500()
1807 ast_moutdwm(ast, 0x1E78505C, 0x00000004); in reset_mmc_2500()
1808 ast_moutdwm(ast, 0x1E785044, 0x00000001); in reset_mmc_2500()
1809 ast_moutdwm(ast, 0x1E785048, 0x00004755); in reset_mmc_2500()
1810 ast_moutdwm(ast, 0x1E78504C, 0x00000013); in reset_mmc_2500()
1812 ast_moutdwm(ast, 0x1E785054, 0x00000077); in reset_mmc_2500()
1813 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in reset_mmc_2500()
1819 ast_moutdwm(ast, 0x1E6E0004, 0x00000303); in ddr3_init_2500()
1820 ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]); in ddr3_init_2500()
1821 ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]); in ddr3_init_2500()
1822 ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]); in ddr3_init_2500()
1823 ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]); /* MODEREG4/6 */ in ddr3_init_2500()
1824 ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]); /* MODEREG5 */ in ddr3_init_2500()
1825 ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */ in ddr3_init_2500()
1826 ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]); /* MODEREG1/3 */ in ddr3_init_2500()
1829 ast_moutdwm(ast, 0x1E6E0200, 0x02492AAE); in ddr3_init_2500()
1830 ast_moutdwm(ast, 0x1E6E0204, 0x00001001); in ddr3_init_2500()
1831 ast_moutdwm(ast, 0x1E6E020C, 0x55E00B0B); in ddr3_init_2500()
1832 ast_moutdwm(ast, 0x1E6E0210, 0x20000000); in ddr3_init_2500()
1833 ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]); in ddr3_init_2500()
1834 ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]); in ddr3_init_2500()
1835 ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]); in ddr3_init_2500()
1836 ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]); in ddr3_init_2500()
1837 ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]); in ddr3_init_2500()
1838 ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]); in ddr3_init_2500()
1839 ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]); in ddr3_init_2500()
1840 ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]); in ddr3_init_2500()
1841 ast_moutdwm(ast, 0x1E6E0290, 0x00100008); in ddr3_init_2500()
1842 ast_moutdwm(ast, 0x1E6E02C0, 0x00000006); in ddr3_init_2500()
1845 ast_moutdwm(ast, 0x1E6E0034, 0x00020091); in ddr3_init_2500()
1850 ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]); in ddr3_init_2500()
1851 ast_moutdwm(ast, 0x1E6E000C, 0x42AA5C81); in ddr3_init_2500()
1852 ast_moutdwm(ast, 0x1E6E0034, 0x0001AF93); in ddr3_init_2500()
1856 ast_moutdwm(ast, 0x1E6E001C, 0x00000008); in ddr3_init_2500()
1857 ast_moutdwm(ast, 0x1E6E0038, 0xFFFFFF00); in ddr3_init_2500()
1864 u32 min_ddr_vref = 0, min_phy_vref = 0; in ddr4_init_2500()
1865 u32 max_ddr_vref = 0, max_phy_vref = 0; in ddr4_init_2500()
1867 ast_moutdwm(ast, 0x1E6E0004, 0x00000313); in ddr4_init_2500()
1868 ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]); in ddr4_init_2500()
1869 ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]); in ddr4_init_2500()
1870 ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]); in ddr4_init_2500()
1871 ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]); /* MODEREG4/6 */ in ddr4_init_2500()
1872 ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]); /* MODEREG5 */ in ddr4_init_2500()
1873 ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */ in ddr4_init_2500()
1874 ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]); /* MODEREG1/3 */ in ddr4_init_2500()
1877 ast_moutdwm(ast, 0x1E6E0200, 0x42492AAE); in ddr4_init_2500()
1878 ast_moutdwm(ast, 0x1E6E0204, 0x09002000); in ddr4_init_2500()
1879 ast_moutdwm(ast, 0x1E6E020C, 0x55E00B0B); in ddr4_init_2500()
1880 ast_moutdwm(ast, 0x1E6E0210, 0x20000000); in ddr4_init_2500()
1881 ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]); in ddr4_init_2500()
1882 ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]); in ddr4_init_2500()
1883 ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]); in ddr4_init_2500()
1884 ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]); in ddr4_init_2500()
1885 ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]); in ddr4_init_2500()
1886 ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]); in ddr4_init_2500()
1887 ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]); in ddr4_init_2500()
1888 ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]); in ddr4_init_2500()
1889 ast_moutdwm(ast, 0x1E6E0290, 0x00100008); in ddr4_init_2500()
1890 ast_moutdwm(ast, 0x1E6E02C4, 0x3C183C3C); in ddr4_init_2500()
1891 ast_moutdwm(ast, 0x1E6E02C8, 0x00631E0E); in ddr4_init_2500()
1894 ast_moutdwm(ast, 0x1E6E0034, 0x0001A991); in ddr4_init_2500()
1897 pass = 0; in ddr4_init_2500()
1899 for (retrycnt = 0; retrycnt < 4 && pass == 0; retrycnt++) { in ddr4_init_2500()
1900 max_phy_vref = 0x0; in ddr4_init_2500()
1901 pass = 0; in ddr4_init_2500()
1902 ast_moutdwm(ast, 0x1E6E02C0, 0x00001C06); in ddr4_init_2500()
1903 for (phy_vref = 0x40; phy_vref < 0x80; phy_vref++) { in ddr4_init_2500()
1904 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr4_init_2500()
1905 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr4_init_2500()
1906 ast_moutdwm(ast, 0x1E6E02CC, phy_vref | (phy_vref << 8)); in ddr4_init_2500()
1909 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr4_init_2500()
1912 data = ast_mindwm(ast, 0x1E6E03D0); in ddr4_init_2500()
1914 data = data & 0xff; in ddr4_init_2500()
1921 } else if (pass > 0) in ddr4_init_2500()
1925 ast_moutdwm(ast, 0x1E6E02CC, min_phy_vref | (min_phy_vref << 8)); in ddr4_init_2500()
1928 pass = 0; in ddr4_init_2500()
1930 for (retrycnt = 0; retrycnt < 4 && pass == 0; retrycnt++) { in ddr4_init_2500()
1931 min_ddr_vref = 0xFF; in ddr4_init_2500()
1932 max_ddr_vref = 0x0; in ddr4_init_2500()
1933 pass = 0; in ddr4_init_2500()
1934 for (ddr_vref = 0x00; ddr_vref < 0x40; ddr_vref++) { in ddr4_init_2500()
1935 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr4_init_2500()
1936 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr4_init_2500()
1937 ast_moutdwm(ast, 0x1E6E02C0, 0x00000006 | (ddr_vref << 8)); in ddr4_init_2500()
1940 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr4_init_2500()
1947 } else if (pass != 0) in ddr4_init_2500()
1952 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr4_init_2500()
1953 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr4_init_2500()
1955 ast_moutdwm(ast, 0x1E6E02C0, 0x00000006 | (ddr_vref << 8)); in ddr4_init_2500()
1960 ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]); in ddr4_init_2500()
1961 ast_moutdwm(ast, 0x1E6E000C, 0x42AA5C81); in ddr4_init_2500()
1962 ast_moutdwm(ast, 0x1E6E0034, 0x0001AF93); in ddr4_init_2500()
1966 ast_moutdwm(ast, 0x1E6E001C, 0x00000008); in ddr4_init_2500()
1967 ast_moutdwm(ast, 0x1E6E0038, 0xFFFFFF00); in ddr4_init_2500()
1976 if (max_tries-- == 0) in ast_dram_init_2500()
1982 data = ast_mindwm(ast, 0x1E6E2070); in ast_dram_init_2500()
1983 if (data & 0x01000000) in ast_dram_init_2500()
1989 ast_moutdwm(ast, 0x1E6E2040, ast_mindwm(ast, 0x1E6E2040) | 0x41); in ast_dram_init_2500()
1992 data = ast_mindwm(ast, 0x1E6E200C) & 0xF9FFFFFF; in ast_dram_init_2500()
1993 ast_moutdwm(ast, 0x1E6E200C, data | 0x10000000); in ast_dram_init_2500()
2003 __ast_moutdwm(regs, 0x1e600000, 0xAEED1A03); in ast_patch_ahb_2500()
2004 __ast_moutdwm(regs, 0x1e600084, 0x00010000); in ast_patch_ahb_2500()
2005 __ast_moutdwm(regs, 0x1e600088, 0x00000000); in ast_patch_ahb_2500()
2006 __ast_moutdwm(regs, 0x1e6e2000, 0x1688A8A8); in ast_patch_ahb_2500()
2008 data = __ast_mindwm(regs, 0x1e6e2070); in ast_patch_ahb_2500()
2009 if (data & 0x08000000) { /* check fast reset */ in ast_patch_ahb_2500()
2019 * [0]:= 1:WDT enable in ast_patch_ahb_2500()
2021 __ast_moutdwm(regs, 0x1E785004, 0x00000010); in ast_patch_ahb_2500()
2022 __ast_moutdwm(regs, 0x1E785008, 0x00004755); in ast_patch_ahb_2500()
2023 __ast_moutdwm(regs, 0x1E78500c, 0x00000033); in ast_patch_ahb_2500()
2028 __ast_moutdwm(regs, 0x1e6e2000, 0x1688A8A8); in ast_patch_ahb_2500()
2029 data = __ast_mindwm(regs, 0x1e6e2000); in ast_patch_ahb_2500()
2032 __ast_moutdwm(regs, 0x1e6e207c, 0x08000000); /* clear fast reset */ in ast_patch_ahb_2500()
2041 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2500()
2042 if ((reg & AST_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */ in ast_post_chip_2500()
2047 ast_moutdwm(ast, 0x1E78502C, 0x00000000); in ast_post_chip_2500()
2048 ast_moutdwm(ast, 0x1E78504C, 0x00000000); in ast_post_chip_2500()
2053 * [29]:= 1:Enable USB2.0 Host port#1 (that the mutually shared USB2.0 Hub in ast_post_chip_2500()
2056 * [14:13]:= 1x:USB2.0 Host2 controller in ast_post_chip_2500()
2059 * [18]: 0(24)/1(48) MHz) in ast_post_chip_2500()
2061 * [23]:= write 1 and then SCU70[23] will be clear as 0b. in ast_post_chip_2500()
2063 ast_moutdwm(ast, 0x1E6E2090, 0x20000000); in ast_post_chip_2500()
2064 ast_moutdwm(ast, 0x1E6E2094, 0x00004000); in ast_post_chip_2500()
2065 if (ast_mindwm(ast, 0x1E6E2070) & 0x00800000) { in ast_post_chip_2500()
2066 ast_moutdwm(ast, 0x1E6E207C, 0x00800000); in ast_post_chip_2500()
2068 ast_moutdwm(ast, 0x1E6E2070, 0x00800000); in ast_post_chip_2500()
2071 temp = ast_mindwm(ast, 0x1E6E2070); in ast_post_chip_2500()
2072 if (temp & 0x02000000) in ast_post_chip_2500()
2073 ast_moutdwm(ast, 0x1E6E207C, 0x00004000); in ast_post_chip_2500()
2076 temp = ast_read32(ast, 0x12008); in ast_post_chip_2500()
2077 temp |= 0x73; in ast_post_chip_2500()
2078 ast_write32(ast, 0x12008, temp); in ast_post_chip_2500()
2083 temp = ast_mindwm(ast, 0x1e6e2040); in ast_post_chip_2500()
2084 ast_moutdwm(ast, 0x1e6e2040, temp | 0x40); in ast_post_chip_2500()
2089 reg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); in ast_post_chip_2500()
2090 } while ((reg & 0x40) == 0); in ast_post_chip_2500()