147 	int (*query_hw)(struct malidp_hw_device *hwdev);
152 	void (*enter_config_mode)(struct malidp_hw_device *hwdev);
157 	void (*leave_config_mode)(struct malidp_hw_device *hwdev);
162 	bool (*in_config_mode)(struct malidp_hw_device *hwdev);
171 	void (*set_config_valid)(struct malidp_hw_device *hwdev, u8 value);
177 	void (*modeset)(struct malidp_hw_device *hwdev, struct videomode *m);
183 	int (*rotmem_required)(struct malidp_hw_device *hwdev, u16 w, u16 h,
186 	int (*se_set_scaling_coeffs)(struct malidp_hw_device *hwdev,
190 	long (*se_calc_mclk)(struct malidp_hw_device *hwdev,
203 	int (*enable_memwrite)(struct malidp_hw_device *hwdev, dma_addr_t *addrs,
210 	void (*disable_memwrite)(struct malidp_hw_device *hwdev);
259 static inline u32 malidp_hw_read(struct malidp_hw_device *hwdev, u32 reg)  in malidp_hw_read()  argument
261 	WARN_ON(hwdev->pm_suspended);  in malidp_hw_read()
262 	return readl(hwdev->regs + reg);  in malidp_hw_read()
265 static inline void malidp_hw_write(struct malidp_hw_device *hwdev,  in malidp_hw_write()  argument
268 	WARN_ON(hwdev->pm_suspended);  in malidp_hw_write()
269 	writel(value, hwdev->regs + reg);  in malidp_hw_write()
272 static inline void malidp_hw_setbits(struct malidp_hw_device *hwdev,  in malidp_hw_setbits()  argument
275 	u32 data = malidp_hw_read(hwdev, reg);  in malidp_hw_setbits()
278 	malidp_hw_write(hwdev, data, reg);  in malidp_hw_setbits()
281 static inline void malidp_hw_clearbits(struct malidp_hw_device *hwdev,  in malidp_hw_clearbits()  argument
284 	u32 data = malidp_hw_read(hwdev, reg);  in malidp_hw_clearbits()
287 	malidp_hw_write(hwdev, data, reg);  in malidp_hw_clearbits()
290 static inline u32 malidp_get_block_base(struct malidp_hw_device *hwdev,  in malidp_get_block_base()  argument
295 		return hwdev->hw->map.se_base;  in malidp_get_block_base()
297 		return hwdev->hw->map.dc_base;  in malidp_get_block_base()
303 static inline void malidp_hw_disable_irq(struct malidp_hw_device *hwdev,  in malidp_hw_disable_irq()  argument
306 	u32 base = malidp_get_block_base(hwdev, block);  in malidp_hw_disable_irq()
308 	malidp_hw_clearbits(hwdev, irq, base + MALIDP_REG_MASKIRQ);  in malidp_hw_disable_irq()
311 static inline void malidp_hw_enable_irq(struct malidp_hw_device *hwdev,  in malidp_hw_enable_irq()  argument
314 	u32 base = malidp_get_block_base(hwdev, block);  in malidp_hw_enable_irq()
316 	malidp_hw_setbits(hwdev, irq, base + MALIDP_REG_MASKIRQ);  in malidp_hw_enable_irq()
320 void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev);
321 void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev);
322 void malidp_de_irq_fini(struct malidp_hw_device *hwdev);
324 void malidp_se_irq_fini(struct malidp_hw_device *hwdev);
331 static inline u8 malidp_hw_get_pitch_align(struct malidp_hw_device *hwdev, bool rotated)  in malidp_hw_get_pitch_align()  argument
337 	if (hwdev->hw->map.bus_align_bytes == 8)  in malidp_hw_get_pitch_align()
340 		return hwdev->hw->map.bus_align_bytes << (rotated ? 2 : 0);  in malidp_hw_get_pitch_align()
366 static inline void malidp_se_set_enh_coeffs(struct malidp_hw_device *hwdev)  in malidp_se_set_enh_coeffs()  argument
373 	u32 image_enh = hwdev->hw->map.se_base +  in malidp_se_set_enh_coeffs()
374 			((hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ) ?  in malidp_se_set_enh_coeffs()
379 	malidp_hw_write(hwdev, val, image_enh);  in malidp_se_set_enh_coeffs()
381 		malidp_hw_write(hwdev, enhancer_coeffs[i], enh_coeffs + i * 4);  in malidp_se_set_enh_coeffs()