Lines Matching defs:hdlcd

45 	struct hdlcd_drm_private *hdlcd = arg;
48 irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS);
52 atomic_inc(&hdlcd->buffer_underrun_count);
55 atomic_inc(&hdlcd->dma_end_count);
58 atomic_inc(&hdlcd->bus_error_count);
61 atomic_inc(&hdlcd->vsync_count);
65 drm_crtc_handle_vblank(&hdlcd->crtc);
68 hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status);
73 static int hdlcd_irq_install(struct hdlcd_drm_private *hdlcd)
78 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);
79 hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0);
81 ret = request_irq(hdlcd->irq, hdlcd_irq, 0, "hdlcd", hdlcd);
87 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, HDLCD_DEBUG_INT_MASK);
93 static void hdlcd_irq_uninstall(struct hdlcd_drm_private *hdlcd)
96 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0);
98 free_irq(hdlcd->irq, hdlcd);
103 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
108 hdlcd->clk = devm_clk_get(drm->dev, "pxlclk");
109 if (IS_ERR(hdlcd->clk))
110 return PTR_ERR(hdlcd->clk);
113 atomic_set(&hdlcd->buffer_underrun_count, 0);
114 atomic_set(&hdlcd->bus_error_count, 0);
115 atomic_set(&hdlcd->vsync_count, 0);
116 atomic_set(&hdlcd->dma_end_count, 0);
119 hdlcd->mmio = devm_platform_ioremap_resource(pdev, 0);
120 if (IS_ERR(hdlcd->mmio)) {
122 ret = PTR_ERR(hdlcd->mmio);
123 hdlcd->mmio = NULL;
127 version = hdlcd_read(hdlcd, HDLCD_REG_VERSION);
154 hdlcd->irq = ret;
156 ret = hdlcd_irq_install(hdlcd);
165 drm_crtc_cleanup(&hdlcd->crtc);
200 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
202 seq_printf(m, "underrun : %d\n", atomic_read(&hdlcd->buffer_underrun_count));
203 seq_printf(m, "dma_end : %d\n", atomic_read(&hdlcd->dma_end_count));
204 seq_printf(m, "bus_error: %d\n", atomic_read(&hdlcd->bus_error_count));
205 seq_printf(m, "vsync : %d\n", atomic_read(&hdlcd->vsync_count));
213 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
214 unsigned long clkrate = clk_get_rate(hdlcd->clk);
215 unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000;
235 .name = "hdlcd",
244 struct hdlcd_drm_private *hdlcd;
247 hdlcd = devm_drm_dev_alloc(dev, &hdlcd_driver, typeof(*hdlcd), base);
248 if (IS_ERR(hdlcd))
249 return PTR_ERR(hdlcd);
251 drm = &hdlcd->base;
264 hdlcd->crtc.port = of_graph_get_port_by_id(dev->of_node, 0);
288 if (hdlcd_read(hdlcd, HDLCD_REG_COMMAND)) {
289 hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);
316 of_node_put(hdlcd->crtc.port);
317 hdlcd->crtc.port = NULL;
318 hdlcd_irq_uninstall(hdlcd);
328 struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
333 of_node_put(hdlcd->crtc.port);
334 hdlcd->crtc.port = NULL;
337 hdlcd_irq_uninstall(hdlcd);
383 { .compatible = "arm,hdlcd" },
411 .name = "hdlcd",