Lines Matching refs:hdlcd

40 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
43 	hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);
49 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
50 	unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);
52 	hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask | HDLCD_INTERRUPT_VSYNC);
59 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
60 	unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK);
62 	hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask & ~HDLCD_INTERRUPT_VSYNC);
94 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
109 	hdlcd_write(hdlcd, HDLCD_REG_PIXEL_FORMAT, (btpp - 1) << 3);
121 	hdlcd_write(hdlcd, HDLCD_REG_RED_SELECT, format->red.offset |
126 	hdlcd_write(hdlcd, HDLCD_REG_GREEN_SELECT, format->green.offset |
128 	hdlcd_write(hdlcd, HDLCD_REG_BLUE_SELECT, format->blue.offset |
136 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
156 	hdlcd_write(hdlcd, HDLCD_REG_BUS_OPTIONS,
159 	hdlcd_write(hdlcd, HDLCD_REG_V_DATA, m->crtc_vdisplay - 1);
160 	hdlcd_write(hdlcd, HDLCD_REG_V_BACK_PORCH, vm.vback_porch - 1);
161 	hdlcd_write(hdlcd, HDLCD_REG_V_FRONT_PORCH, vm.vfront_porch - 1);
162 	hdlcd_write(hdlcd, HDLCD_REG_V_SYNC, vm.vsync_len - 1);
163 	hdlcd_write(hdlcd, HDLCD_REG_H_DATA, m->crtc_hdisplay - 1);
164 	hdlcd_write(hdlcd, HDLCD_REG_H_BACK_PORCH, vm.hback_porch - 1);
165 	hdlcd_write(hdlcd, HDLCD_REG_H_FRONT_PORCH, vm.hfront_porch - 1);
166 	hdlcd_write(hdlcd, HDLCD_REG_H_SYNC, vm.hsync_len - 1);
167 	hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities);
173 	clk_set_rate(hdlcd->clk, m->crtc_clock * 1000);
179 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
181 	clk_prepare_enable(hdlcd->clk);
183 	hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 1);
190 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
193 	hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0);
194 	clk_disable_unprepare(hdlcd->clk);
200 	struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc);
203 	rate = clk_round_rate(hdlcd->clk, clk_rate);
274 	struct hdlcd_drm_private *hdlcd;
284 	hdlcd = drm_to_hdlcd_priv(plane->dev);
285 	hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_LENGTH, fb->pitches[0]);
286 	hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_PITCH, fb->pitches[0]);
287 	hdlcd_write(hdlcd, HDLCD_REG_FB_LINE_COUNT, dest_h - 1);
288 	hdlcd_write(hdlcd, HDLCD_REG_FB_BASE, scanout_start);
306 	struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
321 	hdlcd->plane = plane;
328 	struct hdlcd_drm_private *hdlcd = drm_to_hdlcd_priv(drm);
336 	ret = drm_crtc_init_with_planes(drm, &hdlcd->crtc, primary, NULL,
341 	drm_crtc_helper_add(&hdlcd->crtc, &hdlcd_crtc_helper_funcs);