Lines Matching +full:100 +full:ps
369 100,
405 100,
423 100,
602 100,
610 100
651 100,
669 100,
687 100,
1102 100
1629 100
1660 100
1811 100
1865 i_leakage = div64_s64(drm_int2fixp(ileakage), 100); in si_calculate_leakage_for_v_and_t_formula()
1901 i_leakage = div64_s64(drm_int2fixp(ileakage), 100); in si_calculate_leakage_for_v_formula()
1941 (p_limit2 * (u32)100); in si_update_dte_from_pl2()
1970 struct si_ps *ps = aps->ps_priv; in si_get_ps() local
1972 return ps; in si_get_ps()
2199 wintime = (cac_window_size * 100) / xclk; in si_calculate_cac_wintime()
2220 max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2223 *tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2226 *tdp_limit = ((100 - tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2275 …cpu_to_be32(si_scale_power_for_smc((near_tdp_limit * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, … in si_populate_smc_tdp_limits()
2323 …->pm.dpm.near_tdp_limit_adjusted * SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT) / 100, scaling_factor) * … in si_populate_smc_tdp_limits_2()
2434 min_sclk = (prev_sclk * (u32)max_ps_percent) / 100; in si_populate_power_containment_values()
2649 if (si_pi->powertune_data->lkge_lut_v0_percent > 100) in si_get_cac_std_voltage_max_min()
2652 v0_loadline = (*min) * (100 - si_pi->powertune_data->lkge_lut_v0_percent) / 100; in si_get_cac_std_voltage_max_min()
2755 u32 ticks_per_us = amdgpu_asic_get_xclk(adev) / 100; in si_initialize_smc_cac_tables()
2795 load_line_slope = ((u32)adev->pm.dpm.load_line_slope << SMC_SISLANDS_SCALE_R) / 100; in si_initialize_smc_cac_tables()
3341 i_c = (i * r_c) / 100; in r600_calculate_u_and_p()
3361 k = (100 * fh) / fl; in r600_calculate_at()
3362 t1 = (t * (k - 100)); in r600_calculate_at()
3363 a = (1000 * (100 * h + t1)) / (10000 + (t1 / 100)); in r600_calculate_at()
3425 struct si_ps *ps = si_get_ps(rps); in si_apply_state_adjust_rules() local
3484 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()
3485 if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) in si_apply_state_adjust_rules()
3486 ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; in si_apply_state_adjust_rules()
3489 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3490 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()
3491 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()
3492 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()
3493 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()
3494 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()
3495 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()
3496 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3497 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3509 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3511 if (ps->performance_levels[i].sclk > max_sclk_vddc) in si_apply_state_adjust_rules()
3512 ps->performance_levels[i].sclk = max_sclk_vddc; in si_apply_state_adjust_rules()
3515 if (ps->performance_levels[i].mclk > max_mclk_vddci) in si_apply_state_adjust_rules()
3516 ps->performance_levels[i].mclk = max_mclk_vddci; in si_apply_state_adjust_rules()
3519 if (ps->performance_levels[i].mclk > max_mclk_vddc) in si_apply_state_adjust_rules()
3520 ps->performance_levels[i].mclk = max_mclk_vddc; in si_apply_state_adjust_rules()
3523 if (ps->performance_levels[i].mclk > max_mclk) in si_apply_state_adjust_rules()
3524 ps->performance_levels[i].mclk = max_mclk; in si_apply_state_adjust_rules()
3527 if (ps->performance_levels[i].sclk > max_sclk) in si_apply_state_adjust_rules()
3528 ps->performance_levels[i].sclk = max_sclk; in si_apply_state_adjust_rules()
3535 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()
3536 vddci = ps->performance_levels[ps->performance_level_count - 1].vddci; in si_apply_state_adjust_rules()
3538 mclk = ps->performance_levels[0].mclk; in si_apply_state_adjust_rules()
3539 vddci = ps->performance_levels[0].vddci; in si_apply_state_adjust_rules()
3543 sclk = ps->performance_levels[ps->performance_level_count - 1].sclk; in si_apply_state_adjust_rules()
3544 vddc = ps->performance_levels[ps->performance_level_count - 1].vddc; in si_apply_state_adjust_rules()
3546 sclk = ps->performance_levels[0].sclk; in si_apply_state_adjust_rules()
3547 vddc = ps->performance_levels[0].vddc; in si_apply_state_adjust_rules()
3558 ps->performance_levels[0].sclk = sclk; in si_apply_state_adjust_rules()
3559 ps->performance_levels[0].mclk = mclk; in si_apply_state_adjust_rules()
3560 ps->performance_levels[0].vddc = vddc; in si_apply_state_adjust_rules()
3561 ps->performance_levels[0].vddci = vddci; in si_apply_state_adjust_rules()
3564 sclk = ps->performance_levels[0].sclk; in si_apply_state_adjust_rules()
3565 for (i = 1; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3566 if (sclk < ps->performance_levels[i].sclk) in si_apply_state_adjust_rules()
3567 sclk = ps->performance_levels[i].sclk; in si_apply_state_adjust_rules()
3569 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3570 ps->performance_levels[i].sclk = sclk; in si_apply_state_adjust_rules()
3571 ps->performance_levels[i].vddc = vddc; in si_apply_state_adjust_rules()
3574 for (i = 1; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3575 if (ps->performance_levels[i].sclk < ps->performance_levels[i - 1].sclk) in si_apply_state_adjust_rules()
3576 ps->performance_levels[i].sclk = ps->performance_levels[i - 1].sclk; in si_apply_state_adjust_rules()
3577 if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc) in si_apply_state_adjust_rules()
3578 ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; in si_apply_state_adjust_rules()
3583 mclk = ps->performance_levels[0].mclk; in si_apply_state_adjust_rules()
3584 for (i = 1; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3585 if (mclk < ps->performance_levels[i].mclk) in si_apply_state_adjust_rules()
3586 mclk = ps->performance_levels[i].mclk; in si_apply_state_adjust_rules()
3588 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3589 ps->performance_levels[i].mclk = mclk; in si_apply_state_adjust_rules()
3590 ps->performance_levels[i].vddci = vddci; in si_apply_state_adjust_rules()
3593 for (i = 1; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3594 if (ps->performance_levels[i].mclk < ps->performance_levels[i - 1].mclk) in si_apply_state_adjust_rules()
3595 ps->performance_levels[i].mclk = ps->performance_levels[i - 1].mclk; in si_apply_state_adjust_rules()
3596 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in si_apply_state_adjust_rules()
3597 ps->performance_levels[i].vddci = ps->performance_levels[i - 1].vddci; in si_apply_state_adjust_rules()
3601 for (i = 0; i < ps->performance_level_count; i++) in si_apply_state_adjust_rules()
3603 &ps->performance_levels[i]); in si_apply_state_adjust_rules()
3605 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3606 if (ps->performance_levels[i].vddc < min_vce_voltage) in si_apply_state_adjust_rules()
3607 ps->performance_levels[i].vddc = min_vce_voltage; in si_apply_state_adjust_rules()
3609 ps->performance_levels[i].sclk, in si_apply_state_adjust_rules()
3610 max_limits->vddc, &ps->performance_levels[i].vddc); in si_apply_state_adjust_rules()
3612 ps->performance_levels[i].mclk, in si_apply_state_adjust_rules()
3613 max_limits->vddci, &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
3615 ps->performance_levels[i].mclk, in si_apply_state_adjust_rules()
3616 max_limits->vddc, &ps->performance_levels[i].vddc); in si_apply_state_adjust_rules()
3619 max_limits->vddc, &ps->performance_levels[i].vddc); in si_apply_state_adjust_rules()
3622 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3625 &ps->performance_levels[i].vddc, in si_apply_state_adjust_rules()
3626 &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
3629 ps->dc_compatible = true; in si_apply_state_adjust_rules()
3630 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()
3631 if (ps->performance_levels[i].vddc > adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc) in si_apply_state_adjust_rules()
3632 ps->dc_compatible = false; in si_apply_state_adjust_rules()
3859 struct si_ps *ps = si_get_ps(rps); in si_dpm_force_performance_level() local
3860 u32 levels = ps->performance_level_count; in si_dpm_force_performance_level()
4113 vddc_dly = (voltage_response_time * reference_clock) / 100; in si_program_response_times()
4114 acpi_dly = (acpi_delay_time * reference_clock) / 100; in si_program_response_times()
4115 vbi_dly = (vbi_time_out * reference_clock) / 100; in si_program_response_times()
5413 u32 clkv = (u32)((((131 * ss.percentage * ss.rate) / 100) * tmp) / freq_nom); in si_populate_mclk_value()
5449 struct si_ps *ps = si_get_ps(amdgpu_state); in si_populate_smc_sp() local
5453 for (i = 0; i < ps->performance_level_count - 1; i++) in si_populate_smc_sp()
5456 smc_state->levels[ps->performance_level_count - 1].bSP = in si_populate_smc_sp()
5589 (50 / SISLANDS_MAX_HARDWARE_POWERLEVELS) * 100 * (i + 1), in si_populate_smc_t()
5590 100 * R600_AH_DFLT, in si_populate_smc_t()
5683 threshold = state->performance_levels[state->performance_level_count-1].sclk * 100 / 100; in si_convert_power_state_to_smc()
6513 slope1 = (u16)((50 + ((16 * duty100 * pwm_diff1) / t_diff1)) / 100); in si_thermal_setup_fan_table()
6514 slope2 = (u16)((50 + ((16 * duty100 * pwm_diff2) / t_diff2)) / 100); in si_thermal_setup_fan_table()
6516 fan_table.temp_min = cpu_to_be16((50 + adev->pm.dpm.fan.t_min) / 100); in si_thermal_setup_fan_table()
6517 fan_table.temp_med = cpu_to_be16((50 + adev->pm.dpm.fan.t_med) / 100); in si_thermal_setup_fan_table()
6518 fan_table.temp_max = cpu_to_be16((50 + adev->pm.dpm.fan.t_max) / 100); in si_thermal_setup_fan_table()
7182 struct si_ps *ps = si_get_ps(rps); in si_parse_pplib_clock_info() local
7184 struct rv7xx_pl *pl = &ps->performance_levels[index]; in si_parse_pplib_clock_info()
7187 ps->performance_level_count = index + 1; in si_parse_pplib_clock_info()
7271 struct si_ps *ps; in si_parse_power_table() local
7290 adev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in si_parse_power_table()
7293 if (!adev->pm.dpm.ps) in si_parse_power_table()
7302 ps = kzalloc(sizeof(struct si_ps), GFP_KERNEL); in si_parse_power_table()
7303 if (ps == NULL) in si_parse_power_table()
7305 adev->pm.dpm.ps[i].ps_priv = ps; in si_parse_power_table()
7306 si_parse_pplib_non_clock_info(adev, &adev->pm.dpm.ps[i], in si_parse_power_table()
7321 &adev->pm.dpm.ps[i], k, in si_parse_power_table()
7513 if (adev->pm.dpm.ps) in si_dpm_fini()
7515 kfree(adev->pm.dpm.ps[i].ps_priv); in si_dpm_fini()
7516 kfree(adev->pm.dpm.ps); in si_dpm_fini()
7528 struct si_ps *ps = si_get_ps(rps); in si_dpm_debugfs_print_current_performance_level() local
7534 if (current_index >= ps->performance_level_count) { in si_dpm_debugfs_print_current_performance_level()
7537 pl = &ps->performance_levels[current_index]; in si_dpm_debugfs_print_current_performance_level()
7916 struct si_ps *ps = si_get_ps(rps); in si_dpm_print_power_state() local
7923 for (i = 0; i < ps->performance_level_count; i++) { in si_dpm_print_power_state()
7924 pl = &ps->performance_levels[i]; in si_dpm_print_power_state()
8002 struct si_ps *ps = si_get_ps(rps); in si_dpm_read_sensor() local
8014 if (pl_index < ps->performance_level_count) { in si_dpm_read_sensor()
8015 sclk = ps->performance_levels[pl_index].sclk; in si_dpm_read_sensor()
8022 if (pl_index < ps->performance_level_count) { in si_dpm_read_sensor()
8023 mclk = ps->performance_levels[pl_index].mclk; in si_dpm_read_sensor()