Lines Matching refs:handle
416 int (*pre_set_power_state)(void *handle);
417 int (*set_power_state)(void *handle);
418 void (*post_set_power_state)(void *handle);
419 void (*display_configuration_changed)(void *handle);
420 void (*print_power_state)(void *handle, void *ps);
421 bool (*vblank_too_short)(void *handle);
422 void (*notify_ac_dc)(void *handle);
423 int (*check_state_equal)(void *handle,
428 int (*set_fan_control_mode)(void *handle, u32 mode);
429 int (*get_fan_control_mode)(void *handle, u32 *fan_mode);
430 int (*set_fan_speed_pwm)(void *handle, u32 speed);
431 int (*get_fan_speed_pwm)(void *handle, u32 *speed);
432 int (*force_clock_level)(void *handle, enum pp_clock_type type, uint32_t mask);
433 int (*print_clock_levels)(void *handle, enum pp_clock_type type, char *buf);
434 int (*emit_clock_levels)(void *handle, enum pp_clock_type type, char *buf, int *offset);
435 int (*force_performance_level)(void *handle, enum amd_dpm_forced_level level);
436 int (*get_sclk_od)(void *handle);
437 int (*set_sclk_od)(void *handle, uint32_t value);
438 int (*get_mclk_od)(void *handle);
439 int (*set_mclk_od)(void *handle, uint32_t value);
440 int (*read_sensor)(void *handle, int idx, void *value, int *size);
441 int (*get_apu_thermal_limit)(void *handle, uint32_t *limit);
442 int (*set_apu_thermal_limit)(void *handle, uint32_t limit);
443 enum amd_dpm_forced_level (*get_performance_level)(void *handle);
444 enum amd_pm_state_type (*get_current_power_state)(void *handle);
445 int (*get_fan_speed_rpm)(void *handle, uint32_t *rpm);
446 int (*set_fan_speed_rpm)(void *handle, uint32_t rpm);
447 int (*get_pp_num_states)(void *handle, struct pp_states_info *data);
448 int (*get_pp_table)(void *handle, char **table);
449 int (*set_pp_table)(void *handle, const char *buf, size_t size);
450 void (*debugfs_print_current_performance_level)(void *handle, struct seq_file *m);
451 int (*switch_power_profile)(void *handle, enum PP_SMC_POWER_PROFILE type, bool en);
452 int (*pause_power_profile)(void *handle, bool pause);
454 struct amd_vce_state *(*get_vce_clock_state)(void *handle, u32 idx);
455 int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,
457 int (*load_firmware)(void *handle);
458 int (*wait_for_fw_loading_complete)(void *handle);
459 int (*set_powergating_by_smu)(void *handle,
463 int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
464 int (*set_power_limit)(void *handle, uint32_t limit_type, uint32_t n);
465 int (*get_power_limit)(void *handle, uint32_t *limit,
468 int (*get_power_profile_mode)(void *handle, char *buf);
469 int (*set_power_profile_mode)(void *handle, long *input, uint32_t size);
470 int (*set_fine_grain_clk_vol)(void *handle, uint32_t type, long *input, uint32_t size);
471 int (*odn_edit_dpm_table)(void *handle, enum PP_OD_DPM_TABLE_COMMAND type,
473 int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
474 int (*smu_i2c_bus_access)(void *handle, bool acquire);
475 int (*gfx_state_change_set)(void *handle, uint32_t state);
477 u32 (*get_sclk)(void *handle, bool low);
478 u32 (*get_mclk)(void *handle, bool low);
479 int (*display_configuration_change)(void *handle,
481 int (*get_current_clocks)(void *handle,
483 int (*get_clock_by_type)(void *handle,
486 int (*get_clock_by_type_with_latency)(void *handle,
489 int (*get_clock_by_type_with_voltage)(void *handle,
492 int (*set_watermarks_for_clocks_ranges)(void *handle,
494 int (*display_clock_voltage_request)(void *handle,
496 int (*get_display_mode_validation_clocks)(void *handle,
498 int (*notify_smu_enable_pwe)(void *handle);
499 int (*enable_mgpu_fan_boost)(void *handle);
500 int (*set_active_display_count)(void *handle, uint32_t count);
501 int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock);
502 int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);
503 int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock);
504 int (*get_asic_baco_capability)(void *handle);
505 int (*get_asic_baco_state)(void *handle, int *state);
506 int (*set_asic_baco_state)(void *handle, int state);
507 int (*get_ppfeature_status)(void *handle, char *buf);
508 int (*set_ppfeature_status)(void *handle, uint64_t ppfeature_masks);
509 int (*asic_reset_mode_2)(void *handle);
510 int (*asic_reset_enable_gfx_features)(void *handle);
511 int (*set_df_cstate)(void *handle, enum pp_df_cstate state);
512 int (*set_xgmi_pstate)(void *handle, uint32_t pstate);
513 ssize_t (*get_gpu_metrics)(void *handle, void **table);
514 ssize_t (*get_temp_metrics)(void *handle, enum smu_temp_metric_type type, void *table);
515 bool (*temp_metrics_is_supported)(void *handle, enum smu_temp_metric_type type);
516 ssize_t (*get_xcp_metrics)(void *handle, int xcp_id, void *table);
517 ssize_t (*get_pm_metrics)(void *handle, void *pmmetrics, size_t size);
518 int (*set_watermarks_for_clock_ranges)(void *handle,
520 int (*display_disable_memory_clock_switch)(void *handle,
522 int (*get_max_sustainable_clocks_by_dc)(void *handle,
524 int (*get_uclk_dpm_states)(void *handle,
527 int (*get_dpm_clock_table)(void *handle,
529 int (*get_smu_prv_buf_details)(void *handle, void **addr, size_t *size);
530 void (*pm_compute_clocks)(void *handle);
531 int (*notify_rlc_state)(void *handle, bool en);