Lines Matching +full:0 +full:x00000053
30 #define VISLANDS30_IV_SRCID_D1_V_UPDATE_INT 7 // 0x07
31 #define VISLANDS30_IV_EXTID_D1_V_UPDATE_INT 0
33 #define VISLANDS30_IV_SRCID_D1_GRPH_PFLIP 8 // 0x08
34 #define VISLANDS30_IV_EXTID_D1_GRPH_PFLIP 0
36 #define VISLANDS30_IV_SRCID_D2_V_UPDATE_INT 9 // 0x09
37 #define VISLANDS30_IV_EXTID_D2_V_UPDATE_INT 0
39 #define VISLANDS30_IV_SRCID_D2_GRPH_PFLIP 10 // 0x0a
40 #define VISLANDS30_IV_EXTID_D2_GRPH_PFLIP 0
42 #define VISLANDS30_IV_SRCID_D3_V_UPDATE_INT 11 // 0x0b
43 #define VISLANDS30_IV_EXTID_D3_V_UPDATE_INT 0
45 #define VISLANDS30_IV_SRCID_D3_GRPH_PFLIP 12 // 0x0c
46 #define VISLANDS30_IV_EXTID_D3_GRPH_PFLIP 0
48 #define VISLANDS30_IV_SRCID_D4_V_UPDATE_INT 13 // 0x0d
49 #define VISLANDS30_IV_EXTID_D4_V_UPDATE_INT 0
51 #define VISLANDS30_IV_SRCID_D4_GRPH_PFLIP 14 // 0x0e
52 #define VISLANDS30_IV_EXTID_D4_GRPH_PFLIP 0
54 #define VISLANDS30_IV_SRCID_D5_V_UPDATE_INT 15 // 0x0f
55 #define VISLANDS30_IV_EXTID_D5_V_UPDATE_INT 0
57 #define VISLANDS30_IV_SRCID_D5_GRPH_PFLIP 16 // 0x10
58 #define VISLANDS30_IV_EXTID_D5_GRPH_PFLIP 0
60 #define VISLANDS30_IV_SRCID_D6_V_UPDATE_INT 17 // 0x11
61 #define VISLANDS30_IV_EXTID_D6_V_UPDATE_INT 0
63 #define VISLANDS30_IV_SRCID_D6_GRPH_PFLIP 18 // 0x12
64 #define VISLANDS30_IV_EXTID_D6_GRPH_PFLIP 0
66 #define VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT0 19 // 0x13
69 #define VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT1 19 // 0x13
72 #define VISLANDS30_IV_SRCID_D1_VERTICAL_INTERRUPT2 19 // 0x13
75 #define VISLANDS30_IV_SRCID_D1_EXT_TIMING_SYNC_LOSS 19 // 0x13
78 #define VISLANDS30_IV_SRCID_D1_EXT_TIMING_SYNC 19 // 0x13
81 #define VISLANDS30_IV_SRCID_D1_EXT_TIMING_SIGNAL 19 // 0x13
84 #define VISLANDS30_IV_SRCID_D2_VERTICAL_INTERRUPT0 20 // 0x14
87 #define VISLANDS30_IV_SRCID_D2_VERTICAL_INTERRUPT1 20 // 0x14
90 #define VISLANDS30_IV_SRCID_D2_VERTICAL_INTERRUPT2 20 // 0x14
93 #define VISLANDS30_IV_SRCID_D2_EXT_TIMING_SYNC_LOSS 20 // 0x14
96 #define VISLANDS30_IV_SRCID_D2_EXT_TIMING_SYNC 20 // 0x14
99 #define VISLANDS30_IV_SRCID_D2_EXT_TIMING_SIGNAL 20 // 0x14
102 #define VISLANDS30_IV_SRCID_D3_VERTICAL_INTERRUPT0 21 // 0x15
105 #define VISLANDS30_IV_SRCID_D3_VERTICAL_INTERRUPT1 21 // 0x15
108 #define VISLANDS30_IV_SRCID_D3_VERTICAL_INTERRUPT2 21 // 0x15
111 #define VISLANDS30_IV_SRCID_D3_EXT_TIMING_SYNC_LOSS 21 // 0x15
114 #define VISLANDS30_IV_SRCID_D3_EXT_TIMING_SYNC 21 // 0x15
117 #define VISLANDS30_IV_SRCID_D3_EXT_TIMING_SIGNAL 21 // 0x15
120 #define VISLANDS30_IV_SRCID_D4_VERTICAL_INTERRUPT0 22 // 0x16
123 #define VISLANDS30_IV_SRCID_D4_VERTICAL_INTERRUPT1 22 // 0x16
126 #define VISLANDS30_IV_SRCID_D4_VERTICAL_INTERRUPT2 22 // 0x16
129 #define VISLANDS30_IV_SRCID_D4_EXT_TIMING_SYNC_LOSS 22 // 0x16
132 #define VISLANDS30_IV_SRCID_D4_EXT_TIMING_SYNC 22 // 0x16
135 #define VISLANDS30_IV_SRCID_D4_EXT_TIMING_SIGNAL 22 // 0x16
138 #define VISLANDS30_IV_SRCID_D5_VERTICAL_INTERRUPT0 23 // 0x17
141 #define VISLANDS30_IV_SRCID_D5_VERTICAL_INTERRUPT1 23 // 0x17
144 #define VISLANDS30_IV_SRCID_D5_VERTICAL_INTERRUPT2 23 // 0x17
147 #define VISLANDS30_IV_SRCID_D5_EXT_TIMING_SYNC_LOSS 23 // 0x17
150 #define VISLANDS30_IV_SRCID_D5_EXT_TIMING_SYNC 23 // 0x17
153 #define VISLANDS30_IV_SRCID_D5_EXT_TIMING_SIGNAL 23 // 0x17
156 #define VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT0 24 // 0x18
159 #define VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT1 24 // 0x18
162 #define VISLANDS30_IV_SRCID_D6_VERTICAL_INTERRUPT2 24 // 0x18
165 #define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_A 42 // 0x2a
166 #define VISLANDS30_IV_EXTID_HOTPLUG_DETECT_A 0
168 #define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_B 42 // 0x2a
171 #define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_C 42 // 0x2a
174 #define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_D 42 // 0x2a
177 #define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_E 42 // 0x2a
180 #define VISLANDS30_IV_SRCID_HOTPLUG_DETECT_F 42 // 0x2a
183 #define VISLANDS30_IV_SRCID_HPD_RX_A 42 // 0x2a
186 #define VISLANDS30_IV_SRCID_HPD_RX_B 42 // 0x2a
189 #define VISLANDS30_IV_SRCID_HPD_RX_C 42 // 0x2a
192 #define VISLANDS30_IV_SRCID_HPD_RX_D 42 // 0x2a
195 #define VISLANDS30_IV_SRCID_HPD_RX_E 42 // 0x2a
198 #define VISLANDS30_IV_SRCID_HPD_RX_F 42 // 0x2a
201 #define VISLANDS30_IV_SRCID_GPIO_19 0x00000053 /* 83 */
203 #define VISLANDS30_IV_SRCID_SRBM_READ_TIMEOUT_ERR 0x00000060 /* 96 */
204 #define VISLANDS30_IV_SRCID_SRBM_CTX_SWITCH 0x00000061 /* 97 */
206 #define VISLANDS30_IV_SRBM_REG_ACCESS_ERROR 0x00000062 /* 98 */
209 #define VISLANDS30_IV_SRCID_UVD_ENC_GEN_PURP 0x00000077 /* 119 */
210 #define VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE 0x0000007c /* 124 */
212 #define VISLANDS30_IV_SRCID_BIF_PF_VF_MSGBUF_VALID 0x00000087 /* 135 */
214 #define VISLANDS30_IV_SRCID_BIF_VF_PF_MSGBUF_ACK 0x0000008a /* 138 */
216 #define VISLANDS30_IV_SRCID_SYS_PAGE_INV_FAULT 0x0000008c /* 140 */
217 #define VISLANDS30_IV_SRCID_SYS_MEM_PROT_FAULT 0x0000008d /* 141 */
219 #define VISLANDS30_IV_SRCID_SEM_PAGE_INV_FAULT 0x00000090 /* 144 */
220 #define VISLANDS30_IV_SRCID_SEM_MEM_PROT_FAULT 0x00000091 /* 145 */
222 #define VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT 0x00000092 /* 146 */
223 #define VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT 0x00000093 /* 147 */
225 #define VISLANDS30_IV_SRCID_ACP 0x000000a2 /* 162 */
227 #define VISLANDS30_IV_SRCID_VCE_TRAP 0x000000a7 /* 167 */
228 #define VISLANDS30_IV_EXTID_VCE_TRAP_GENERAL_PURPOSE 0
232 #define VISLANDS30_IV_SRCID_CP_INT_RB 0x000000b0 /* 176 */
233 #define VISLANDS30_IV_SRCID_CP_INT_IB1 0x000000b1 /* 177 */
234 #define VISLANDS30_IV_SRCID_CP_INT_IB2 0x000000b2 /* 178 */
235 #define VISLANDS30_IV_SRCID_CP_PM4_RES_BITS_ERR 0x000000b4 /* 180 */
236 #define VISLANDS30_IV_SRCID_CP_END_OF_PIPE 0x000000b5 /* 181 */
237 #define VISLANDS30_IV_SRCID_CP_BAD_OPCODE 0x000000b7 /* 183 */
238 #define VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT 0x000000b8 /* 184 */
239 #define VISLANDS30_IV_SRCID_CP_PRIV_INSTR_FAULT 0x000000b9 /* 185 */
240 #define VISLANDS30_IV_SRCID_CP_WAIT_MEM_SEM_FAULT 0x000000ba /* 186 */
241 #define VISLANDS30_IV_SRCID_CP_GUI_IDLE 0x000000bb /* 187 */
242 #define VISLANDS30_IV_SRCID_CP_GUI_BUSY 0x000000bc /* 188 */
244 #define VISLANDS30_IV_SRCID_CP_COMPUTE_QUERY_STATUS 0x000000bf /* 191 */
245 #define VISLANDS30_IV_SRCID_CP_ECC_ERROR 0x000000c5 /* 197 */
247 #define CARRIZO_IV_SRCID_CP_COMPUTE_QUERY_STATUS 0x000000c7 /* 199 */
249 #define VISLANDS30_IV_SRCID_CP_WAIT_REG_MEM_POLL_TIMEOUT 0x000000c0 /* 192 */
250 #define VISLANDS30_IV_SRCID_CP_SEM_SIG_INCOMPL 0x000000c1 /* 193 */
251 #define VISLANDS30_IV_SRCID_CP_PREEMPT_ACK 0x000000c2 /* 194 */
252 #define VISLANDS30_IV_SRCID_CP_GENERAL_PROT_FAULT 0x000000c3 /* 195 */
253 #define VISLANDS30_IV_SRCID_CP_GDS_ALLOC_ERROR 0x000000c4 /* 196 */
254 #define VISLANDS30_IV_SRCID_CP_ECC_ERROR 0x000000c5 /* 197 */
256 #define VISLANDS30_IV_SRCID_RLC_STRM_PERF_MONITOR 0x000000ca /* 202 */
258 #define VISLANDS30_IV_SDMA_ATOMIC_SRC_ID 0x000000da /* 218 */
260 #define VISLANDS30_IV_SRCID_SDMA_ECC_ERROR 0x000000dc /* 220 */
262 #define VISLANDS30_IV_SRCID_SDMA_TRAP 0x000000e0 /* 224 */
263 #define VISLANDS30_IV_SRCID_SDMA_SEM_INCOMPLETE 0x000000e1 /* 225 */
264 #define VISLANDS30_IV_SRCID_SDMA_SEM_WAIT 0x000000e2 /* 226 */
267 #define VISLANDS30_IV_SRCID_SMU_DISP_TIMER2_TRIGGER 0x000000e5 /* 229 */
269 #define VISLANDS30_IV_SRCID_CG_TSS_THERMAL_LOW_TO_HIGH 0x000000e6 /* 230 */
270 #define VISLANDS30_IV_SRCID_CG_TSS_THERMAL_HIGH_TO_LOW 0x000000e7 /* 231 */
272 #define VISLANDS30_IV_SRCID_GRBM_READ_TIMEOUT_ERR 0x000000e8 /* 232 */
273 #define VISLANDS30_IV_SRCID_GRBM_REG_GUI_IDLE 0x000000e9 /* 233 */
275 #define VISLANDS30_IV_SRCID_SQ_INTERRUPT_MSG 0x000000ef /* 239 */
277 #define VISLANDS30_IV_SRCID_SDMA_PREEMPT 0x000000f0 /* 240 */
278 #define VISLANDS30_IV_SRCID_SDMA_VM_HOLE 0x000000f2 /* 242 */
279 #define VISLANDS30_IV_SRCID_SDMA_CTXEMPTY 0x000000f3 /* 243 */
280 #define VISLANDS30_IV_SRCID_SDMA_DOORBELL_INVALID 0x000000f4 /* 244 */
281 #define VISLANDS30_IV_SRCID_SDMA_FROZEN 0x000000f5 /* 245 */
282 #define VISLANDS30_IV_SRCID_SDMA_POLL_TIMEOUT 0x000000f6 /* 246 */
283 #define VISLANDS30_IV_SRCID_SDMA_SRBM_WRITE 0x000000f7 /* 247 */
285 #define VISLANDS30_IV_SRCID_CG_THERMAL_TRIG 0x000000f8 /* 248 */
287 #define VISLANDS30_IV_SRCID_SMU_DISP_TIMER_TRIGGER 0x000000fd /* 253 */
290 #define VISLANDS30_IV_SRCID_VM_CONTEXT_ALL 0x00000100 /* 256 */
291 #define VISLANDS30_IV_EXTID_VM_CONTEXT0_ALL 0
296 #define VISLANDS30_IV_EXTID_NONE 0x00000000
297 #define VISLANDS30_IV_EXTID_INVALID 0xffffffff