Lines Matching +full:powered +full:- +full:remotely
2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
61 * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC
65 * MAX_PLANES - representative of the upper bound of planes that are supported by the HW
118 // for example, 1080p -> 8K is 4.0, or 4000 raw value
126 // for example, 8K -> 1080p is 0.25, or 250 raw value
138 * DOC: color-management-caps
143 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
150 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
166 * struct dpp_color_caps - color pipeline capabilities for display pipe and
171 * just plain 256-entry lookup
180 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
181 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
182 * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
230 * struct mpc_color_caps - color pipeline capabilities for multiple pipe and
240 * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
259 * struct dc_color_caps - color pipes capabilities for DPP and MPC hw blocks
437 * re-programming however do not affect bandwidth consumption or clock
583 INGAME_FAMS_SINGLE_DISP_ENABLE, // enable in-game fams
584 INGAME_FAMS_DISABLE, // disable in-game fams
585 INGAME_FAMS_MULTI_DISP_ENABLE, //enable in-game fams for multi-display
586 …INGAME_FAMS_MULTI_DISP_CLAMPED_ONLY, //enable in-game fams for multi-display only for clamped RR s…
590 * enum pipe_split_policy - Pipe split strategy supported by DCN
598 * pipe in order to bring the best trade-off between performance and
630 DCN_PWR_STATE_UNKNOWN = -1,
645 * struct dc_clocks - DC pipe clocks
701 * Efficiencies are stored as percentage (0-100)
727 unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
728 dm_get_timestamp(dc->ctx) : 0
731 if (dc->debug.bw_val_profile.enable) \
732 dc->debug.bw_val_profile.total_count++
735 if (dc->debug.bw_val_profile.enable) { \
737 voltage_level_tick = dm_get_timestamp(dc->ctx); \
738 dc->debug.bw_val_profile.skip_ ## status ## _count++; \
742 if (dc->debug.bw_val_profile.enable) \
743 voltage_level_tick = dm_get_timestamp(dc->ctx)
746 if (dc->debug.bw_val_profile.enable) \
747 watermark_tick = dm_get_timestamp(dc->ctx)
750 if (dc->debug.bw_val_profile.enable) { \
751 end_tick = dm_get_timestamp(dc->ctx); \
752 dc->debug.bw_val_profile.total_ticks += end_tick - start_tick; \
753 dc->debug.bw_val_profile.voltage_level_ticks += voltage_level_tick - start_tick; \
755 dc->debug.bw_val_profile.watermark_ticks += watermark_tick - voltage_level_tick; \
756 dc->debug.bw_val_profile.rq_dlg_ticks += end_tick - watermark_tick; \
861 * 15-2: reserved
862 * 31-16: timeout in ms
935 * struct dc_debug_options - DC debug struct
1051 /* TODO - remove once tested */
1535 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
1609 * Pending allows link HWSS to differentiate PHY vs non-PHY pattern,
1613 * pending_test_pattern will be invalid or contain a non-PHY test pattern
1690 …bool link_powered_externally; // Used to bypass hardware sequencing delays when panel is powered d…
1821 * Color Transformations for pre-blend MCM (Shaper, 3DLUT, 1DLUT)
1868 * struct dc_validation_set - Struct to store surface/stream associations for validation
1943 * return - minimum required timing bandwidth in kbps.
1981 * @reason - Indicate which event triggers this detection. dc may customize
1983 * return false - if detection is not fully completed. This could happen when
1986 * link->connection_type == dc_connection_mst_branch when returning false).
1987 * return true - detection is completed, link has been fully updated with latest
1999 * @dc_link - link the remote sink will be added to.
2000 * @edid - byte array of EDID raw data.
2001 * @len - size of the edid in byte
2002 * @init_data -
2011 * @link - link the sink should be removed from
2012 * @sink - sink to be removed.
2026 * @type - dc_connection_single if connected, dc_connection_none otherwise.
2027 * return - false if an unexpected error occurs, true otherwise.
2038 * return - true HPD is asserted (HPD high), false otherwise (HPD low)
2048 * @link - The link the HPD pin is associated with.
2049 * @enable = true - enable hardware HPD filter. HPD event will only queued to irq
2056 * @enable = false - disable hardware HPD filter. HPD event will be queued
2063 * @link_index - index to a link with ddc in i2c mode
2064 * @cmd - i2c command structure
2065 * return - true if success, false otherwise.
2073 * @link_index - index to a link with ddc in i2c mode
2074 * @cmd - i2c command structure
2075 * return - true if success, false otherwise.
2083 * retries or handle error states. The reply is returned in the payload->reply
2085 * transferred,or -1 on a failure.
2105 * TODO - When defer_handling is true the function will have a different purpose.
2110 * true - Downstream port status changed. DM should call DC to do the
2112 * false - no change in Downstream port status. No further action required
2127 * return true - hpd rx irq should be handled.
2128 * return false - it is safe to ignore hpd rx irq event
2133 * @link - link the hpd irq data associated with
2134 * @hpd_irq_dpcd_data - input hpd irq data
2135 * return - true if hpd irq data indicates a link lost
2141 * @link - link where the hpd irq data should be read from
2142 * @irq_data - output hpd irq data
2143 * return - DC_OK if hpd irq data is read successfully, otherwise hpd irq data
2153 * TODO - in the future we should consider to expand link resume interface to
2168 * return - total effective link bandwidth in kbps.
2186 * return - min hblank size in bytes, 0 if 8b/10b SST.
2226 * interface i.e stream_update->dsc_config
2234 * @link - current detected link
2235 * @req_bw - requested bandwidth in kbps
2236 * @link_settings - returned most optimal link settings that can fit the
2238 * return - false if link can't support requested bandwidth, true if link
2254 * @link - a link with DP RX connection
2255 * return - if stream is committed to this link with MST signal type, type of
2264 * @link - a link with DP RX connection
2265 * return - max dp link settings the link can enable.
2273 * @link - a link with DP RX connection
2274 * return - highest encoding format link supports.
2280 * @link - a link with dp connector signal type
2281 * return - true if connected, false otherwise
2285 /* Force DP lane settings update to main-link video signal and notify the change
2290 * @lt_settings - a container structure with desired hw_lane_settings
2297 * test or debugging purpose. The test pattern will remain until next un-plug.
2299 * @link - active link with DP signal output enabled.
2300 * @test_pattern - desired test pattern to output.
2302 * @test_pattern_color_space - for video test pattern choose a desired color
2304 * @p_link_settings - For PHY pattern choose a desired link settings
2305 * @p_custom_pattern - some test pattern will require a custom input to
2307 * @cust_pattern_size - size of the custom pattern input.
2332 * @link_settings - if not NULL, force preferred link settings to the link.
2333 * @lt_override - a set of override pointers. If any pointer is none NULL, dc
2345 /* return - true if FEC is supported with connected DP RX, false otherwise */
2350 * return - true if FEC should be enabled, false otherwise.
2361 * NOTE: this interface doesn't update dp main-link. Calling this function will
2362 * cause DP TX main-link and DP RX power states out of sync. DM has to restore
2365 * @on - true to set DP RX in D0 power state, false to set DP RX in D3 power
2370 /* Force link to read base dp receiver caps from dpcd 000h - 00Fh and overwrite
2371 * current value read from extended receiver cap from 02200h - 0220Fh.
2388 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
2434 * return - true if trace is initialized and has valid data. False dp trace
2455 * @in_detection - true to get link training end time stamp of last link
2463 * @in_detection - true to get link training count of last link
2477 * Send a request from DP-Tx requesting to allocate BW remotely after
2491 * Unplug => de-allocate bw
2514 /* Sink Interfaces - A sink corresponds to a display output device */
2519 // 8 byte port ID -> ELD.PortID
2521 // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
2523 // 2 byte product code -> ELD.ProductCode
2742 * dc_get_underflow_debug_data_for_otg() - Retrieve underflow debug data.
2748 * This function collects and logs underflow-related HW states when underflow happens,
2749 * including OTG underflow status, current read positions, frame count, and per-HUBP debug data.