Lines Matching defs:reg_offset

311 				      u32 sh_num, u32 reg_offset)
314 		return amdgpu_read_indexed_register(adev, se_num, sh_num, reg_offset);
316 		if (reg_offset == SOC15_REG_OFFSET(GC, 0, regGB_ADDR_CONFIG) && adev->gfx.config.gb_addr_config)
318 		return RREG32(reg_offset);
323 			    u32 sh_num, u32 reg_offset, u32 *value)
331 		if (!adev->reg_offset[en->hwip][en->inst])
333 		else if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
334 					+ en->reg_offset))
339 					       se_num, sh_num, reg_offset);