Lines Matching full:sdma
229 /* SDMA seems to miss doorbells sometimes when powergating kicks in. in sdma_v5_2_ring_set_wptr()
255 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_2_ring_insert_nop() local
259 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v5_2_ring_insert_nop()
418 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_stop()
477 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_ctx_switch_enable()
516 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_enable()
525 * sdma_v5_2_gfx_resume_instance - start/restart a certain sdma engine
546 ring = &adev->sdma.instance[i].ring; in sdma_v5_2_gfx_resume_instance()
698 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_resume()
721 * sdma_v5_2_load_microcode - load the sDMA ME ucode
738 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_load_microcode()
739 if (!adev->sdma.instance[i].fw) in sdma_v5_2_load_microcode()
742 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v5_2_load_microcode()
747 (adev->sdma.instance[i].fw->data + in sdma_v5_2_load_microcode()
758 WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version); in sdma_v5_2_load_microcode()
771 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_soft_reset()
834 /* enable sdma ring preemption */ in sdma_v5_2_start()
1070 * Update PTEs by copying them from the GART using sDMA.
1098 * Update PTEs by writing them manually using sDMA.
1119 * sdma_v5_2_vm_set_pte_pde - update the page tables using sDMA
1128 * Update the page tables using sDMA.
1158 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v5_2_ring_pad_ib() local
1164 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v5_2_ring_pad_ib()
1201 * sdma_v5_2_ring_emit_vm_flush - vm flush using sDMA
1208 * using sDMA.
1330 /* SDMA trap event */ in sdma_v5_2_sw_init()
1331 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_sw_init()
1334 &adev->sdma.trap_irq); in sdma_v5_2_sw_init()
1339 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_sw_init()
1340 ring = &adev->sdma.instance[i].ring; in sdma_v5_2_sw_init()
1352 sprintf(ring->name, "sdma%d", i); in sdma_v5_2_sw_init()
1353 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v5_2_sw_init()
1360 adev->sdma.supported_reset = in sdma_v5_2_sw_init()
1361 amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring); in sdma_v5_2_sw_init()
1367 if (adev->sdma.instance[0].fw_version >= 76) in sdma_v5_2_sw_init()
1368 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_2_sw_init()
1371 if (adev->sdma.instance[0].fw_version >= 34) in sdma_v5_2_sw_init()
1372 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v5_2_sw_init()
1378 /* Allocate memory for SDMA IP Dump buffer */ in sdma_v5_2_sw_init()
1379 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v5_2_sw_init()
1381 adev->sdma.ip_dump = ptr; in sdma_v5_2_sw_init()
1383 DRM_ERROR("Failed to allocated memory for SDMA IP Dump\n"); in sdma_v5_2_sw_init()
1397 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v5_2_sw_fini()
1398 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v5_2_sw_fini()
1403 kfree(adev->sdma.ip_dump); in sdma_v5_2_sw_fini()
1443 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_is_idle()
1481 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_reset_queue()
1482 if (ring == &adev->sdma.instance[i].ring) in sdma_v5_2_reset_queue()
1486 if (i == adev->sdma.num_instances) { in sdma_v5_2_reset_queue()
1487 DRM_ERROR("sdma instance not found\n"); in sdma_v5_2_reset_queue()
1519 DRM_ERROR("cannot soft reset as sdma not idle\n"); in sdma_v5_2_reset_queue()
1631 DRM_DEBUG("IH: SDMA trap\n"); in sdma_v5_2_process_trap_irq()
1652 amdgpu_fence_process(&adev->sdma.instance[0].ring); in sdma_v5_2_process_trap_irq()
1668 amdgpu_fence_process(&adev->sdma.instance[1].ring); in sdma_v5_2_process_trap_irq()
1684 amdgpu_fence_process(&adev->sdma.instance[2].ring); in sdma_v5_2_process_trap_irq()
1700 amdgpu_fence_process(&adev->sdma.instance[3].ring); in sdma_v5_2_process_trap_irq()
1729 if (adev->sdma.instance[i].fw_version < 70) in sdma_v5_2_firmware_mgcg_support()
1733 if (adev->sdma.instance[i].fw_version < 47) in sdma_v5_2_firmware_mgcg_support()
1737 if (adev->sdma.instance[i].fw_version < 9) in sdma_v5_2_firmware_mgcg_support()
1754 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_update_medium_grain_clock_gating()
1760 /* Enable sdma clock gating */ in sdma_v5_2_update_medium_grain_clock_gating()
1771 /* Disable sdma clock gating */ in sdma_v5_2_update_medium_grain_clock_gating()
1791 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_update_medium_grain_light_sleep()
1792 if (adev->sdma.instance[i].fw_version < 70 && in sdma_v5_2_update_medium_grain_light_sleep()
1798 /* Enable sdma mem light sleep */ in sdma_v5_2_update_medium_grain_light_sleep()
1805 /* Disable sdma mem light sleep */ in sdma_v5_2_update_medium_grain_light_sleep()
1873 /* SDMA 5.2.3 (RMB) FW doesn't seem to properly in sdma_v5_2_ring_begin_use()
1875 * hangs in SDMA. Disallow GFXOFF while SDMA is active. in sdma_v5_2_ring_begin_use()
1878 * this GFXOFF will be disallowed anyway when SDMA is in sdma_v5_2_ring_begin_use()
1881 * to update the wptr because sometimes SDMA seems to miss in sdma_v5_2_ring_begin_use()
1892 /* SDMA 5.2.3 (RMB) FW doesn't seem to properly in sdma_v5_2_ring_end_use()
1894 * hangs in SDMA. Allow GFXOFF when SDMA is complete. in sdma_v5_2_ring_end_use()
1906 if (!adev->sdma.ip_dump) in sdma_v5_2_print_ip_state()
1909 drm_printf(p, "num_instances:%d\n", adev->sdma.num_instances); in sdma_v5_2_print_ip_state()
1910 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_print_ip_state()
1916 adev->sdma.ip_dump[instance_offset + j]); in sdma_v5_2_print_ip_state()
1927 if (!adev->sdma.ip_dump) in sdma_v5_2_dump_ip_state()
1931 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_dump_ip_state()
1934 adev->sdma.ip_dump[instance_offset + j] = in sdma_v5_2_dump_ip_state()
2003 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_set_ring_funcs()
2004 adev->sdma.instance[i].ring.funcs = &sdma_v5_2_ring_funcs; in sdma_v5_2_set_ring_funcs()
2005 adev->sdma.instance[i].ring.me = i; in sdma_v5_2_set_ring_funcs()
2020 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + in sdma_v5_2_set_irq_funcs()
2021 adev->sdma.num_instances; in sdma_v5_2_set_irq_funcs()
2022 adev->sdma.trap_irq.funcs = &sdma_v5_2_trap_irq_funcs; in sdma_v5_2_set_irq_funcs()
2023 adev->sdma.illegal_inst_irq.funcs = &sdma_v5_2_illegal_inst_irq_funcs; in sdma_v5_2_set_irq_funcs()
2027 * sdma_v5_2_emit_copy_buffer - copy buffer using the sDMA engine
2057 * sdma_v5_2_emit_fill_buffer - fill buffer using the sDMA engine
2092 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v5_2_set_buffer_funcs()
2109 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_set_vm_pte_funcs()
2111 &adev->sdma.instance[i].ring.sched; in sdma_v5_2_set_vm_pte_funcs()
2113 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v5_2_set_vm_pte_funcs()