Lines Matching refs:wptr

311 	ret = ring->wptr & ring->buf_mask;  in sdma_v5_0_ring_init_cond_exec()
346 u64 wptr; in sdma_v5_0_ring_get_wptr() local
350 wptr = READ_ONCE(*((u64 *)ring->wptr_cpu_addr)); in sdma_v5_0_ring_get_wptr()
351 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); in sdma_v5_0_ring_get_wptr()
353 wptr = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)); in sdma_v5_0_ring_get_wptr()
354 wptr = wptr << 32; in sdma_v5_0_ring_get_wptr()
355 wptr |= RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)); in sdma_v5_0_ring_get_wptr()
356 DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr); in sdma_v5_0_ring_get_wptr()
359 return wptr >> 2; in sdma_v5_0_ring_get_wptr()
387 ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
388 *wptr_saved = ring->wptr << 2; in sdma_v5_0_ring_set_wptr()
390 WDOORBELL64(aggregated_db_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
392 ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
393 WDOORBELL64(ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
396 ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
397 WDOORBELL64(ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
401 ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
410 lower_32_bits(ring->wptr << 2), in sdma_v5_0_ring_set_wptr()
411 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
414 ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
416 ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
417 WDOORBELL64(ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
423 lower_32_bits(ring->wptr << 2), in sdma_v5_0_ring_set_wptr()
425 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
428 lower_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
431 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
475 sdma_v5_0_ring_insert_nop(ring, (2 - lower_32_bits(ring->wptr)) & 7); in sdma_v5_0_ring_emit_ib()
746 …C15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR), lower_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume_instance()
747 …_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), upper_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume_instance()
748 …C15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume_instance()
749 …_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume_instance()
784 ring->wptr = 0; in sdma_v5_0_gfx_resume_instance()
791 lower_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume_instance()
793 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume_instance()