808 				   struct amdgpu_ib *ib,  in sdma_v4_0_ring_emit_ib()  argument
819 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v4_0_ring_emit_ib()
820 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v4_0_ring_emit_ib()
821 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v4_0_ring_emit_ib()
1518 	struct amdgpu_ib ib;  in sdma_v4_0_ring_test_ib()  local
1532 	memset(&ib, 0, sizeof(ib));  in sdma_v4_0_ring_test_ib()
1534 					AMDGPU_IB_POOL_DIRECT, &ib);  in sdma_v4_0_ring_test_ib()
1538 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v4_0_ring_test_ib()
1540 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v4_0_ring_test_ib()
1541 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v4_0_ring_test_ib()
1542 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0);  in sdma_v4_0_ring_test_ib()
1543 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v4_0_ring_test_ib()
1544 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1545 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1546 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1547 	ib.length_dw = 8;  in sdma_v4_0_ring_test_ib()
1549 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v4_0_ring_test_ib()
1567 	amdgpu_ib_free(&ib, NULL);  in sdma_v4_0_ring_test_ib()
1585 static void sdma_v4_0_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v4_0_vm_copy_pte()  argument
1591 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v4_0_vm_copy_pte()
1593 	ib->ptr[ib->length_dw++] = bytes - 1;  in sdma_v4_0_vm_copy_pte()
1594 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v4_0_vm_copy_pte()
1595 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v4_0_vm_copy_pte()
1596 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v4_0_vm_copy_pte()
1597 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v4_0_vm_copy_pte()
1598 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_copy_pte()
1613 static void sdma_v4_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v4_0_vm_write_pte()  argument
1619 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v4_0_vm_write_pte()
1621 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v4_0_vm_write_pte()
1622 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_write_pte()
1623 	ib->ptr[ib->length_dw++] = ndw - 1;  in sdma_v4_0_vm_write_pte()
1625 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v4_0_vm_write_pte()
1626 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v4_0_vm_write_pte()
1643 static void sdma_v4_0_vm_set_pte_pde(struct amdgpu_ib *ib,  in sdma_v4_0_vm_set_pte_pde()  argument
1649 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE);  in sdma_v4_0_vm_set_pte_pde()
1650 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v4_0_vm_set_pte_pde()
1651 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_set_pte_pde()
1652 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v4_0_vm_set_pte_pde()
1653 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v4_0_vm_set_pte_pde()
1654 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v4_0_vm_set_pte_pde()
1655 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v4_0_vm_set_pte_pde()
1656 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v4_0_vm_set_pte_pde()
1657 	ib->ptr[ib->length_dw++] = 0;  in sdma_v4_0_vm_set_pte_pde()
1658 	ib->ptr[ib->length_dw++] = count - 1; /* number of entries */  in sdma_v4_0_vm_set_pte_pde()
1667 static void sdma_v4_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v4_0_ring_pad_ib()  argument
1673 	pad_count = (-ib->length_dw) & 7;  in sdma_v4_0_ring_pad_ib()
1676 			ib->ptr[ib->length_dw++] =  in sdma_v4_0_ring_pad_ib()
1680 			ib->ptr[ib->length_dw++] =  in sdma_v4_0_ring_pad_ib()
2567 static void sdma_v4_0_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v4_0_emit_copy_buffer()  argument
2573 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v4_0_emit_copy_buffer()
2576 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v4_0_emit_copy_buffer()
2577 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v4_0_emit_copy_buffer()
2578 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v4_0_emit_copy_buffer()
2579 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v4_0_emit_copy_buffer()
2580 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v4_0_emit_copy_buffer()
2581 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v4_0_emit_copy_buffer()
2594 static void sdma_v4_0_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v4_0_emit_fill_buffer()  argument
2599 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v4_0_emit_fill_buffer()
2600 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v4_0_emit_fill_buffer()
2601 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v4_0_emit_fill_buffer()
2602 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v4_0_emit_fill_buffer()
2603 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v4_0_emit_fill_buffer()