78  * sDMA - System DMA
86  * (ring buffer, IBs, etc.), but sDMA has it's own
88  * used by the CP. sDMA supports copying data, writing
114 	for (i = 0; i < adev->sdma.num_instances; i++)  in sdma_v2_4_free_microcode()
115 		amdgpu_ucode_release(&adev->sdma.instance[i].fw);  in sdma_v2_4_free_microcode()
145 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_init_microcode()
147 			err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,  in sdma_v2_4_init_microcode()
151 			err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw,  in sdma_v2_4_init_microcode()
156 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data;  in sdma_v2_4_init_microcode()
157 		adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);  in sdma_v2_4_init_microcode()
158 		adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);  in sdma_v2_4_init_microcode()
159 		if (adev->sdma.instance[i].feature_version >= 20)  in sdma_v2_4_init_microcode()
160 			adev->sdma.instance[i].burst_nop = true;  in sdma_v2_4_init_microcode()
165 			info->fw = adev->sdma.instance[i].fw;  in sdma_v2_4_init_microcode()
176 		for (i = 0; i < adev->sdma.num_instances; i++)  in sdma_v2_4_init_microcode()
177 			amdgpu_ucode_release(&adev->sdma.instance[i].fw);  in sdma_v2_4_init_microcode()
226 	struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring);  in sdma_v2_4_ring_insert_nop()  local
230 		if (sdma && sdma->burst_nop && (i == 0))  in sdma_v2_4_ring_insert_nop()
343 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_gfx_stop()
383 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_enable()
408 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_gfx_resume()
409 		ring = &adev->sdma.instance[i].ring;  in sdma_v2_4_gfx_resume()
414 			/* SDMA GFX */  in sdma_v2_4_gfx_resume()
471 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_gfx_resume()
472 		ring = &adev->sdma.instance[i].ring;  in sdma_v2_4_gfx_resume()
651  * Update PTEs by copying them from the GART using sDMA (CIK).
678  * Update PTEs by writing them manually using sDMA (CIK).
699  * sdma_v2_4_vm_set_pte_pde - update the page tables using sDMA
708  * Update the page tables using sDMA (CIK).
736 	struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring);  in sdma_v2_4_ring_pad_ib()  local
742 		if (sdma && sdma->burst_nop && (i == 0))  in sdma_v2_4_ring_pad_ib()
777  * sdma_v2_4_ring_emit_vm_flush - cik vm flush using sDMA
784  * using sDMA (VI).
817 	adev->sdma.num_instances = SDMA_MAX_INSTANCE;  in sdma_v2_4_early_init()
837 	/* SDMA trap event */  in sdma_v2_4_sw_init()
839 			      &adev->sdma.trap_irq);  in sdma_v2_4_sw_init()
843 	/* SDMA Privileged inst */  in sdma_v2_4_sw_init()
845 			      &adev->sdma.illegal_inst_irq);  in sdma_v2_4_sw_init()
849 	/* SDMA Privileged inst */  in sdma_v2_4_sw_init()
851 			      &adev->sdma.illegal_inst_irq);  in sdma_v2_4_sw_init()
855 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_sw_init()
856 		ring = &adev->sdma.instance[i].ring;  in sdma_v2_4_sw_init()
859 		sprintf(ring->name, "sdma%d", i);  in sdma_v2_4_sw_init()
860 		r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq,  in sdma_v2_4_sw_init()
876 	for (i = 0; i < adev->sdma.num_instances; i++)  in sdma_v2_4_sw_fini()
877 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);  in sdma_v2_4_sw_fini()
1038 	DRM_DEBUG("IH: SDMA trap\n");  in sdma_v2_4_process_trap_irq()
1043 			amdgpu_fence_process(&adev->sdma.instance[0].ring);  in sdma_v2_4_process_trap_irq()
1056 			amdgpu_fence_process(&adev->sdma.instance[1].ring);  in sdma_v2_4_process_trap_irq()
1076 	DRM_ERROR("Illegal instruction in SDMA command stream\n");  in sdma_v2_4_process_illegal_inst_irq()
1081 		drm_sched_fault(&adev->sdma.instance[instance_id].ring.sched);  in sdma_v2_4_process_illegal_inst_irq()
1146 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_set_ring_funcs()
1147 		adev->sdma.instance[i].ring.funcs = &sdma_v2_4_ring_funcs;  in sdma_v2_4_set_ring_funcs()
1148 		adev->sdma.instance[i].ring.me = i;  in sdma_v2_4_set_ring_funcs()
1163 	adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;  in sdma_v2_4_set_irq_funcs()
1164 	adev->sdma.trap_irq.funcs = &sdma_v2_4_trap_irq_funcs;  in sdma_v2_4_set_irq_funcs()
1165 	adev->sdma.illegal_inst_irq.funcs = &sdma_v2_4_illegal_inst_irq_funcs;  in sdma_v2_4_set_irq_funcs()
1169  * sdma_v2_4_emit_copy_buffer - copy buffer using the sDMA engine
1198  * sdma_v2_4_emit_fill_buffer - fill buffer using the sDMA engine
1232 	adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring;  in sdma_v2_4_set_buffer_funcs()
1248 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v2_4_set_vm_pte_funcs()
1250 			&adev->sdma.instance[i].ring.sched;  in sdma_v2_4_set_vm_pte_funcs()
1252 	adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances;  in sdma_v2_4_set_vm_pte_funcs()