1179 	struct v12_1_mes_mqd *mqd = ring->mqd_ptr;  in mes_v12_1_mqd_init()  local
1183 	mqd->header = 0xC0310800;  in mes_v12_1_mqd_init()
1184 	mqd->compute_pipelinestat_enable = 0x00000001;  in mes_v12_1_mqd_init()
1185 	mqd->compute_static_thread_mgmt_se0 = 0xffffffff;  in mes_v12_1_mqd_init()
1186 	mqd->compute_static_thread_mgmt_se1 = 0xffffffff;  in mes_v12_1_mqd_init()
1187 	mqd->compute_static_thread_mgmt_se2 = 0xffffffff;  in mes_v12_1_mqd_init()
1188 	mqd->compute_static_thread_mgmt_se3 = 0xffffffff;  in mes_v12_1_mqd_init()
1189 	mqd->compute_misc_reserved = 0x00000007;  in mes_v12_1_mqd_init()
1198 	mqd->cp_hqd_eop_base_addr_lo = lower_32_bits(eop_base_addr);  in mes_v12_1_mqd_init()
1199 	mqd->cp_hqd_eop_base_addr_hi = upper_32_bits(eop_base_addr);  in mes_v12_1_mqd_init()
1200 	mqd->cp_hqd_eop_control = tmp;  in mes_v12_1_mqd_init()
1204 	mqd->cp_hqd_pq_rptr = 0;  in mes_v12_1_mqd_init()
1205 	mqd->cp_hqd_pq_wptr_lo = 0;  in mes_v12_1_mqd_init()
1206 	mqd->cp_hqd_pq_wptr_hi = 0;  in mes_v12_1_mqd_init()
1209 	mqd->cp_mqd_base_addr_lo = ring->mqd_gpu_addr & 0xfffffffc;  in mes_v12_1_mqd_init()
1210 	mqd->cp_mqd_base_addr_hi = upper_32_bits(ring->mqd_gpu_addr);  in mes_v12_1_mqd_init()
1215 	mqd->cp_mqd_control = tmp;  in mes_v12_1_mqd_init()
1219 	mqd->cp_hqd_pq_base_lo = lower_32_bits(hqd_gpu_addr);  in mes_v12_1_mqd_init()
1220 	mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr);  in mes_v12_1_mqd_init()
1224 	mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc;  in mes_v12_1_mqd_init()
1225 	mqd->cp_hqd_pq_rptr_report_addr_hi =  in mes_v12_1_mqd_init()
1230 	mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8;  in mes_v12_1_mqd_init()
1231 	mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff;  in mes_v12_1_mqd_init()
1244 	mqd->cp_hqd_pq_control = tmp;  in mes_v12_1_mqd_init()
1261 	mqd->cp_hqd_pq_doorbell_control = tmp;  in mes_v12_1_mqd_init()
1263 	mqd->cp_hqd_vmid = 0;  in mes_v12_1_mqd_init()
1265 	mqd->cp_hqd_active = 1;  in mes_v12_1_mqd_init()
1270 	mqd->cp_hqd_persistent_state = tmp;  in mes_v12_1_mqd_init()
1272 	mqd->cp_hqd_ib_control = regCP_HQD_IB_CONTROL_MES_12_1_DEFAULT;  in mes_v12_1_mqd_init()
1273 	mqd->cp_hqd_iq_timer = regCP_HQD_IQ_TIMER_DEFAULT;  in mes_v12_1_mqd_init()
1274 	mqd->cp_hqd_quantum = regCP_HQD_QUANTUM_DEFAULT;  in mes_v12_1_mqd_init()
1281 	mqd->cp_hqd_gfx_control = BIT(15);  in mes_v12_1_mqd_init()
1289 	struct v12_1_mes_mqd *mqd = ring->mqd_ptr;  in mes_v12_1_queue_init_register()  local
1308 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo);  in mes_v12_1_queue_init_register()
1309 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi);  in mes_v12_1_queue_init_register()
1317 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo);  in mes_v12_1_queue_init_register()
1318 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi);  in mes_v12_1_queue_init_register()
1322 		     mqd->cp_hqd_pq_rptr_report_addr_lo);  in mes_v12_1_queue_init_register()
1324 		     mqd->cp_hqd_pq_rptr_report_addr_hi);  in mes_v12_1_queue_init_register()
1327 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control);  in mes_v12_1_queue_init_register()
1331 		     mqd->cp_hqd_pq_wptr_poll_addr_lo);  in mes_v12_1_queue_init_register()
1333 		     mqd->cp_hqd_pq_wptr_poll_addr_hi);  in mes_v12_1_queue_init_register()
1337 		     mqd->cp_hqd_pq_doorbell_control);  in mes_v12_1_queue_init_register()
1340 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state);  in mes_v12_1_queue_init_register()
1343 	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_ACTIVE, mqd->cp_hqd_active);  in mes_v12_1_queue_init_register()