Lines Matching defs:queue_input

120 	struct mes_add_queue_input queue_input;
124 	memset(&queue_input, 0x0, sizeof(struct mes_add_queue_input));
126 	queue_input.process_va_start = 0;
127 	queue_input.process_va_end = adev->vm_manager.max_pfn - 1;
130 	queue_input.process_quantum = 100000;
131 	queue_input.gang_quantum = 10000;
132 	queue_input.paging = false;
134 	queue_input.process_context_addr = uq_mgr->proc_ctx_obj.gpu_addr;
135 	queue_input.gang_context_addr = ctx->gpu_addr;
136 	queue_input.inprocess_gang_priority = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;
137 	queue_input.gang_global_priority_level = convert_to_mes_priority(queue->priority);
139 	queue_input.process_id = queue->vm->pasid;
140 	queue_input.queue_type = queue->queue_type;
141 	queue_input.mqd_addr = queue->mqd.gpu_addr;
142 	queue_input.wptr_addr = userq_props->wptr_gpu_addr;
143 	queue_input.queue_size = userq_props->queue_size >> 2;
144 	queue_input.doorbell_offset = userq_props->doorbell_index;
145 	queue_input.page_table_base_addr = amdgpu_gmc_pd_addr(queue->vm->root.bo);
146 	queue_input.wptr_mc_addr = queue->wptr_obj.gpu_addr;
163 		queue_input.process_context_array_index = uq_mgr->proc_ctx_array_index;
164 		queue_input.gang_context_array_index = queue->gang_ctx_array_index;
167 	r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);
182 	struct mes_remove_queue_input queue_input;
187 	memset(&queue_input, 0x0, sizeof(struct mes_remove_queue_input));
188 	queue_input.gang_context_array_index = queue->gang_ctx_array_index;
189 	queue_input.doorbell_offset = queue->doorbell_index;
190 	queue_input.gang_context_addr = ctx->gpu_addr;
191 	queue_input.queue_type = queue->queue_type;
194 	r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input);
207 	struct mes_reset_queue_input queue_input;
211 	memset(&queue_input, 0x0, sizeof(struct mes_reset_queue_input));
212 	queue_input.doorbell_offset = queue->doorbell_index;
213 	queue_input.queue_type = queue->queue_type;
216 	r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);
535 	struct mes_suspend_gang_input queue_input;
553 	memset(&queue_input, 0x0, sizeof(struct mes_suspend_gang_input));
554 	queue_input.gang_context_addr = ctx->gpu_addr;
555 	queue_input.suspend_fence_addr = fence_gpu_addr;
556 	queue_input.suspend_fence_value = 1;
558 	r = adev->mes.funcs->suspend_gang(&adev->mes, &queue_input);
581 	struct mes_resume_gang_input queue_input;
590 	memset(&queue_input, 0x0, sizeof(struct mes_resume_gang_input));
591 	queue_input.gang_context_addr = ctx->gpu_addr;
594 	r = adev->mes.funcs->resume_gang(&adev->mes, &queue_input);