531 	kfree(adev->gfx.rlc.register_list_format);  in gfx_v12_0_free_microcode()
654 	if (adev->gfx.rlc.cs_data == NULL)  in gfx_v12_0_get_csb_buffer()
661 	for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) {  in gfx_v12_0_get_csb_buffer()
681 	amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj,  in gfx_v12_0_rlc_fini()
682 			&adev->gfx.rlc.clear_state_gpu_addr,  in gfx_v12_0_rlc_fini()
683 			(void **)&adev->gfx.rlc.cs_ptr);  in gfx_v12_0_rlc_fini()
686 	amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj,  in gfx_v12_0_rlc_fini()
687 			&adev->gfx.rlc.cp_table_gpu_addr,  in gfx_v12_0_rlc_fini()
688 			(void **)&adev->gfx.rlc.cp_table_ptr);  in gfx_v12_0_rlc_fini()
695 	reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[0];  in gfx_v12_0_init_rlcg_reg_access_ctrl()
703 	adev->gfx.rlc.rlcg_reg_access_supported = true;  in gfx_v12_0_init_rlcg_reg_access_ctrl()
711 	adev->gfx.rlc.cs_data = gfx12_cs_data;  in gfx_v12_0_rlc_init()
713 	cs_data = adev->gfx.rlc.cs_data;  in gfx_v12_0_rlc_init()
723 	if (adev->gfx.rlc.funcs->update_spm_vmid)  in gfx_v12_0_rlc_init()
724 		adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf);  in gfx_v12_0_rlc_init()
1017 				      &adev->gfx.rlc.rlc_autoload_bo,  in gfx_v12_0_rlc_autoload_buffer_init()
1018 				      &adev->gfx.rlc.rlc_autoload_gpu_addr,  in gfx_v12_0_rlc_autoload_buffer_init()
1019 				      (void **)&adev->gfx.rlc.rlc_autoload_ptr);  in gfx_v12_0_rlc_autoload_buffer_init()
1036 	char *ptr = adev->gfx.rlc.rlc_autoload_ptr;  in gfx_v12_0_rlc_backdoor_autoload_copy_ucode()
1250 	gpu_addr = adev->gfx.rlc.rlc_autoload_gpu_addr + rlc_g_offset - adev->gmc.vram_start;  in gfx_v12_0_rlc_backdoor_autoload_enable()
1490 	amdgpu_bo_free_kernel(&adev->gfx.rlc.rlc_autoload_bo,  in gfx_v12_0_rlc_autoload_buffer_fini()
1491 			&adev->gfx.rlc.rlc_autoload_gpu_addr,  in gfx_v12_0_rlc_autoload_buffer_fini()
1492 			(void **)&adev->gfx.rlc.rlc_autoload_ptr);  in gfx_v12_0_rlc_autoload_buffer_fini()
1766 	adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr);  in gfx_v12_0_init_csb()
1769 			adev->gfx.rlc.clear_state_gpu_addr >> 32);  in gfx_v12_0_init_csb()
1771 			adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc);  in gfx_v12_0_init_csb()
1772 	WREG32_SOC15(GC, 0, regRLC_CSIB_LENGTH, adev->gfx.rlc.clear_state_size);  in gfx_v12_0_init_csb()
1945 		adev->gfx.rlc.funcs->stop(adev);  in gfx_v12_0_rlc_resume()
1962 		adev->gfx.rlc.funcs->start(adev);  in gfx_v12_0_rlc_resume()
5447 	adev->gfx.rlc.funcs = &gfx_v12_0_rlc_funcs;  in gfx_v12_0_set_rlc_funcs()