736 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);  in gfx_v12_0_mec_fini()
737 	amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL);  in gfx_v12_0_mec_fini()
738 	amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_data_obj, NULL, NULL);  in gfx_v12_0_mec_fini()
763 					      &adev->gfx.mec.hpd_eop_obj,  in gfx_v12_0_mec_init()
764 					      &adev->gfx.mec.hpd_eop_gpu_addr,  in gfx_v12_0_mec_init()
774 		amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);  in gfx_v12_0_mec_init()
775 		amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);  in gfx_v12_0_mec_init()
930 				       int mec, int pipe, int queue)  in gfx_v12_0_compute_ring_init()  argument
940 	ring->me = mec + 1;  in gfx_v12_0_compute_ring_init()
947 	ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr  in gfx_v12_0_compute_ring_init()
953 		+ ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)  in gfx_v12_0_compute_ring_init()
1302 	inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec *  in gfx_v12_0_alloc_ip_dump()
1303 		adev->gfx.mec.num_queue_per_pipe;  in gfx_v12_0_alloc_ip_dump()
1340 		adev->gfx.mec.num_mec = 2;  in gfx_v12_0_sw_init()
1341 		adev->gfx.mec.num_pipe_per_mec = 2;  in gfx_v12_0_sw_init()
1342 		adev->gfx.mec.num_queue_per_pipe = 4;  in gfx_v12_0_sw_init()
1348 		adev->gfx.mec.num_mec = 1;  in gfx_v12_0_sw_init()
1349 		adev->gfx.mec.num_pipe_per_mec = 4;  in gfx_v12_0_sw_init()
1350 		adev->gfx.mec.num_queue_per_pipe = 8;  in gfx_v12_0_sw_init()
1369 	num_compute_rings = (adev->gfx.mec.num_pipe_per_mec *  in gfx_v12_0_sw_init()
1370 			     adev->gfx.mec.num_queue_per_pipe) / 2;  in gfx_v12_0_sw_init()
1436 	for (i = 0; i < adev->gfx.mec.num_mec; ++i) {  in gfx_v12_0_sw_init()
1437 		for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {  in gfx_v12_0_sw_init()
1438 			for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {  in gfx_v12_0_sw_init()
2187 	for (pipe_id = 0; pipe_id < adev->gfx.mec.num_pipe_per_mec; pipe_id++) {  in gfx_v12_0_set_mec_ucode_start_addr()
2745 				      &adev->gfx.mec.mec_fw_obj,  in gfx_v12_0_cp_compute_load_microcode_rs64()
2746 				      &adev->gfx.mec.mec_fw_gpu_addr,  in gfx_v12_0_cp_compute_load_microcode_rs64()
2756 				      adev->gfx.mec.num_pipe_per_mec,  in gfx_v12_0_cp_compute_load_microcode_rs64()
2758 				      &adev->gfx.mec.mec_fw_data_obj,  in gfx_v12_0_cp_compute_load_microcode_rs64()
2759 				      &adev->gfx.mec.mec_fw_data_gpu_addr,  in gfx_v12_0_cp_compute_load_microcode_rs64()
2768 	for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) {  in gfx_v12_0_cp_compute_load_microcode_rs64()
2772 	amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj);  in gfx_v12_0_cp_compute_load_microcode_rs64()
2773 	amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_data_obj);  in gfx_v12_0_cp_compute_load_microcode_rs64()
2774 	amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);  in gfx_v12_0_cp_compute_load_microcode_rs64()
2775 	amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_data_obj);  in gfx_v12_0_cp_compute_load_microcode_rs64()
2789 	for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) {  in gfx_v12_0_cp_compute_load_microcode_rs64()
2793 			     lower_32_bits(adev->gfx.mec.mec_fw_data_gpu_addr +  in gfx_v12_0_cp_compute_load_microcode_rs64()
2796 			     upper_32_bits(adev->gfx.mec.mec_fw_data_gpu_addr +  in gfx_v12_0_cp_compute_load_microcode_rs64()
2800 			     lower_32_bits(adev->gfx.mec.mec_fw_gpu_addr));  in gfx_v12_0_cp_compute_load_microcode_rs64()
2802 			     upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr));  in gfx_v12_0_cp_compute_load_microcode_rs64()
3279 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v12_0_kiq_init_queue()
3280 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));  in gfx_v12_0_kiq_init_queue()
3302 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v12_0_kiq_init_queue()
3303 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));  in gfx_v12_0_kiq_init_queue()
3323 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v12_0_kcq_init_queue()
3324 			memcpy_fromio(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));  in gfx_v12_0_kcq_init_queue()
3327 		if (adev->gfx.mec.mqd_backup[mqd_idx])  in gfx_v12_0_kcq_init_queue()
3328 			memcpy_toio(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));  in gfx_v12_0_kcq_init_queue()
4868 		for (i = 0; i < adev->gfx.mec.num_mec; i++) {  in gfx_v12_0_set_priv_reg_fault_state()
4869 			for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) {  in gfx_v12_0_set_priv_reg_fault_state()
4914 		for (i = 0; i < adev->gfx.mec.num_mec; i++) {  in gfx_v12_0_set_bad_op_fault_state()
4915 			for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) {  in gfx_v12_0_set_bad_op_fault_state()
5094 		   adev->gfx.mec.num_mec,  in gfx_v12_ip_print()
5095 		   adev->gfx.mec.num_pipe_per_mec,  in gfx_v12_ip_print()
5096 		   adev->gfx.mec.num_queue_per_pipe);  in gfx_v12_ip_print()
5098 	for (i = 0; i < adev->gfx.mec.num_mec; i++) {  in gfx_v12_ip_print()
5099 		for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) {  in gfx_v12_ip_print()
5100 			for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) {  in gfx_v12_ip_print()
5159 	for (i = 0; i < adev->gfx.mec.num_mec; i++) {  in gfx_v12_ip_dump()
5160 		for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) {  in gfx_v12_ip_dump()
5161 			for (k = 0; k < adev->gfx.mec.num_queue_per_pipe; k++) {  in gfx_v12_ip_dump()