580 	a.full = dfixed_const(1000);  in dce_v6_0_dram_bandwidth()
581 	yclk.full = dfixed_const(wm->yclk);  in dce_v6_0_dram_bandwidth()
582 	yclk.full = dfixed_div(yclk, a);  in dce_v6_0_dram_bandwidth()
583 	dram_channels.full = dfixed_const(wm->dram_channels * 4);  in dce_v6_0_dram_bandwidth()
584 	a.full = dfixed_const(10);  in dce_v6_0_dram_bandwidth()
585 	dram_efficiency.full = dfixed_const(7);  in dce_v6_0_dram_bandwidth()
586 	dram_efficiency.full = dfixed_div(dram_efficiency, a);  in dce_v6_0_dram_bandwidth()
587 	bandwidth.full = dfixed_mul(dram_channels, yclk);  in dce_v6_0_dram_bandwidth()
588 	bandwidth.full = dfixed_mul(bandwidth, dram_efficiency);  in dce_v6_0_dram_bandwidth()
609 	a.full = dfixed_const(1000);  in dce_v6_0_dram_bandwidth_for_display()
610 	yclk.full = dfixed_const(wm->yclk);  in dce_v6_0_dram_bandwidth_for_display()
611 	yclk.full = dfixed_div(yclk, a);  in dce_v6_0_dram_bandwidth_for_display()
612 	dram_channels.full = dfixed_const(wm->dram_channels * 4);  in dce_v6_0_dram_bandwidth_for_display()
613 	a.full = dfixed_const(10);  in dce_v6_0_dram_bandwidth_for_display()
614 	disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */  in dce_v6_0_dram_bandwidth_for_display()
615 	disp_dram_allocation.full = dfixed_div(disp_dram_allocation, a);  in dce_v6_0_dram_bandwidth_for_display()
616 	bandwidth.full = dfixed_mul(dram_channels, yclk);  in dce_v6_0_dram_bandwidth_for_display()
617 	bandwidth.full = dfixed_mul(bandwidth, disp_dram_allocation);  in dce_v6_0_dram_bandwidth_for_display()
638 	a.full = dfixed_const(1000);  in dce_v6_0_data_return_bandwidth()
639 	sclk.full = dfixed_const(wm->sclk);  in dce_v6_0_data_return_bandwidth()
640 	sclk.full = dfixed_div(sclk, a);  in dce_v6_0_data_return_bandwidth()
641 	a.full = dfixed_const(10);  in dce_v6_0_data_return_bandwidth()
642 	return_efficiency.full = dfixed_const(8);  in dce_v6_0_data_return_bandwidth()
643 	return_efficiency.full = dfixed_div(return_efficiency, a);  in dce_v6_0_data_return_bandwidth()
644 	a.full = dfixed_const(32);  in dce_v6_0_data_return_bandwidth()
645 	bandwidth.full = dfixed_mul(a, sclk);  in dce_v6_0_data_return_bandwidth()
646 	bandwidth.full = dfixed_mul(bandwidth, return_efficiency);  in dce_v6_0_data_return_bandwidth()
667 	a.full = dfixed_const(1000);  in dce_v6_0_dmif_request_bandwidth()
668 	disp_clk.full = dfixed_const(wm->disp_clk);  in dce_v6_0_dmif_request_bandwidth()
669 	disp_clk.full = dfixed_div(disp_clk, a);  in dce_v6_0_dmif_request_bandwidth()
670 	a.full = dfixed_const(32);  in dce_v6_0_dmif_request_bandwidth()
671 	b.full = dfixed_mul(a, disp_clk);  in dce_v6_0_dmif_request_bandwidth()
673 	a.full = dfixed_const(10);  in dce_v6_0_dmif_request_bandwidth()
674 	disp_clk_request_efficiency.full = dfixed_const(8);  in dce_v6_0_dmif_request_bandwidth()
675 	disp_clk_request_efficiency.full = dfixed_div(disp_clk_request_efficiency, a);  in dce_v6_0_dmif_request_bandwidth()
677 	bandwidth.full = dfixed_mul(b, disp_clk_request_efficiency);  in dce_v6_0_dmif_request_bandwidth()
722 	a.full = dfixed_const(1000);  in dce_v6_0_average_bandwidth()
723 	line_time.full = dfixed_const(wm->active_time + wm->blank_time);  in dce_v6_0_average_bandwidth()
724 	line_time.full = dfixed_div(line_time, a);  in dce_v6_0_average_bandwidth()
725 	bpp.full = dfixed_const(wm->bytes_per_pixel);  in dce_v6_0_average_bandwidth()
726 	src_width.full = dfixed_const(wm->src_width);  in dce_v6_0_average_bandwidth()
727 	bandwidth.full = dfixed_mul(src_width, bpp);  in dce_v6_0_average_bandwidth()
728 	bandwidth.full = dfixed_mul(bandwidth, wm->vsc);  in dce_v6_0_average_bandwidth()
729 	bandwidth.full = dfixed_div(bandwidth, line_time);  in dce_v6_0_average_bandwidth()
761 	a.full = dfixed_const(2);  in dce_v6_0_latency_watermark()
762 	b.full = dfixed_const(1);  in dce_v6_0_latency_watermark()
763 	if ((wm->vsc.full > a.full) ||  in dce_v6_0_latency_watermark()
764 	    ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) ||  in dce_v6_0_latency_watermark()
766 	    ((wm->vsc.full >= a.full) && wm->interlaced))  in dce_v6_0_latency_watermark()
771 	a.full = dfixed_const(available_bandwidth);  in dce_v6_0_latency_watermark()
772 	b.full = dfixed_const(wm->num_heads);  in dce_v6_0_latency_watermark()
773 	a.full = dfixed_div(a, b);  in dce_v6_0_latency_watermark()
779 	a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel);  in dce_v6_0_latency_watermark()
780 	b.full = dfixed_const(1000);  in dce_v6_0_latency_watermark()
781 	c.full = dfixed_const(lb_fill_bw);  in dce_v6_0_latency_watermark()
782 	b.full = dfixed_div(c, b);  in dce_v6_0_latency_watermark()
783 	a.full = dfixed_div(a, b);  in dce_v6_0_latency_watermark()
850 	a.full = dfixed_const(1);  in dce_v6_0_check_latency_hiding()
851 	if (wm->vsc.full > a.full)  in dce_v6_0_check_latency_hiding()
984 		a.full = dfixed_const(1000);  in dce_v6_0_program_watermarks()
985 		b.full = dfixed_const(mode->clock);  in dce_v6_0_program_watermarks()
986 		b.full = dfixed_div(b, a);  in dce_v6_0_program_watermarks()
987 		c.full = dfixed_const(latency_watermark_a);  in dce_v6_0_program_watermarks()
988 		c.full = dfixed_mul(c, b);  in dce_v6_0_program_watermarks()
989 		c.full = dfixed_mul(c, amdgpu_crtc->hsc);  in dce_v6_0_program_watermarks()
990 		c.full = dfixed_div(c, a);  in dce_v6_0_program_watermarks()
991 		a.full = dfixed_const(16);  in dce_v6_0_program_watermarks()
992 		c.full = dfixed_div(c, a);  in dce_v6_0_program_watermarks()
996 		a.full = dfixed_const(1000);  in dce_v6_0_program_watermarks()
997 		b.full = dfixed_const(mode->clock);  in dce_v6_0_program_watermarks()
998 		b.full = dfixed_div(b, a);  in dce_v6_0_program_watermarks()
999 		c.full = dfixed_const(latency_watermark_b);  in dce_v6_0_program_watermarks()
1000 		c.full = dfixed_mul(c, b);  in dce_v6_0_program_watermarks()
1001 		c.full = dfixed_mul(c, amdgpu_crtc->hsc);  in dce_v6_0_program_watermarks()
1002 		c.full = dfixed_div(c, a);  in dce_v6_0_program_watermarks()
1003 		a.full = dfixed_const(16);  in dce_v6_0_program_watermarks()
1004 		c.full = dfixed_div(c, a);  in dce_v6_0_program_watermarks()
2050 	 * retain the full precision throughout the pipeline.  in dce_v6_0_crtc_do_set_base()