290 	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))  in amdgpu_atombios_encoder_mode_fixup()
291 		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;  in amdgpu_atombios_encoder_mode_fixup()
402 		case 2:  in amdgpu_atombios_encoder_setup_dvo()
531  * - 3 DIG transmitter blocks UNIPHY0/1/2 (links A and B).
543  * crtc -> dig encoder -> UNIPHY/LVTMA (1 or 2 links)
556 	DIG_ENCODER_CONTROL_PARAMETERS_V5 v5;  member
631 		case 2:  in amdgpu_atombios_encoder_setup_dig_encoder()
687 				args.v5.asDPPanelModeParam.ucAction = action;  in amdgpu_atombios_encoder_setup_dig_encoder()
688 				args.v5.asDPPanelModeParam.ucPanelMode = panel_mode;  in amdgpu_atombios_encoder_setup_dig_encoder()
689 				args.v5.asDPPanelModeParam.ucDigId = dig->dig_encoder;  in amdgpu_atombios_encoder_setup_dig_encoder()
692 				args.v5.asStreamParam.ucAction = action;  in amdgpu_atombios_encoder_setup_dig_encoder()
693 				args.v5.asStreamParam.ucDigId = dig->dig_encoder;  in amdgpu_atombios_encoder_setup_dig_encoder()
694 				args.v5.asStreamParam.ucDigMode =  in amdgpu_atombios_encoder_setup_dig_encoder()
696 				if (ENCODER_MODE_IS_DP(args.v5.asStreamParam.ucDigMode))  in amdgpu_atombios_encoder_setup_dig_encoder()
697 					args.v5.asStreamParam.ucLaneNum = dp_lane_count;  in amdgpu_atombios_encoder_setup_dig_encoder()
700 					args.v5.asStreamParam.ucLaneNum = 8;  in amdgpu_atombios_encoder_setup_dig_encoder()
702 					args.v5.asStreamParam.ucLaneNum = 4;  in amdgpu_atombios_encoder_setup_dig_encoder()
703 				args.v5.asStreamParam.ulPixelClock =  in amdgpu_atombios_encoder_setup_dig_encoder()
705 				args.v5.asStreamParam.ucBitPerColor =  in amdgpu_atombios_encoder_setup_dig_encoder()
707 				args.v5.asStreamParam.ucLinkRateIn270Mhz = dp_clock / 27000;  in amdgpu_atombios_encoder_setup_dig_encoder()
717 				args.v5.asCmdParam.ucAction = action;  in amdgpu_atombios_encoder_setup_dig_encoder()
718 				args.v5.asCmdParam.ucDigId = dig->dig_encoder;  in amdgpu_atombios_encoder_setup_dig_encoder()
744 	DIG_TRANSMITTER_CONTROL_PARAMETERS_V1_5 v5;  member
835 					args.v1.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10);  in amdgpu_atombios_encoder_setup_dig_transmitter()
861 		case 2:  in amdgpu_atombios_encoder_setup_dig_transmitter()
872 					args.v2.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10);  in amdgpu_atombios_encoder_setup_dig_transmitter()
889 				args.v2.acConfig.ucTransmitterSel = 2;  in amdgpu_atombios_encoder_setup_dig_transmitter()
914 					args.v3.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10);  in amdgpu_atombios_encoder_setup_dig_transmitter()
937 				args.v3.acConfig.ucRefClkSource = 2; /* external src */  in amdgpu_atombios_encoder_setup_dig_transmitter()
949 				args.v3.acConfig.ucTransmitterSel = 2;  in amdgpu_atombios_encoder_setup_dig_transmitter()
973 					args.v4.usPixelClock = cpu_to_le16((amdgpu_encoder->pixel_clock / 2) / 10);  in amdgpu_atombios_encoder_setup_dig_transmitter()
1011 				args.v4.acConfig.ucTransmitterSel = 2;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1025 			args.v5.ucAction = action;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1027 				args.v5.usSymClock = cpu_to_le16(dp_clock / 10);  in amdgpu_atombios_encoder_setup_dig_transmitter()
1029 				args.v5.usSymClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10);  in amdgpu_atombios_encoder_setup_dig_transmitter()
1034 					args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYB;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1036 					args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYA;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1040 					args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYD;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1042 					args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYC;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1046 					args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYF;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1048 					args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYE;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1051 				args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYG;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1055 				args.v5.ucLaneNum = dp_lane_count;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1057 				args.v5.ucLaneNum = 8;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1059 				args.v5.ucLaneNum = 4;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1060 			args.v5.ucConnObjId = connector_object_id;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1061 			args.v5.ucDigMode = amdgpu_atombios_encoder_get_encoder_mode(encoder);  in amdgpu_atombios_encoder_setup_dig_transmitter()
1064 				args.v5.asConfig.ucPhyClkSrcId = ENCODER_REFCLK_SRC_EXTCLK;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1066 				args.v5.asConfig.ucPhyClkSrcId = pll_id;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1069 				args.v5.asConfig.ucCoherentMode = 1; /* DP requires coherent */  in amdgpu_atombios_encoder_setup_dig_transmitter()
1072 					args.v5.asConfig.ucCoherentMode = 1;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1075 				args.v5.asConfig.ucHPDSel = 0;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1077 				args.v5.asConfig.ucHPDSel = hpd_id + 1;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1078 			args.v5.ucDigEncoderSel = 1 << dig_encoder;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1079 			args.v5.ucDPLaneSet = lane_set;  in amdgpu_atombios_encoder_setup_dig_transmitter()
1232 	case 2:  in amdgpu_atombios_encoder_setup_external_encoder()
1235 		case 2:  in amdgpu_atombios_encoder_setup_external_encoder()
1492 		case 2:  in amdgpu_atombios_encoder_set_crtc_source()
1522 				case 2:  in amdgpu_atombios_encoder_set_crtc_source()
1591 				case 2:  in amdgpu_atombios_encoder_set_crtc_source()
2032 		if (encoder_enum == 2)  in amdgpu_atombios_encoder_get_lcd_info()
2044 			if ((frev == 1) && (crev < 2))  in amdgpu_atombios_encoder_get_lcd_info()
2119 	if (encoder_enum == 2)  in amdgpu_atombios_encoder_get_dig_info()