1417 …32 amdgpu_virt_rlcg_vfi_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id)  in amdgpu_virt_rlcg_vfi_reg_rw()  argument
1444 	if (adev->gfx.xcc_mask && (((1 << xcc_id) & adev->gfx.xcc_mask) == 0)) {  in amdgpu_virt_rlcg_vfi_reg_rw()
1445 		dev_err(adev->dev, "VFi invalid XCC, xcc_id=0x%x\n", xcc_id);  in amdgpu_virt_rlcg_vfi_reg_rw()
1452 	reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[xcc_id];  in amdgpu_virt_rlcg_vfi_reg_rw()
1544 u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id)  in amdgpu_virt_rlcg_reg_rw()  argument
1558 		return amdgpu_virt_rlcg_vfi_reg_rw(adev, offset, v, flag, xcc_id);  in amdgpu_virt_rlcg_reg_rw()
1566 	if (adev->gfx.xcc_mask && (((1 << xcc_id) & adev->gfx.xcc_mask) == 0)) {  in amdgpu_virt_rlcg_reg_rw()
1574 	reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl[xcc_id];  in amdgpu_virt_rlcg_reg_rw()
1646 		       u32 acc_flags, u32 hwip, u32 xcc_id)  in amdgpu_sriov_wreg()  argument
1655 		amdgpu_virt_rlcg_reg_rw(adev, offset, value, rlcg_flag, xcc_id);  in amdgpu_sriov_wreg()
1666 		      u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id)  in amdgpu_sriov_rreg()  argument
1675 		return amdgpu_virt_rlcg_reg_rw(adev, offset, 0, rlcg_flag, xcc_id);  in amdgpu_sriov_rreg()