Lines Matching +full:0 +full:x00000042
189 version_major = (ucode_version >> 20) & 0xfff; in amdgpu_vce_early_init()
190 version_minor = (ucode_version >> 8) & 0xfff; in amdgpu_vce_early_init()
191 binary_id = ucode_version & 0xff; in amdgpu_vce_early_init()
197 return 0; in amdgpu_vce_early_init()
231 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) { in amdgpu_vce_sw_init()
232 atomic_set(&adev->vce.handles[i], 0); in amdgpu_vce_sw_init()
239 return 0; in amdgpu_vce_sw_init()
254 return 0; in amdgpu_vce_sw_fini()
258 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_vce_sw_fini()
267 return 0; in amdgpu_vce_sw_fini()
280 if (ring == &adev->vce.ring[0]) { in amdgpu_vce_entity_init()
286 if (r != 0) { in amdgpu_vce_entity_init()
292 return 0; in amdgpu_vce_entity_init()
308 return 0; in amdgpu_vce_suspend()
310 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) in amdgpu_vce_suspend()
315 return 0; in amdgpu_vce_suspend()
340 memset_io(adev->vce.cpu_addr, 0, amdgpu_bo_size(adev->vce.vcpu_bo)); in amdgpu_vce_resume()
346 return 0; in amdgpu_vce_resume()
360 unsigned int i, count = 0; in amdgpu_vce_idle_work_handler()
362 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_vce_idle_work_handler()
365 if (count == 0) { in amdgpu_vce_idle_work_handler()
369 amdgpu_asic_set_vce_clocks(adev, 0, 0); in amdgpu_vce_idle_work_handler()
435 struct amdgpu_ring *ring = &adev->vce.ring[0]; in amdgpu_vce_free_handles()
438 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) { in amdgpu_vce_free_handles()
449 atomic_set(&adev->vce.handles[i], 0); in amdgpu_vce_free_handles()
481 memset(&ib_msg, 0, sizeof(ib_msg)); in amdgpu_vce_get_create_msg()
489 ib = &job->ibs[0]; in amdgpu_vce_get_create_msg()
494 ib->length_dw = 0; in amdgpu_vce_get_create_msg()
495 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */ in amdgpu_vce_get_create_msg()
496 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ in amdgpu_vce_get_create_msg()
500 ib->ptr[ib->length_dw++] = 0x00000040; /* len */ in amdgpu_vce_get_create_msg()
502 ib->ptr[ib->length_dw++] = 0x00000030; /* len */ in amdgpu_vce_get_create_msg()
503 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */ in amdgpu_vce_get_create_msg()
504 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
505 ib->ptr[ib->length_dw++] = 0x00000042; in amdgpu_vce_get_create_msg()
506 ib->ptr[ib->length_dw++] = 0x0000000a; in amdgpu_vce_get_create_msg()
507 ib->ptr[ib->length_dw++] = 0x00000001; in amdgpu_vce_get_create_msg()
508 ib->ptr[ib->length_dw++] = 0x00000080; in amdgpu_vce_get_create_msg()
509 ib->ptr[ib->length_dw++] = 0x00000060; in amdgpu_vce_get_create_msg()
510 ib->ptr[ib->length_dw++] = 0x00000100; in amdgpu_vce_get_create_msg()
511 ib->ptr[ib->length_dw++] = 0x00000100; in amdgpu_vce_get_create_msg()
512 ib->ptr[ib->length_dw++] = 0x0000000c; in amdgpu_vce_get_create_msg()
513 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
515 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
516 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
517 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
518 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
521 ib->ptr[ib->length_dw++] = 0x00000014; /* len */ in amdgpu_vce_get_create_msg()
522 ib->ptr[ib->length_dw++] = 0x05000005; /* feedback buffer */ in amdgpu_vce_get_create_msg()
525 ib->ptr[ib->length_dw++] = 0x00000001; in amdgpu_vce_get_create_msg()
528 ib->ptr[i] = 0x0; in amdgpu_vce_get_create_msg()
538 return 0; in amdgpu_vce_get_create_msg()
574 ib = &job->ibs[0]; in amdgpu_vce_get_destroy_msg()
577 ib->length_dw = 0; in amdgpu_vce_get_destroy_msg()
578 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */ in amdgpu_vce_get_destroy_msg()
579 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ in amdgpu_vce_get_destroy_msg()
582 ib->ptr[ib->length_dw++] = 0x00000020; /* len */ in amdgpu_vce_get_destroy_msg()
583 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */ in amdgpu_vce_get_destroy_msg()
584 ib->ptr[ib->length_dw++] = 0xffffffff; /* next task info, set to 0xffffffff if no */ in amdgpu_vce_get_destroy_msg()
585 ib->ptr[ib->length_dw++] = 0x00000001; /* destroy session */ in amdgpu_vce_get_destroy_msg()
586 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_destroy_msg()
587 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_destroy_msg()
588 …ib->ptr[ib->length_dw++] = 0xffffffff; /* feedback is not needed, set to 0xffffffff and firmware w… in amdgpu_vce_get_destroy_msg()
589 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_destroy_msg()
591 ib->ptr[ib->length_dw++] = 0x00000008; /* len */ in amdgpu_vce_get_destroy_msg()
592 ib->ptr[ib->length_dw++] = 0x02000001; /* destroy cmd */ in amdgpu_vce_get_destroy_msg()
595 ib->ptr[i] = 0x0; in amdgpu_vce_get_destroy_msg()
607 return 0; in amdgpu_vce_get_destroy_msg()
640 if (index >= 0) { in amdgpu_vce_validate_bo()
643 lpfn = 0x100000000ULL >> PAGE_SHIFT; in amdgpu_vce_validate_bo()
645 fpfn = 0; in amdgpu_vce_validate_bo()
646 lpfn = (0x100000000ULL - PAGE_ALIGN(offset)) >> PAGE_SHIFT; in amdgpu_vce_validate_bo()
651 DRM_ERROR("Can't find BO for addr 0x%010llx %d %d %d %d\n", in amdgpu_vce_validate_bo()
656 for (i = 0; i < bo->placement.num_placement; ++i) { in amdgpu_vce_validate_bo()
688 if (index == 0xffffffff) in amdgpu_vce_cs_reloc()
689 index = 0; in amdgpu_vce_cs_reloc()
697 DRM_ERROR("Can't find BO for addr 0x%010llx %d %d %d %d\n", in amdgpu_vce_cs_reloc()
704 DRM_ERROR("BO too small for addr 0x%010llx %d %d\n", in amdgpu_vce_cs_reloc()
716 return 0; in amdgpu_vce_cs_reloc()
735 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) { in amdgpu_vce_validate_handle()
746 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) { in amdgpu_vce_validate_handle()
747 if (!atomic_cmpxchg(&p->adev->vce.handles[i], 0, handle)) { in amdgpu_vce_validate_handle()
749 p->adev->vce.img_size[i] = 0; in amdgpu_vce_validate_handle()
770 unsigned int fb_idx = 0, bs_idx = 0; in amdgpu_vce_ring_parse_cs()
772 uint32_t destroyed = 0; in amdgpu_vce_ring_parse_cs()
773 uint32_t created = 0; in amdgpu_vce_ring_parse_cs()
774 uint32_t allocated = 0; in amdgpu_vce_ring_parse_cs()
775 uint32_t tmp, handle = 0; in amdgpu_vce_ring_parse_cs()
776 uint32_t dummy = 0xffffffff; in amdgpu_vce_ring_parse_cs()
779 int i, r = 0; in amdgpu_vce_ring_parse_cs()
783 for (idx = 0; idx < ib->length_dw;) { in amdgpu_vce_ring_parse_cs()
794 case 0x00000002: /* task info */ in amdgpu_vce_ring_parse_cs()
799 case 0x03000001: /* encode */ in amdgpu_vce_ring_parse_cs()
801 0, 0); in amdgpu_vce_ring_parse_cs()
806 0, 0); in amdgpu_vce_ring_parse_cs()
811 case 0x05000001: /* context buffer */ in amdgpu_vce_ring_parse_cs()
813 0, 0); in amdgpu_vce_ring_parse_cs()
818 case 0x05000004: /* video bitstream buffer */ in amdgpu_vce_ring_parse_cs()
826 case 0x05000005: /* feedback buffer */ in amdgpu_vce_ring_parse_cs()
833 case 0x0500000d: /* MV buffer */ in amdgpu_vce_ring_parse_cs()
835 0, 0); in amdgpu_vce_ring_parse_cs()
840 0, 0); in amdgpu_vce_ring_parse_cs()
849 for (idx = 0; idx < ib->length_dw;) { in amdgpu_vce_ring_parse_cs()
854 case 0x00000001: /* session */ in amdgpu_vce_ring_parse_cs()
858 if (session_idx < 0) { in amdgpu_vce_ring_parse_cs()
865 case 0x00000002: /* task info */ in amdgpu_vce_ring_parse_cs()
870 case 0x01000001: /* create */ in amdgpu_vce_ring_parse_cs()
886 if (width == 0 || height == 0 || in amdgpu_vce_ring_parse_cs()
898 case 0x04000001: /* config extension */ in amdgpu_vce_ring_parse_cs()
899 case 0x04000002: /* pic control */ in amdgpu_vce_ring_parse_cs()
900 case 0x04000005: /* rate control */ in amdgpu_vce_ring_parse_cs()
901 case 0x04000007: /* motion estimation */ in amdgpu_vce_ring_parse_cs()
902 case 0x04000008: /* rdo */ in amdgpu_vce_ring_parse_cs()
903 case 0x04000009: /* vui */ in amdgpu_vce_ring_parse_cs()
904 case 0x05000002: /* auxiliary buffer */ in amdgpu_vce_ring_parse_cs()
905 case 0x05000009: /* clock table */ in amdgpu_vce_ring_parse_cs()
908 case 0x0500000c: /* hw config */ in amdgpu_vce_ring_parse_cs()
922 case 0x03000001: /* encode */ in amdgpu_vce_ring_parse_cs()
924 *size, 0); in amdgpu_vce_ring_parse_cs()
929 *size / 3, 0); in amdgpu_vce_ring_parse_cs()
934 case 0x02000001: /* destroy */ in amdgpu_vce_ring_parse_cs()
938 case 0x05000001: /* context buffer */ in amdgpu_vce_ring_parse_cs()
940 *size * 2, 0); in amdgpu_vce_ring_parse_cs()
945 case 0x05000004: /* video bitstream buffer */ in amdgpu_vce_ring_parse_cs()
953 case 0x05000005: /* feedback buffer */ in amdgpu_vce_ring_parse_cs()
960 case 0x0500000d: /* MV buffer */ in amdgpu_vce_ring_parse_cs()
962 idx + 2, *size, 0); in amdgpu_vce_ring_parse_cs()
967 idx + 7, *size / 12, 0); in amdgpu_vce_ring_parse_cs()
973 DRM_ERROR("invalid VCE command (0x%x)!\n", cmd); in amdgpu_vce_ring_parse_cs()
1001 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) in amdgpu_vce_ring_parse_cs()
1003 atomic_set(&p->adev->vce.handles[i], 0); in amdgpu_vce_ring_parse_cs()
1020 uint32_t destroyed = 0; in amdgpu_vce_ring_parse_cs_vm()
1021 uint32_t created = 0; in amdgpu_vce_ring_parse_cs_vm()
1022 uint32_t allocated = 0; in amdgpu_vce_ring_parse_cs_vm()
1023 uint32_t tmp, handle = 0; in amdgpu_vce_ring_parse_cs_vm()
1024 int i, r = 0, idx = 0; in amdgpu_vce_ring_parse_cs_vm()
1037 case 0x00000001: /* session */ in amdgpu_vce_ring_parse_cs_vm()
1041 if (session_idx < 0) { in amdgpu_vce_ring_parse_cs_vm()
1047 case 0x01000001: /* create */ in amdgpu_vce_ring_parse_cs_vm()
1061 case 0x02000001: /* destroy */ in amdgpu_vce_ring_parse_cs_vm()
1092 for (i = 0; i < AMDGPU_MAX_VCE_HANDLES; ++i) in amdgpu_vce_ring_parse_cs_vm()
1094 atomic_set(&p->adev->vce.handles[i], 0); in amdgpu_vce_ring_parse_cs_vm()
1156 return 0; in amdgpu_vce_ring_test_ring()
1167 for (i = 0; i < timeout; i++) { in amdgpu_vce_ring_test_ring()
1192 if (ring != &ring->adev->vce.ring[0]) in amdgpu_vce_ring_test_ib()
1193 return 0; in amdgpu_vce_ring_test_ib()
1204 if (r == 0) in amdgpu_vce_ring_test_ib()
1206 else if (r > 0) in amdgpu_vce_ring_test_ib()
1207 r = 0; in amdgpu_vce_ring_test_ib()
1217 case 0: in amdgpu_vce_get_ring_prio()