Lines Matching defs:fences

83 	INIT_LIST_HEAD(&fence_drv->fences);
140  * -ENOENT when no fences were processes
141  * 1 when more fences are pending
142  * 0 when no fences are pending any more
156 	list_for_each_entry(userq_fence, &fence_drv->fences, link) {
161 	list_cut_before(&to_be_signaled, &fence_drv->fences,
180 	return list_empty(&fence_drv->fences) ? 0 : 1;
194 	list_for_each_entry_safe(fence, tmp, &fence_drv->fences, link) {
289 		list_add_tail(&fence->link, &fence_drv->fences);
592 /* Count the number of expected fences so userspace can alloc a buffer */
613 	/* Count timeline fences */
628 	/* Count boolean fences */
661 	/* Count read fences */
671 	/* Count write fences */
692 			    struct dma_fence **fences, unsigned int *num_fences,
699 	fences[(*num_fences)++] = dma_fence_get(fence);
716 	struct dma_fence **fences, *fence, *f;
728 	fences = kmalloc_array(wait_info->num_fences, sizeof(*fences),
730 	if (!fences) {
735 	/* Retrieve timeline fences */
746 			r = amdgpu_userq_wait_add_fence(wait_info, fences,
757 	/* Retrieve boolean fences */
768 		r = amdgpu_userq_wait_add_fence(wait_info, fences,
803 			r = amdgpu_userq_wait_add_fence(wait_info, fences,
817 			r = amdgpu_userq_wait_add_fence(wait_info, fences,
827 	 * Keep only the latest fences to reduce the number of values
830 	num_fences = dma_fence_dedup_array(fences, num_fences);
843 		userq_fence = to_amdgpu_userq_fence(fences[i]);
846 			 * Just waiting on other driver fences should
849 			r = dma_fence_wait(fences[i], true);
874 		fence_info[cnt].value = fences[i]->seqno;
893 		dma_fence_put(fences[num_fences]);
894 	kfree(fences);
961 	 * userq_fence_info and return the actual number of fences on