92 	/* Direct submission to the ring buffer during init and reset. */
117 	/* sync_seq is protected by ring emission lock */
131 void amdgpu_fence_driver_clear_job_fences(struct amdgpu_ring *ring);
132 void amdgpu_fence_driver_set_error(struct amdgpu_ring *ring, int error);
133 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
135 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring);
136 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
143 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, struct amdgpu_job *job,
145 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
147 bool amdgpu_fence_process(struct amdgpu_ring *ring);
148 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
149 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
152 unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
156 u64 amdgpu_fence_last_unsignaled_time_us(struct amdgpu_ring *ring);
157 void amdgpu_fence_update_start_timestamp(struct amdgpu_ring *ring, uint32_t seq,
164 /* provided by hw blocks that expose a ring buffer for commands */
174 	/* ring read/write ptr handling */
175 	u64 (*get_rptr)(struct amdgpu_ring *ring);
176 	u64 (*get_wptr)(struct amdgpu_ring *ring);
177 	void (*set_wptr)(struct amdgpu_ring *ring);
189 	void (*emit_ib)(struct amdgpu_ring *ring,
193 	void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
195 	void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
196 	void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vmid,
198 	void (*emit_hdp_flush)(struct amdgpu_ring *ring);
199 	void (*emit_gds_switch)(struct amdgpu_ring *ring, uint32_t vmid,
204 	int (*test_ring)(struct amdgpu_ring *ring);
205 	int (*test_ib)(struct amdgpu_ring *ring, long timeout);
207 	void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
208 	void (*insert_start)(struct amdgpu_ring *ring);
209 	void (*insert_end)(struct amdgpu_ring *ring);
211 	void (*pad_ib)(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
212 	unsigned (*init_cond_exec)(struct amdgpu_ring *ring, uint64_t addr);
214 	void (*begin_use)(struct amdgpu_ring *ring);
215 	void (*end_use)(struct amdgpu_ring *ring);
216 	void (*emit_switch_buffer) (struct amdgpu_ring *ring);
217 	void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
218 	void (*emit_gfx_shadow)(struct amdgpu_ring *ring, u64 shadow_va, u64 csa_va,
220 	void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg,
222 	void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
223 	void (*emit_reg_wait)(struct amdgpu_ring *ring, uint32_t reg,
225 	void (*emit_reg_write_reg_wait)(struct amdgpu_ring *ring,
228 	void (*emit_frame_cntl)(struct amdgpu_ring *ring, bool start,
230 	/* Try to soft recover the ring to make the fence signal */
231 	void (*soft_recovery)(struct amdgpu_ring *ring, unsigned vmid);
232 	int (*preempt_ib)(struct amdgpu_ring *ring);
233 	void (*emit_mem_sync)(struct amdgpu_ring *ring);
234 	void (*emit_wave_limit)(struct amdgpu_ring *ring, bool enable);
235 	void (*patch_cntl)(struct amdgpu_ring *ring, unsigned offset);
236 	void (*patch_ce)(struct amdgpu_ring *ring, unsigned offset);
237 	void (*patch_de)(struct amdgpu_ring *ring, unsigned offset);
238 	int (*reset)(struct amdgpu_ring *ring, unsigned int vmid);
239 	void (*emit_cleaner_shader)(struct amdgpu_ring *ring);
249 	uint32_t		*ring;  member
342 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
343 void amdgpu_ring_ib_begin(struct amdgpu_ring *ring);
344 void amdgpu_ring_ib_end(struct amdgpu_ring *ring);
345 void amdgpu_ring_ib_on_emit_cntl(struct amdgpu_ring *ring);
346 void amdgpu_ring_ib_on_emit_ce(struct amdgpu_ring *ring);
347 void amdgpu_ring_ib_on_emit_de(struct amdgpu_ring *ring);
349 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
350 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
351 void amdgpu_ring_commit(struct amdgpu_ring *ring);
352 void amdgpu_ring_undo(struct amdgpu_ring *ring);
353 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
357 void amdgpu_ring_fini(struct amdgpu_ring *ring);
358 void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring,
361 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,
364 static inline void amdgpu_ring_set_preempt_cond_exec(struct amdgpu_ring *ring,  in amdgpu_ring_set_preempt_cond_exec()  argument
367 	*ring->cond_exe_cpu_addr = cond_exec;  in amdgpu_ring_set_preempt_cond_exec()
370 static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)  in amdgpu_ring_clear_ring()  argument
373 	while (i <= ring->buf_mask)  in amdgpu_ring_clear_ring()
374 		ring->ring[i++] = ring->funcs->nop;  in amdgpu_ring_clear_ring()
378 static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v)  in amdgpu_ring_write()  argument
380 	ring->ring[ring->wptr++ & ring->buf_mask] = v;  in amdgpu_ring_write()
381 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_write()
382 	ring->count_dw--;  in amdgpu_ring_write()
385 static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring,  in amdgpu_ring_write_multiple()  argument
390 	occupied = ring->wptr & ring->buf_mask;  in amdgpu_ring_write_multiple()
391 	chunk1 = ring->buf_mask + 1 - occupied;  in amdgpu_ring_write_multiple()
398 		memcpy(&ring->ring[occupied], src, chunk1);  in amdgpu_ring_write_multiple()
402 		memcpy(ring->ring, src, chunk2);  in amdgpu_ring_write_multiple()
405 	ring->wptr += count_dw;  in amdgpu_ring_write_multiple()
406 	ring->wptr &= ring->ptr_mask;  in amdgpu_ring_write_multiple()
407 	ring->count_dw -= count_dw;  in amdgpu_ring_write_multiple()
412  * @ring: amdgpu_ring structure
417 static inline void amdgpu_ring_patch_cond_exec(struct amdgpu_ring *ring,  in amdgpu_ring_patch_cond_exec()  argument
422 	if (!ring->funcs->init_cond_exec)  in amdgpu_ring_patch_cond_exec()
425 	WARN_ON(offset > ring->buf_mask);  in amdgpu_ring_patch_cond_exec()
426 	WARN_ON(ring->ring[offset] != 0);  in amdgpu_ring_patch_cond_exec()
428 	cur = (ring->wptr - 1) & ring->buf_mask;  in amdgpu_ring_patch_cond_exec()
430 		cur += ring->ring_size >> 2;  in amdgpu_ring_patch_cond_exec()
431 	ring->ring[offset] = cur - offset;  in amdgpu_ring_patch_cond_exec()
434 #define amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset)			\  argument
435 	(ring->is_mes_queue && ring->mes_ctx ?				\
436 	 (ring->mes_ctx->meta_data_gpu_addr + offset) : 0)
438 #define amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset)			\  argument
439 	(ring->is_mes_queue && ring->mes_ctx ?				\
440 	 (void *)((uint8_t *)(ring->mes_ctx->meta_data_ptr) + offset) : \
443 int amdgpu_ring_test_helper(struct amdgpu_ring *ring);
446 			      struct amdgpu_ring *ring);
448 int amdgpu_ring_init_mqd(struct amdgpu_ring *ring);
466 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
472 bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring);