89 	if (!adev->mca.mp0.ras)  in amdgpu_mca_mp0_ras_sw_init()
92 	ras = adev->mca.mp0.ras;  in amdgpu_mca_mp0_ras_sw_init()
96 		dev_err(adev->dev, "Failed to register mca.mp0 ras block!\n");  in amdgpu_mca_mp0_ras_sw_init()
100 	strcpy(ras->ras_block.ras_comm.name, "mca.mp0");  in amdgpu_mca_mp0_ras_sw_init()
103 	adev->mca.mp0.ras_if = &ras->ras_block.ras_comm;  in amdgpu_mca_mp0_ras_sw_init()
113 	if (!adev->mca.mp1.ras)  in amdgpu_mca_mp1_ras_sw_init()
116 	ras = adev->mca.mp1.ras;  in amdgpu_mca_mp1_ras_sw_init()
120 		dev_err(adev->dev, "Failed to register mca.mp1 ras block!\n");  in amdgpu_mca_mp1_ras_sw_init()
124 	strcpy(ras->ras_block.ras_comm.name, "mca.mp1");  in amdgpu_mca_mp1_ras_sw_init()
127 	adev->mca.mp1.ras_if = &ras->ras_block.ras_comm;  in amdgpu_mca_mp1_ras_sw_init()
137 	if (!adev->mca.mpio.ras)  in amdgpu_mca_mpio_ras_sw_init()
140 	ras = adev->mca.mpio.ras;  in amdgpu_mca_mpio_ras_sw_init()
144 		dev_err(adev->dev, "Failed to register mca.mpio ras block!\n");  in amdgpu_mca_mpio_ras_sw_init()
148 	strcpy(ras->ras_block.ras_comm.name, "mca.mpio");  in amdgpu_mca_mpio_ras_sw_init()
151 	adev->mca.mpio.ras_if = &ras->ras_block.ras_comm;  in amdgpu_mca_mpio_ras_sw_init()
220 	struct amdgpu_mca *mca = &adev->mca;  in amdgpu_mca_smu_init_funcs()  local
222 	mca->mca_funcs = mca_funcs;  in amdgpu_mca_smu_init_funcs()
227 	struct amdgpu_mca *mca = &adev->mca;  in amdgpu_mca_init()  local
231 	atomic_set(&mca->ue_update_flag, 0);  in amdgpu_mca_init()
233 	for (i = 0; i < ARRAY_SIZE(mca->mca_caches); i++) {  in amdgpu_mca_init()
234 		mca_cache = &mca->mca_caches[i];  in amdgpu_mca_init()
244 	struct amdgpu_mca *mca = &adev->mca;  in amdgpu_mca_fini()  local
248 	atomic_set(&mca->ue_update_flag, 0);  in amdgpu_mca_fini()
250 	for (i = 0; i < ARRAY_SIZE(mca->mca_caches); i++) {  in amdgpu_mca_fini()
251 		mca_cache = &mca->mca_caches[i];  in amdgpu_mca_fini()
266 	const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;  in amdgpu_mca_smu_set_debug_mode()
294 	const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;  in amdgpu_mca_smu_get_valid_mca_count()
308 	const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;  in amdgpu_mca_smu_get_mca_entry()
333 	struct amdgpu_mca *mca = &adev->mca;  in amdgpu_mca_bank_should_update()  local
337 	 * Because the UE Valid MCA count will only be cleared after reset,  in amdgpu_mca_bank_should_update()
343 			ret = atomic_cmpxchg(&mca->ue_update_flag, 0, 1) == 0;  in amdgpu_mca_bank_should_update()
345 			atomic_set(&mca->ue_update_flag, 0);  in amdgpu_mca_bank_should_update()
385 	const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;  in amdgpu_mca_smu_parse_mca_error_count()
447 	struct mca_bank_cache *mca_cache = &adev->mca.mca_caches[type];  in amdgpu_mca_add_mca_set_to_cache()
461 	struct mca_bank_cache *mca_cache = &adev->mca.mca_caches[type];  in amdgpu_mca_smu_log_ras_error()
474 	/* add remain mca bank to mca cache */  in amdgpu_mca_smu_log_ras_error()
481 	/* dispatch mca set again if mca cache has valid data */  in amdgpu_mca_smu_log_ras_error()
503 	dev_info(adev->dev, "amdgpu set smu mca debug mode %s success\n", val ? "on" : "off");  in amdgpu_mca_smu_debug_mode_set()
519 …seq_printf(m, "mca entry[%d].type: %s\n", idx, entry->type == AMDGPU_MCA_ERROR_TYPE_UE ? "UE" : "C…  in mca_dump_entry()
520 	seq_printf(m, "mca entry[%d].ip: %d\n", idx, entry->ip);  in mca_dump_entry()
521 	seq_printf(m, "mca entry[%d].info: socketid:%d aid:%d hwid:0x%03x mcatype:0x%04x\n",  in mca_dump_entry()
525 …seq_printf(m, "mca entry[%d].regs[%d]: 0x%016llx\n", idx, reg_idx_array[i], entry->regs[reg_idx_ar…  in mca_dump_entry()
543 	seq_printf(m, "amdgpu smu %s valid mca count: %d\n",  in mca_dump_show()
552 	/* add mca bank to mca bank cache */  in mca_dump_show()