Lines Matching defs:mca
89 if (!adev->mca.mp0.ras)
92 ras = adev->mca.mp0.ras;
96 dev_err(adev->dev, "Failed to register mca.mp0 ras block!\n");
100 strcpy(ras->ras_block.ras_comm.name, "mca.mp0");
104 adev->mca.mp0.ras_if = &ras->ras_block.ras_comm;
114 if (!adev->mca.mp1.ras)
117 ras = adev->mca.mp1.ras;
121 dev_err(adev->dev, "Failed to register mca.mp1 ras block!\n");
125 strcpy(ras->ras_block.ras_comm.name, "mca.mp1");
129 adev->mca.mp1.ras_if = &ras->ras_block.ras_comm;
139 if (!adev->mca.mpio.ras)
142 ras = adev->mca.mpio.ras;
146 dev_err(adev->dev, "Failed to register mca.mpio ras block!\n");
150 strcpy(ras->ras_block.ras_comm.name, "mca.mpio");
154 adev->mca.mpio.ras_if = &ras->ras_block.ras_comm;
223 struct amdgpu_mca *mca = &adev->mca;
225 mca->mca_funcs = mca_funcs;
230 struct amdgpu_mca *mca = &adev->mca;
234 atomic_set(&mca->ue_update_flag, 0);
236 for (i = 0; i < ARRAY_SIZE(mca->mca_caches); i++) {
237 mca_cache = &mca->mca_caches[i];
247 struct amdgpu_mca *mca = &adev->mca;
251 atomic_set(&mca->ue_update_flag, 0);
253 for (i = 0; i < ARRAY_SIZE(mca->mca_caches); i++) {
254 mca_cache = &mca->mca_caches[i];
269 const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;
297 const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;
311 const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;
336 struct amdgpu_mca *mca = &adev->mca;
346 ret = atomic_cmpxchg(&mca->ue_update_flag, 0, 1) == 0;
348 atomic_set(&mca->ue_update_flag, 0);
407 const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs;
469 struct mca_bank_cache *mca_cache = &adev->mca.mca_caches[type];
483 struct mca_bank_cache *mca_cache = &adev->mca.mca_caches[type];
496 /* add remain mca bank to mca cache */
503 /* dispatch mca set again if mca cache has valid data */
525 dev_info(adev->dev, "amdgpu set smu mca debug mode %s success\n", val ? "on" : "off");
541 seq_printf(m, "mca entry[%d].type: %s\n", idx, entry->type == AMDGPU_MCA_ERROR_TYPE_UE ? "UE" : "CE");
542 seq_printf(m, "mca entry[%d].ip: %d\n", idx, entry->ip);
543 seq_printf(m, "mca entry[%d].info: socketid:%d aid:%d hwid:0x%03x mcatype:0x%04x\n",
547 seq_printf(m, "mca entry[%d].regs[%d]: 0x%016llx\n", idx, reg_idx_array[i], entry->regs[reg_idx_array[i]]);
565 seq_printf(m, "amdgpu smu %s valid mca count: %d\n",
574 /* add mca bank to mca bank cache */