Lines Matching +full:suspend +full:- +full:override
40 #include <linux/suspend.h>
60 * - 3.0.0 - initial driver
61 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
62 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
64 * - 3.3.0 - Add VM support for UVD on supported hardware.
65 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
66 * - 3.5.0 - Add support for new UVD_NO_OP register.
67 * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
68 * - 3.7.0 - Add support for VCE clock list packet
69 * - 3.8.0 - Add support raster config init in the kernel
70 * - 3.9.0 - Add support for memory query info about VRAM and GTT.
71 * - 3.10.0 - Add support for new fences ioctl, new gem ioctl flags
72 * - 3.11.0 - Add support for sensor query info (clocks, temp, etc).
73 * - 3.12.0 - Add query for double offchip LDS buffers
74 * - 3.13.0 - Add PRT support
75 * - 3.14.0 - Fix race in amdgpu_ctx_get_fence() and note new functionality
76 * - 3.15.0 - Export more gpu info for gfx9
77 * - 3.16.0 - Add reserved vmid support
78 * - 3.17.0 - Add AMDGPU_NUM_VRAM_CPU_PAGE_FAULTS.
79 * - 3.18.0 - Export gpu always on cu bitmap
80 * - 3.19.0 - Add support for UVD MJPEG decode
81 * - 3.20.0 - Add support for local BOs
82 * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
83 * - 3.22.0 - Add DRM_AMDGPU_SCHED ioctl
84 * - 3.23.0 - Add query for VRAM lost counter
85 * - 3.24.0 - Add high priority compute support for gfx9
86 * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
87 * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE.
88 * - 3.27.0 - Add new chunk to AMDGPU_CS to enable BO_LIST creation.
89 * - 3.28.0 - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
90 * - 3.29.0 - Add AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID
91 * - 3.30.0 - Add AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE.
92 * - 3.31.0 - Add support for per-flip tiling attribute changes with DC
93 * - 3.32.0 - Add syncobj timeline support to AMDGPU_CS.
94 * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS.
95 * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
96 * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
97 * - 3.36.0 - Allow reading more status registers on si/cik
98 * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
99 * - 3.38.0 - Add AMDGPU_IB_FLAG_EMIT_MEM_SYNC
100 * - 3.39.0 - DMABUF implicit sync does a full pipeline sync
101 * - 3.40.0 - Add AMDGPU_IDS_FLAGS_TMZ
102 * - 3.41.0 - Add video codec query
103 * - 3.42.0 - Add 16bpc fixed point display support
104 * - 3.43.0 - Add device hot plug/unplug support
105 * - 3.44.0 - DCN3 supports DCC independent block settings: !64B && 128B, 64B && 128B
106 * - 3.45.0 - Add context ioctl stable pstate interface
107 * - 3.46.0 - To enable hot plug amdgpu tests in libdrm
108 * - 3.47.0 - Add AMDGPU_GEM_CREATE_DISCARDABLE and AMDGPU_VM_NOALLOC flags
109 * - 3.48.0 - Add IP discovery version info to HW INFO
110 * - 3.49.0 - Add gang submit into CS IOCTL
111 * - 3.50.0 - Update AMDGPU_INFO_DEV_INFO IOCTL for minimum engine and memory clock
113 * 3.51.0 - Return the PCIe gen and lanes from the INFO ioctl
114 * 3.52.0 - Add AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD, add device_info fields:
117 * 3.53.0 - Support for GFX11 CP GFX shadowing
118 * 3.54.0 - Add AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS support
119 * - 3.55.0 - Add AMDGPU_INFO_GPUVM_FAULT query
120 * - 3.56.0 - Update IB start address and size alignment for decode and encode
121 * - 3.57.0 - Compute tunneling on GFX10+
122 * - 3.58.0 - Add GFX12 DCC support
123 * - 3.59.0 - Cleared VRAM
124 * - 3.60.0 - Add AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE (Vulkan requirement)
125 * - 3.61.0 - Contains fix for RV/PCO compute queues
126 * - 3.62.0 - Add AMDGPU_IDS_FLAGS_MODE_PF, AMDGPU_IDS_FLAGS_MODE_VF & AMDGPU_IDS_FLAGS_MODE_PT
127 * - 3.63.0 - GFX12 display DCC supports 256B max compressed block size
128 * - 3.64.0 - Userq IP support query
152 int amdgpu_gart_size = -1; /* auto */
153 int amdgpu_gtt_size = -1; /* auto */
154 int amdgpu_moverate = -1; /* auto */
155 int amdgpu_audio = -1;
158 int amdgpu_pcie_gen2 = -1;
159 int amdgpu_msi = -1;
161 int amdgpu_dpm = -1;
162 int amdgpu_fw_load_type = -1;
163 int amdgpu_aspm = -1;
164 int amdgpu_runtime_pm = -1;
166 int amdgpu_bapm = -1;
168 int amdgpu_vm_size = -1;
169 int amdgpu_vm_fragment_size = -1;
170 int amdgpu_vm_block_size = -1;
172 int amdgpu_vm_update_mode = -1;
174 int amdgpu_dc = -1;
184 int amdgpu_enforce_isolation = -1;
185 int amdgpu_modeset = -1;
202 int amdgpu_lbpw = -1;
203 int amdgpu_compute_multipipe = -1;
204 int amdgpu_gpu_recovery = -1; /* auto */
207 int amdgpu_smu_pptable_id = -1;
211 * - With this, for multiple monitors in sync(e.g. with the same model),
222 int amdgpu_mcbp = -1;
223 int amdgpu_discovery = -1;
228 int amdgpu_noretry = -1;
229 int amdgpu_force_asic_type = -1;
230 int amdgpu_tmz = -1; /* auto */
232 int amdgpu_reset_method = -1; /* auto */
233 int amdgpu_num_kcq = -1;
237 int amdgpu_sg_display = -1; /* auto */
240 int amdgpu_seamless = -1; /* auto */
242 int amdgpu_agp = -1; /* auto */
243 int amdgpu_wbrf = -1;
244 int amdgpu_damage_clips = -1; /* auto */
246 int amdgpu_rebar = -1; /* auto */
247 int amdgpu_user_queue = -1;
264 int amdgpu_ras_enable = -1;
266 int amdgpu_bad_page_threshold = -1;
289 * The default is -1 (The size depends on asic).
291 MODULE_PARM_DESC(gartsize, "Size of kernel GART to setup in megabytes (32, 64, etc., -1=auto)");
297 * The default is -1 (Use value specified by TTM).
300 MODULE_PARM_DESC(gttsize, "Size of the GTT userspace domain in megabytes (-1 = auto)");
305 * Set maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).
307 MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disa…
312 …* Set HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to di…
314 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
319 …* Set display Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default i…
326 * To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled).
333 * To disable PCIE Gen2/3 mode (0 = disable, 1 = enable). The default is -1 (auto, enabled).
335 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
340 …gnaled Interrupts (MSI) functionality (1 = enable, 0 = disable). The default is -1 (auto, enabled).
342 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
356 * The format can be [Non-Compute] or [GFX,Compute,SDMA,Video]. That is there can be one or
360 * - With one value specified, the setting will apply to all non-compute jobs.
361 * - With multiple values specified, the first one will be for GFX.
369 …"0: keep default value. negative: infinity timeout), format: for bare metal [Non-Compute] or [GFX,…
375 * Override for dynamic power management setting
377 * The default is -1 (auto).
379 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
386 * to -1 to select the default loading mode for the ASIC, as defined
387 * by the driver. The default is -1 (auto).
389 …if supported, 2 = smu load if supported, 1 = psp load, 0 = force direct if supported, -1 = auto)");
394 * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto, enabled).
396 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
401 …* Override for runtime power management control for dGPUs. The amdgpu driver can dynamically power…
402 * the dGPUs when they are idle if supported. The default is -1 (auto enable).
404 * Setting the value to -2 is auto enabled with power down when displays are attached.
406 … = force enable with BAMACO, 1 = force enable with BACO, 0 = disable, -1 = auto, -2 = auto with di…
411 …* Override what IP blocks are enabled on the GPU. Each GPU is a collection of IP blocks (gfx, disp…
422 * The default -1 (auto, enabled)
424 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
429 …* Set 1 to enable Deep Color support. Only affects non-DC display handling. The default is 0 (disa…
436 …* Override the size of the GPU's per client virtual address space in GiB. The default is -1 (auto…
443 …* Override VM fragment size in bits (4, 5, etc. 4 = 64K, 9 = 2M). The default is -1 (automatic for…
450 …* Override VM page table size in bits (default depending on vm_size and hw setup). The default is …
464 …* Override VM update mode. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only…
465 …* is -1 (Only in large BAR(LB) systems Compute VM tables will be updated by CPU, otherwise 0, neve…
479 …* Disable/Enable Display Core driver for debugging (1 = enable, 0 = disable). The default is -1 (a…
481 MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");
486 * Override the max number of jobs supported in the sw queue. The default is 32.
493 * Override the max number of HW submissions. The default is 2.
500 …* Override power features enabled. See enum PP_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_sha…
516 …* Override PCIE gen speed capabilities. See the CAIL flags in drivers/gpu/drm/amd/include/amd_pcie…
524 * Override PCIE lanes capabilities. See the CAIL flags in drivers/gpu/drm/amd/include/amd_pcie.h.
532 …* Override Clockgating features enabled on GPU (0 = disable clock gating). See the AMD_CG_SUPPORT …
540 …* Override Powergating features enabled on GPU (0 = disable power gating). See the AMD_PG_SUPPORT …
548 …* Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change). The default i…
573 …* Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). The default is -1 (au…
575 MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)…
578 …_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)");
583 …* Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disable…
585 MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)…
597 * Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default))
599 MODULE_PARM_DESC(ras_enable, "Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (d…
681 …* It is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default…
684 "Enable Mid-command buffer preemption (0 = disabled, 1 = enabled), -1 = auto (default)");
690 * (-1 = auto (default), 0 = disabled, 1 = enabled, 2 = use ip_discovery table from file)
735 * do not support per-process XNACK this also disables retry page faults.
736 * (0 = retry enabled, 1 = retry disabled, -1 auto (default))
739 "Disable retry faults (0 = retry enabled, 1 = retry disabled, -1 auto (default))");
762 * Set scheduling policy. Default is HWS(hardware scheduling) with over-subscription.
763 * Setting 1 disables over-subscription. Setting 2 disables HWS and statically
769 …"Scheduling policy (0 = HWS (Default), 1 = HWS without over-subscription, 2 = Non-HWS (Used for de…
776 int hws_max_conc_proc = -1;
871 * Enable PCIe P2P (requires large-BAR). Default value: true (on)
876 MODULE_PARM_DESC(pcie_p2p, "Enable PCIe P2P (requires large-BAR). (N = off, Y = on(default))");
881 …* Override display features enabled. See enum DC_FEATURE_MASK in drivers/gpu/drm/amd/include/amd_s…
889 …* Override display features enabled. See enum DC_DEBUG_MASK in drivers/gpu/drm/amd/include/amd_sha…
899 * Override the default ABM (Adaptive Backlight Management) level used for DC
901 * Valid levels are 0-4. A value of 0 indicates that ABM should be disabled by
902 * default. Values 1-4 control the maximum allowable brightness reduction via
906 * Defaults to -1, or auto. Userspace can only override this level after
909 int amdgpu_dm_abm_level = -1;
911 "ABM level (0 = off, 1-4 = backlight reduction level, -1 auto (default))");
914 int amdgpu_backlight = -1;
915 MODULE_PARM_DESC(backlight, "Backlight control (0 = pwm, 1 = aux, -1 auto (default))");
924 * Defaults to -1 (where it is enabled unless a PSR-SU display is detected).
927 "Damage clips support (0 = disable, 1 = enable, -1 auto (default))");
937 MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto (default), 0 = off, 1 = on)");
968 * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)
970 MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = m…
979 …ld(-1 = ignore threshold (default value), 0 = disable bad page retirement, -2 = threshold determin…
999 MODULE_PARM_DESC(sg_display, "S/G Display (-1 = auto (default), 0 = disable)");
1020 * Used to override pptable id. id = 0 use VBIOS pptable.
1024 …"specify pptable id to be used (-1 = auto(default) value, 0 = use pptable from vbios, > 0 = soft p…
1029 * Used to override the default SPX mode.
1033 "specify partition mode to be used (-2 = AMDGPU_AUTO_COMPUTE_PARTITION_MODE(default value) \
1045 * (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)
1049 "enforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = e…
1053 * Override nomodeset (1 = override, -1 = auto). The default is -1 (auto).
1055 MODULE_PARM_DESC(modeset, "Override nomodeset (1 = enable, -1 = auto)");
1062 MODULE_PARM_DESC(seamless, "Seamless boot (-1 = auto (default), 0 = disable, 1 = enable)");
1069 * - 0x1: Debug VM handling
1070 * - 0x2: Enable simulating large-bar capability on non-large bar system. This
1073 * - 0x4: Disable GPU soft recovery, always do a full reset
1074 * - 0x8: Use VRAM for firmware loading
1075 * - 0x10: Enable ACA based RAS logging
1076 * - 0x20: Enable experimental resets
1077 * - 0x40: Disable ring resets
1078 * - 0x80: Use VRAM for SMU pool
1087 * are non-snooped, so they are only used for access to uncached memory.
1089 MODULE_PARM_DESC(agp, "AGP (-1 = auto (default), 0 = disable, 1 = enable)");
1096 * relatively high-powered harmonics of the (G-)DDR memory clocks with local radio
1098 * with this feature enabled, PMFW will use either “shadowed P-State” or “P-State” based
1099 * on active list of frequencies in-use (to be avoided) as part of initial setting or
1100 * P-state transition. However, there may be potential performance impact with this
1102 * (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if supported))
1105 "Enable Wifi RFI interference mitigation (0 = disabled, 1 = enabled, -1 = auto(default)");
1115 MODULE_PARM_DESC(rebar, "Resizable BAR (-1 = auto (default), 0 = disable, 1 = enable)");
1122 * - -1 = auto (ASIC specific default)
1123 * - 0 = user queues disabled
1124 * - 1 = user queues enabled and kernel queues enabled (if supported)
1125 * - 2 = user queues enabled and kernel queues disabled
1127 MODULE_PARM_DESC(user_queue, "Enable user queues (-1 = auto (default), 0 = disable, 1 = enable, 2 =…
2221 /* 0 - GPU in amdgpu_get_secondary_funcs()
2222 * 1 - audio in amdgpu_get_secondary_funcs()
2223 * 2 - USB in amdgpu_get_secondary_funcs()
2224 * 3 - UCSI in amdgpu_get_secondary_funcs()
2227 p = pci_get_domain_bus_and_slot(pci_domain_nr(adev->pdev->bus), in amdgpu_get_secondary_funcs()
2228 adev->pdev->bus->number, i); in amdgpu_get_secondary_funcs()
2230 pm_runtime_get_sync(&p->dev); in amdgpu_get_secondary_funcs()
2231 pm_runtime_mark_last_busy(&p->dev); in amdgpu_get_secondary_funcs()
2232 pm_runtime_put_autosuspend(&p->dev); in amdgpu_get_secondary_funcs()
2242 adev->debug_vm = true; in amdgpu_init_debug_options()
2246 pr_info("debug: enabled simulating large-bar capability on non-large bar system\n"); in amdgpu_init_debug_options()
2247 adev->debug_largebar = true; in amdgpu_init_debug_options()
2252 adev->debug_disable_soft_recovery = true; in amdgpu_init_debug_options()
2257 adev->debug_use_vram_fw_buf = true; in amdgpu_init_debug_options()
2262 adev->debug_enable_ras_aca = true; in amdgpu_init_debug_options()
2267 adev->debug_exp_resets = true; in amdgpu_init_debug_options()
2272 adev->debug_disable_gpu_ring_reset = true; in amdgpu_init_debug_options()
2276 adev->pm.smu_debug_mask |= SMU_DEBUG_POOL_USE_VRAM; in amdgpu_init_debug_options()
2280 adev->debug_vm_userptr = true; in amdgpu_init_debug_options()
2285 adev->debug_disable_ce_logs = true; in amdgpu_init_debug_options()
2294 if (pdev->device == asic_type_quirks[i].device && in amdgpu_fix_asic_type()
2295 pdev->revision == asic_type_quirks[i].revision) { in amdgpu_fix_asic_type()
2310 unsigned long flags = ent->driver_data; in amdgpu_pci_probe()
2314 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA || in amdgpu_pci_probe()
2315 (pdev->class >> 8) == PCI_CLASS_DISPLAY_OTHER) { in amdgpu_pci_probe()
2316 if (drm_firmware_drivers_only() && amdgpu_modeset == -1) in amdgpu_pci_probe()
2317 return -EINVAL; in amdgpu_pci_probe()
2322 if (amdgpu_unsupported_pciidlist[i] == pdev->device) in amdgpu_pci_probe()
2323 return -ENODEV; in amdgpu_pci_probe()
2326 if (amdgpu_aspm == -1 && !pcie_aspm_enabled(pdev)) in amdgpu_pci_probe()
2336 return -ENODEV; in amdgpu_pci_probe()
2347 dev_info(&pdev->dev, in amdgpu_pci_probe()
2349 return -ENOTSUPP; in amdgpu_pci_probe()
2360 dev_info(&pdev->dev, in amdgpu_pci_probe()
2362 dev_info(&pdev->dev, in amdgpu_pci_probe()
2363 "Use radeon.si_support=0 amdgpu.si_support=1 to override.\n" in amdgpu_pci_probe()
2365 return -ENODEV; in amdgpu_pci_probe()
2369 dev_info(&pdev->dev, "amdgpu is built without SI support.\n"); in amdgpu_pci_probe()
2370 return -ENODEV; in amdgpu_pci_probe()
2379 dev_info(&pdev->dev, in amdgpu_pci_probe()
2381 dev_info(&pdev->dev, in amdgpu_pci_probe()
2382 "Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n" in amdgpu_pci_probe()
2384 return -ENODEV; in amdgpu_pci_probe()
2388 dev_info(&pdev->dev, "amdgpu is built without CIK support.\n"); in amdgpu_pci_probe()
2389 return -ENODEV; in amdgpu_pci_probe()
2395 adev = devm_drm_dev_alloc(&pdev->dev, &amdgpu_kms_driver, typeof(*adev), ddev); in amdgpu_pci_probe()
2399 adev->dev = &pdev->dev; in amdgpu_pci_probe()
2400 adev->pdev = pdev; in amdgpu_pci_probe()
2404 ddev->driver_features &= ~DRIVER_ATOMIC; in amdgpu_pci_probe()
2420 if (ret == -EAGAIN && ++retry <= 3) { in amdgpu_pci_probe()
2441 if (adev->mode_info.mode_config_initialized && in amdgpu_pci_probe()
2442 !list_empty(&adev_to_drm(adev)->mode_config.connector_list)) { in amdgpu_pci_probe()
2446 if (adev->gmc.real_vram_size <= (32*1024*1024)) in amdgpu_pci_probe()
2458 if (adev->pm.rpm_mode != AMDGPU_RUNPM_NONE) { in amdgpu_pci_probe()
2461 dev_pm_set_driver_flags(ddev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); in amdgpu_pci_probe()
2464 dev_pm_set_driver_flags(ddev->dev, DPM_FLAG_SMART_PREPARE | in amdgpu_pci_probe()
2467 pm_runtime_use_autosuspend(ddev->dev); in amdgpu_pci_probe()
2468 pm_runtime_set_autosuspend_delay(ddev->dev, 5000); in amdgpu_pci_probe()
2470 pm_runtime_allow(ddev->dev); in amdgpu_pci_probe()
2472 pm_runtime_mark_last_busy(ddev->dev); in amdgpu_pci_probe()
2473 pm_runtime_put_autosuspend(ddev->dev); in amdgpu_pci_probe()
2480 * - put ASIC into BACO state only when both video and in amdgpu_pci_probe()
2482 * - pull ASIC out of BACO state when either video or in amdgpu_pci_probe()
2489 * be no PMFW-aware D-state transition(D0->D3) on runpm in amdgpu_pci_probe()
2490 * suspend. Thus the BACO will be not correctly kicked in. in amdgpu_pci_probe()
2493 * into D0 state. Then there will be a PMFW-aware D-state in amdgpu_pci_probe()
2494 * transition(D0->D3) on runpm suspend. in amdgpu_pci_probe()
2497 !(adev->flags & AMD_IS_APU) && in amdgpu_pci_probe()
2498 adev->asic_type >= CHIP_NAVI10) in amdgpu_pci_probe()
2520 if (adev->pm.rpm_mode != AMDGPU_RUNPM_NONE) { in amdgpu_pci_remove()
2521 pm_runtime_get_sync(dev->dev); in amdgpu_pci_remove()
2522 pm_runtime_forbid(dev->dev); in amdgpu_pci_remove()
2546 if (adev->in_s4 && adev->in_suspend) in amdgpu_pci_shutdown()
2555 adev->mp1_state = PP_MP1_STATE_UNLOAD; in amdgpu_pci_shutdown()
2557 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pci_shutdown()
2566 if (adev->in_s4 && adev->in_suspend) in amdgpu_pmops_prepare()
2576 * then skip suspend in amdgpu_pmops_prepare()
2596 adev->in_s0ix = true; in amdgpu_pmops_suspend()
2598 adev->in_s3 = true; in amdgpu_pmops_suspend()
2599 if (!adev->in_s0ix && !adev->in_s3) { in amdgpu_pmops_suspend()
2601 if (adev->last_suspend_state != PM_SUSPEND_ON && in amdgpu_pmops_suspend()
2602 adev->last_suspend_state != pm_suspend_target_state) { in amdgpu_pmops_suspend()
2603 drm_err_once(drm_dev, "Unsupported suspend state %d\n", in amdgpu_pmops_suspend()
2605 return -EINVAL; in amdgpu_pmops_suspend()
2610 /* cache the state last used for suspend */ in amdgpu_pmops_suspend()
2611 adev->last_suspend_state = pm_suspend_target_state; in amdgpu_pmops_suspend()
2633 if (!adev->in_s0ix && !adev->in_s3) in amdgpu_pmops_resume()
2637 if (!pci_device_is_present(adev->pdev)) in amdgpu_pmops_resume()
2638 adev->no_hw_access = true; in amdgpu_pmops_resume()
2642 adev->in_s0ix = false; in amdgpu_pmops_resume()
2644 adev->in_s3 = false; in amdgpu_pmops_resume()
2680 if (adev->in_s4 && adev->in_suspend) in amdgpu_pmops_poweroff()
2699 if (adev->mode_info.num_crtc) { in amdgpu_runtime_idle_check_display()
2704 if (amdgpu_runtime_pm != -2) { in amdgpu_runtime_idle_check_display()
2708 * the GPU was in suspend. Remove this once that is fixed. in amdgpu_runtime_idle_check_display()
2710 mutex_lock(&drm_dev->mode_config.mutex); in amdgpu_runtime_idle_check_display()
2713 if (list_connector->status == connector_status_connected) { in amdgpu_runtime_idle_check_display()
2714 ret = -EBUSY; in amdgpu_runtime_idle_check_display()
2719 mutex_unlock(&drm_dev->mode_config.mutex); in amdgpu_runtime_idle_check_display()
2725 if (adev->dc_enabled) { in amdgpu_runtime_idle_check_display()
2729 drm_modeset_lock(&crtc->mutex, NULL); in amdgpu_runtime_idle_check_display()
2730 if (crtc->state->active) in amdgpu_runtime_idle_check_display()
2731 ret = -EBUSY; in amdgpu_runtime_idle_check_display()
2732 drm_modeset_unlock(&crtc->mutex); in amdgpu_runtime_idle_check_display()
2737 mutex_lock(&drm_dev->mode_config.mutex); in amdgpu_runtime_idle_check_display()
2738 drm_modeset_lock(&drm_dev->mode_config.connection_mutex, NULL); in amdgpu_runtime_idle_check_display()
2742 if (list_connector->dpms == DRM_MODE_DPMS_ON) { in amdgpu_runtime_idle_check_display()
2743 ret = -EBUSY; in amdgpu_runtime_idle_check_display()
2750 drm_modeset_unlock(&drm_dev->mode_config.connection_mutex); in amdgpu_runtime_idle_check_display()
2751 mutex_unlock(&drm_dev->mode_config.mutex); in amdgpu_runtime_idle_check_display()
2770 mutex_lock(&adev->userq_mutex); in amdgpu_runtime_idle_check_userq()
2771 list_for_each_entry_safe(uqm, tmp, &adev->userq_mgr_list, list) { in amdgpu_runtime_idle_check_userq()
2772 idr_for_each_entry(&uqm->userq_idr, queue, queue_id) { in amdgpu_runtime_idle_check_userq()
2773 ret = -EBUSY; in amdgpu_runtime_idle_check_userq()
2778 mutex_unlock(&adev->userq_mutex); in amdgpu_runtime_idle_check_userq()
2790 if (adev->pm.rpm_mode == AMDGPU_RUNPM_NONE) { in amdgpu_pmops_runtime_suspend()
2792 return -EBUSY; in amdgpu_pmops_runtime_suspend()
2804 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_pmops_runtime_suspend()
2806 if (ring && ring->sched.ready) { in amdgpu_pmops_runtime_suspend()
2809 return -EBUSY; in amdgpu_pmops_runtime_suspend()
2813 adev->in_runpm = true; in amdgpu_pmops_runtime_suspend()
2814 if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) in amdgpu_pmops_runtime_suspend()
2815 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; in amdgpu_pmops_runtime_suspend()
2824 if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) in amdgpu_pmops_runtime_suspend()
2825 adev->mp1_state = PP_MP1_STATE_UNLOAD; in amdgpu_pmops_runtime_suspend()
2832 adev->in_runpm = false; in amdgpu_pmops_runtime_suspend()
2833 if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) in amdgpu_pmops_runtime_suspend()
2834 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pmops_runtime_suspend()
2838 if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) in amdgpu_pmops_runtime_suspend()
2839 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pmops_runtime_suspend()
2841 if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) { in amdgpu_pmops_runtime_suspend()
2849 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; in amdgpu_pmops_runtime_suspend()
2850 } else if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) { in amdgpu_pmops_runtime_suspend()
2852 } else if ((adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) || in amdgpu_pmops_runtime_suspend()
2853 (adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO)) { in amdgpu_pmops_runtime_suspend()
2857 dev_dbg(&pdev->dev, "asic/device is runtime suspended\n"); in amdgpu_pmops_runtime_suspend()
2869 if (adev->pm.rpm_mode == AMDGPU_RUNPM_NONE) in amdgpu_pmops_runtime_resume()
2870 return -EINVAL; in amdgpu_pmops_runtime_resume()
2873 if (!pci_device_is_present(adev->pdev)) in amdgpu_pmops_runtime_resume()
2874 adev->no_hw_access = true; in amdgpu_pmops_runtime_resume()
2876 if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) { in amdgpu_pmops_runtime_resume()
2877 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; in amdgpu_pmops_runtime_resume()
2888 } else if (adev->pm.rpm_mode == AMDGPU_RUNPM_BOCO) { in amdgpu_pmops_runtime_resume()
2893 } else if ((adev->pm.rpm_mode == AMDGPU_RUNPM_BACO) || in amdgpu_pmops_runtime_resume()
2894 (adev->pm.rpm_mode == AMDGPU_RUNPM_BAMACO)) { in amdgpu_pmops_runtime_resume()
2899 if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) in amdgpu_pmops_runtime_resume()
2904 if (adev->pm.rpm_mode == AMDGPU_RUNPM_PX) in amdgpu_pmops_runtime_resume()
2905 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; in amdgpu_pmops_runtime_resume()
2906 adev->in_runpm = false; in amdgpu_pmops_runtime_resume()
2916 if (adev->pm.rpm_mode == AMDGPU_RUNPM_NONE) { in amdgpu_pmops_runtime_idle()
2918 return -EBUSY; in amdgpu_pmops_runtime_idle()
2934 struct drm_file *file_priv = filp->private_data; in amdgpu_drm_release()
2935 struct amdgpu_fpriv *fpriv = file_priv->driver_priv; in amdgpu_drm_release()
2938 fpriv->evf_mgr.fd_closing = true; in amdgpu_drm_release()
2939 amdgpu_eviction_fence_destroy(&fpriv->evf_mgr); in amdgpu_drm_release()
2940 amdgpu_userq_mgr_fini(&fpriv->userq_mgr); in amdgpu_drm_release()
2949 struct drm_file *file_priv = filp->private_data; in amdgpu_drm_ioctl()
2953 dev = file_priv->minor->dev; in amdgpu_drm_ioctl()
2954 ret = pm_runtime_get_sync(dev->dev); in amdgpu_drm_ioctl()
2960 pm_runtime_mark_last_busy(dev->dev); in amdgpu_drm_ioctl()
2962 pm_runtime_put_autosuspend(dev->dev); in amdgpu_drm_ioctl()
2969 .suspend = amdgpu_pmops_suspend,
2983 struct drm_file *file_priv = f->private_data; in amdgpu_flush()
2984 struct amdgpu_fpriv *fpriv = file_priv->driver_priv; in amdgpu_flush()
2987 timeout = amdgpu_ctx_mgr_entity_flush(&fpriv->ctx_mgr, timeout); in amdgpu_flush()
2988 timeout = amdgpu_vm_wait_idle(&fpriv->vm, timeout); in amdgpu_flush()
3016 return -EINVAL; in amdgpu_file_to_fpriv()
3018 if (filp->f_op != &amdgpu_driver_kms_fops) in amdgpu_file_to_fpriv()
3019 return -EINVAL; in amdgpu_file_to_fpriv()
3021 file = filp->private_data; in amdgpu_file_to_fpriv()
3022 *fpriv = file->driver_priv; in amdgpu_file_to_fpriv()
3150 /* let modprobe override vga console setting */ in amdgpu_init()