60  * - 3.0.0 - initial driver
61  * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
62  * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
64  * - 3.3.0 - Add VM support for UVD on supported hardware.
65  * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
66  * - 3.5.0 - Add support for new UVD_NO_OP register.
67  * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
68  * - 3.7.0 - Add support for VCE clock list packet
69  * - 3.8.0 - Add support raster config init in the kernel
70  * - 3.9.0 - Add support for memory query info about VRAM and GTT.
71  * - 3.10.0 - Add support for new fences ioctl, new gem ioctl flags
72  * - 3.11.0 - Add support for sensor query info (clocks, temp, etc).
73  * - 3.12.0 - Add query for double offchip LDS buffers
74  * - 3.13.0 - Add PRT support
75  * - 3.14.0 - Fix race in amdgpu_ctx_get_fence() and note new functionality
76  * - 3.15.0 - Export more gpu info for gfx9
77  * - 3.16.0 - Add reserved vmid support
78  * - 3.17.0 - Add AMDGPU_NUM_VRAM_CPU_PAGE_FAULTS.
79  * - 3.18.0 - Export gpu always on cu bitmap
80  * - 3.19.0 - Add support for UVD MJPEG decode
81  * - 3.20.0 - Add support for local BOs
82  * - 3.21.0 - Add DRM_AMDGPU_FENCE_TO_HANDLE ioctl
83  * - 3.22.0 - Add DRM_AMDGPU_SCHED ioctl
84  * - 3.23.0 - Add query for VRAM lost counter
85  * - 3.24.0 - Add high priority compute support for gfx9
86  * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
87  * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE.
88  * - 3.27.0 - Add new chunk to AMDGPU_CS to enable BO_LIST creation.
89  * - 3.28.0 - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
90  * - 3.29.0 - Add AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID
91  * - 3.30.0 - Add AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE.
92  * - 3.31.0 - Add support for per-flip tiling attribute changes with DC
93  * - 3.32.0 - Add syncobj timeline support to AMDGPU_CS.
94  * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS.
95  * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
96  * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
97  * - 3.36.0 - Allow reading more status registers on si/cik
98  * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
99  * - 3.38.0 - Add AMDGPU_IB_FLAG_EMIT_MEM_SYNC
100  * - 3.39.0 - DMABUF implicit sync does a full pipeline sync
101  * - 3.40.0 - Add AMDGPU_IDS_FLAGS_TMZ
102  * - 3.41.0 - Add video codec query
103  * - 3.42.0 - Add 16bpc fixed point display support
104  * - 3.43.0 - Add device hot plug/unplug support
105  * - 3.44.0 - DCN3 supports DCC independent block settings: !64B && 128B, 64B && 128B
106  * - 3.45.0 - Add context ioctl stable pstate interface
107  * - 3.46.0 - To enable hot plug amdgpu tests in libdrm
108  * - 3.47.0 - Add AMDGPU_GEM_CREATE_DISCARDABLE and AMDGPU_VM_NOALLOC flags
109  * - 3.48.0 - Add IP discovery version info to HW INFO
110  * - 3.49.0 - Add gang submit into CS IOCTL
111  * - 3.50.0 - Update AMDGPU_INFO_DEV_INFO IOCTL for minimum engine and memory clock
113  *   3.51.0 - Return the PCIe gen and lanes from the INFO ioctl
114  *   3.52.0 - Add AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD, add device_info fields:
117  *   3.53.0 - Support for GFX11 CP GFX shadowing
118  *   3.54.0 - Add AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS support
119  * - 3.55.0 - Add AMDGPU_INFO_GPUVM_FAULT query
120  * - 3.56.0 - Update IB start address and size alignment for decode and encode
121  * - 3.57.0 - Compute tunneling on GFX10+
122  * - 3.58.0 - Add GFX12 DCC support
123  * - 3.59.0 - Cleared VRAM
124  * - 3.60.0 - Add AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE (Vulkan requirement)
125  * - 3.61.0 - Contains fix for RV/PCO compute queues
126  * - 3.62.0 - Add AMDGPU_IDS_FLAGS_MODE_PF, AMDGPU_IDS_FLAGS_MODE_VF & AMDGPU_IDS_FLAGS_MODE_PT
127  * - 3.63.0 - GFX12 display DCC supports 256B max compressed block size
128  * - 3.64.0 - Userq IP support query
132 #define KMS_DRIVER_PATCHLEVEL	0
138 	AMDGPU_DEBUG_VM = BIT(0),
165 uint amdgpu_ip_block_mask = 0xffffffff;
179 u64 amdgpu_cg_mask = 0xffffffffffffffff;
180 uint amdgpu_pg_mask = 0xffffffff;
200 uint amdgpu_pp_feature_mask = 0xfff7bfff;
209  * FBC (bit 0) disabled by default
225 int amdgpu_mes_log_enable = 0;
249 DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
265 uint amdgpu_ras_mask = 0xffffffff;
269 	.period = 0x0, /* default to 0x0 (timeout disable) */
274  * Restrict the total amount of VRAM in MiB for testing.  The default is 0 (Use full VRAM).
281 …* Restrict the amount of CPU visible VRAM in MiB for testing.  The default is 0 (Use full CPU visi…
307 MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disa…
312 …* Set HDMI/DPAudio. Only affects non-DC display handling. The default is -1 (Enabled), set 0 to di…
314 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
319 …lay Priority (1 = normal, 2 = high). Only affects non-DC display handling. The default is 0 (auto).
321 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
326  * To enable hw i2c engine. Only affects non-DC display handling. The default is 0 (Disabled).
328 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
333  * To disable PCIE Gen2/3 mode (0 = disable, 1 = enable). The default is -1 (auto, enabled).
335 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
340 …* To disable Message Signaled Interrupts (MSI) functionality (1 = enable, 0 = disable). The defaul…
342 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
357  * multiple values specified. 0 and negative values are invalidated. They will be adjusted
369 …"0: keep default value. negative: infinity timeout), format: for bare metal [Non-Compute] or [GFX,…
376  * (0 = disable, 1 = enable)
379 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
385  * Set to 0 to force direct loading if supported by the ASIC.  Set
389 …lc backdoor autoload if supported, 2 = smu load if supported, 1 = psp load, 0 = force direct if su…
394  * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto, enabled).
396 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
403  * Setting the value to 0 disables this functionality.
406 MODULE_PARM_DESC(runpm, "PX runtime pm (2 = force enable with BAMACO, 1 = force enable with BACO, 0…
414 …* the kernel log for the list of IPs on the asic. The default is 0xffffffff (enable all blocks on …
421 …wer Management (BAPM) used to dynamically share TDP between CPU and GPU. Set value 0 to disable it.
424 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
429 …* Set 1 to enable Deep Color support. Only affects non-DC display handling. The default is 0 (disa…
431 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
457 …* Stop on VM fault for debugging (0 = never, 1 = print first, 2 = always). The default is 0 (No st…
459 MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always…
464 …* Override VM update mode. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only…
465 …* is -1 (Only in large BAR(LB) systems Compute VM tables will be updated by CPU, otherwise 0, neve…
467 MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never (default except for large BAR(LB))…
472  * Enable experimental hw support (1 = enable). The default is 0 (disabled).
474 MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");
479 …* Disable/Enable Display Core driver for debugging (1 = enable, 0 = disable). The default is -1 (a…
481 MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");
517  * The default is 0 (automatic for each asic).
519 MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");
525  * The default is 0 (automatic for each asic).
527 MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
532 …* Override Clockgating features enabled on GPU (0 = disable clock gating). See the AMD_CG_SUPPORT …
533  * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffffffffffff (all enabled).
535 MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");
540 …* Override Powergating features enabled on GPU (0 = disable power gating). See the AMD_PG_SUPPORT …
541  * drivers/gpu/drm/amd/include/amd_shared.h. The default is 0xffffffff (all enabled).
543 MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
548 …* Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change). The default i…
550 MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GPU clock cycles, 0 =…
573 …* Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). The default is -1 (au…
575 MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)…
578 MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 …
583 …* Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disable…
585 MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)…
590 …nable emulation mode. This is only needed when running on an emulator. The default is 0 (disabled).
592 MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");
597  * Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (default))
599 MODULE_PARM_DESC(ras_enable, "Enable RAS features on the GPU (0 = disable, 1 = enable, -1 = auto (d…
604  * Mask of RAS features to enable (default 0xffffffff), only valid when ras_enable == 1
607 MODULE_PARM_DESC(ras_mask, "Mask of RAS features to enable (default 0xffffffff), only valid when ra…
621 MODULE_PARM_DESC(timeout_period, "watchdog timeout period (0 = timeout disabled, 1 ~ 0x23 = timeout…
627 …* set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using r…
634 MODULE_PARM_DESC(si_support, "SI support (1 = enabled, 0 = disabled (default))");
637 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
646 …* set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using r…
653 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled, 0 = disabled (default))");
656 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
664 …* It is used to reserve gtt for smu debug usage, setting value 0 to disable it. The actual size is…
665  * E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).
668 …"reserve gtt for smu debug usage, 0 = disable,0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 =…
676 …either different priorities (HP3D ring and LP3D ring), or equal priorities (0 = disabled, 1 = enab…
681 …* It is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default…
684 	"Enable Mid-command buffer preemption (0 = disabled, 1 = enabled), -1 = auto (default)");
690  * (-1 = auto (default), 0 = disabled, 1 = enabled, 2 = use ip_discovery table from file)
699  * (0 = disabled (default), 1 = enabled)
702 	"Enable Micro Engine Scheduler (0 = disabled (default), 1 = enabled)");
708  * (0 = disabled (default), 1 = enabled)
711 	"Enable Micro Engine Scheduler log (0 = disabled (default), 1 = enabled)");
717  * (0 = disabled (default), 1 = enabled)
720 	"Enable Micro Engine Scheduler KIQ (0 = disabled (default), 1 = enabled)");
726  * (0 = disabled (default), 1 = enabled)
729 	"Enable Unified Micro Engine Scheduler (0 = disabled, 1 = enabled(default)");
736  * (0 = retry enabled, 1 = retry disabled, -1 auto (default))
739 	"Disable retry faults (0 = retry enabled, 1 = retry disabled, -1 auto (default))");
752  * Enables/disables XGMI P2P interface (0 = disable, 1 = enable).
755 	"Enable XGMI P2P interface (0 = disable; 1 = enable (default))");
769 …"Scheduling policy (0 = HWS (Default), 1 = HWS without over-subscription, 2 = Non-HWS (Used for de…
779 …"Max # processes HWS can execute concurrently when sched_policy=0 (0 = no concurrency, #VMIDs for …
784  * the middle of a compute wave. Default is 1 to enable this feature. Setting 0
789 MODULE_PARM_DESC(cwsr_enable, "CWSR enable (0 = Off, 1 = On (Default))");
809 	"Send sigterm to HSA process on unhandled exception (0 = disable, 1 = enable)");
813  * Halt if HWS hang is detected. Default value, 0, disables the halt on hang.
818 MODULE_PARM_DESC(halt_if_hws_hang, "Halt if HWS hang is detected (0 = off (default), 1 = on)");
855 … to keep the wavefront context for debugging (0 = queue eviction, 1 = no queue eviction). The defa…
858 MODULE_PARM_DESC(no_queue_eviction_on_vm_fault, "No queue eviction on VM fault (0 = queue eviction,…
866 MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (0 = MTYPE_RW (default), 1 = MTYPE_NC, 2 = MT…
894 MODULE_PARM_DESC(visualconfirm, "Visual confirm (0 = off (default), 1 = MPO, 5 = PSR)");
901  * Valid levels are 0-4. A value of 0 indicates that ABM should be disabled by
911 		 "ABM level (0 = off, 1-4 = backlight reduction level, -1 auto (default))");
915 MODULE_PARM_DESC(backlight, "Backlight control (0 = pwm, 1 = aux, -1 auto (default))");
927 		 "Damage clips support (0 = disable, 1 = enable, -1 auto (default))");
935  * The default value: 0 (off).  TODO: change to auto till it is completed.
937 MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto (default), 0 = off, 1 = on)");
959  * The default value: 0 (off).
963 	"Enable freesync modesetting optimization feature (0 = off (default), 1 = on)");
968  * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco)
970 MODULE_PARM_DESC(reset_method, "GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = m…
979 …-1 = ignore threshold (default value), 0 = disable bad page retirement, -2 = threshold determined …
982 …l compute queue user want to setup (8 if set to greater than 8 or less than 0, only affect gfx 8+)…
989 MODULE_PARM_DESC(vcnfw_log, "Enable vcnfw log(0 = disable (default value), 1 = enable)");
995  * This option is only relevant on APUs.  Set this option to 0 to disable
999 MODULE_PARM_DESC(sg_display, "S/G Display (-1 = auto (default), 0 = disable)");
1005  * (0 = disabled (default), 1 = enabled)
1008 	"Enable Multi Media User Mode Scheduler (0 = disabled (default), 1 = enabled)");
1015 MODULE_PARM_DESC(umsch_mm_fwlog, "Enable umschfw log(0 = disable (default value), 1 = enable)");
1020  * Used to override pptable id. id = 0 use VBIOS pptable.
1021  * id > 0 use the soft pptable with specicfied id.
1024 …"specify pptable id to be used (-1 = auto(default) value, 0 = use pptable from vbios, > 0 = soft p…
1034 						0 = AMDGPU_SPX_PARTITION_MODE, \
1045  * (-1 = auto, 0 = disable, 1 = enable, 2 = enable legacy mode, 3 = enable without cleaner shader)
1049 "enforce process isolation between graphics and compute. (-1 = auto, 0 = disable, 1 = enable, 2 = e…
1062 MODULE_PARM_DESC(seamless, "Seamless boot (-1 = auto (default), 0 = disable, 1 = enable)");
1069  * - 0x1: Debug VM handling
1070  * - 0x2: Enable simulating large-bar capability on non-large bar system. This
1073  * - 0x4: Disable GPU soft recovery, always do a full reset
1074  * - 0x8: Use VRAM for firmware loading
1075  * - 0x10: Enable ACA based RAS logging
1076  * - 0x20: Enable experimental resets
1077  * - 0x40: Disable ring resets
1078  * - 0x80: Use VRAM for SMU pool
1089 MODULE_PARM_DESC(agp, "AGP (-1 = auto (default), 0 = disable, 1 = enable)");
1102  * (0 = disabled, 1 = enabled, -1 = auto (default setting, will be enabled if supported))
1105 	"Enable Wifi RFI interference mitigation (0 = disabled, 1 = enabled, -1 = auto(default)");
1115 MODULE_PARM_DESC(rebar, "Resizable BAR (-1 = auto (default), 0 = disable, 1 = enable)");
1123  * -  0 = user queues disabled
1127 MODULE_PARM_DESC(user_queue, "Enable user queues (-1 = auto (default), 0 = disable, 1 = enable, 2 =…
1135 	0x4354,
1136 	0x4358,
1137 	0x4554,
1138 	0x4742,
1139 	0x4744,
1140 	0x4749,
1141 	0x474C,
1142 	0x474D,
1143 	0x474E,
1144 	0x474F,
1145 	0x4750,
1146 	0x4751,
1147 	0x4752,
1148 	0x4753,
1149 	0x4754,
1150 	0x4755,
1151 	0x4756,
1152 	0x4757,
1153 	0x4758,
1154 	0x4759,
1155 	0x475A,
1156 	0x4C42,
1157 	0x4C44,
1158 	0x4C47,
1159 	0x4C49,
1160 	0x4C4D,
1161 	0x4C4E,
1162 	0x4C50,
1163 	0x4C51,
1164 	0x4C52,
1165 	0x4C53,
1166 	0x5654,
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1168 	0x5656,
1170 	0x4c45,
1171 	0x4c46,
1172 	0x4d46,
1173 	0x4d4c,
1174 	0x5041,
1175 	0x5042,
1176 	0x5043,
1177 	0x5044,
1178 	0x5045,
1179 	0x5046,
1180 	0x5047,
1181 	0x5048,
1182 	0x5049,
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1184 	0x504B,
1185 	0x504C,
1186 	0x504D,
1187 	0x504E,
1188 	0x504F,
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1190 	0x5051,
1191 	0x5052,
1192 	0x5053,
1193 	0x5054,
1194 	0x5055,
1195 	0x5056,
1196 	0x5057,
1197 	0x5058,
1198 	0x5245,
1199 	0x5246,
1200 	0x5247,
1201 	0x524b,
1202 	0x524c,
1203 	0x534d,
1204 	0x5446,
1205 	0x544C,
1206 	0x5452,
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1209 	0x3151,
1210 	0x3152,
1211 	0x3154,
1212 	0x3155,
1213 	0x3E50,
1214 	0x3E54,
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1222 	0x4149,
1223 	0x414A,
1224 	0x414B,
1225 	0x4150,
1226 	0x4151,
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1228 	0x4153,
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1230 	0x4155,
1231 	0x4156,
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1233 	0x4242,
1234 	0x4336,
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1236 	0x4437,
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1238 	0x4967,
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1243 	0x4A4C,
1244 	0x4A4D,
1245 	0x4A4E,
1246 	0x4A4F,
1247 	0x4A50,
1248 	0x4A54,
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1251 	0x4B4A,
1252 	0x4B4B,
1253 	0x4B4C,
1254 	0x4C57,
1255 	0x4C58,
1256 	0x4C59,
1257 	0x4C5A,
1258 	0x4C64,
1259 	0x4C66,
1260 	0x4C67,
1261 	0x4E44,
1262 	0x4E45,
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1264 	0x4E47,
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1266 	0x4E49,
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1268 	0x4E4B,
1269 	0x4E50,
1270 	0x4E51,
1271 	0x4E52,
1272 	0x4E53,
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1274 	0x4E56,
1275 	0x5144,
1276 	0x5145,
1277 	0x5146,
1278 	0x5147,
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1280 	0x514C,
1281 	0x514D,
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1284 	0x5159,
1285 	0x515A,
1286 	0x515E,
1287 	0x5460,
1288 	0x5462,
1289 	0x5464,
1290 	0x5548,
1291 	0x5549,
1292 	0x554A,
1293 	0x554B,
1294 	0x554C,
1295 	0x554D,
1296 	0x554E,
1297 	0x554F,
1298 	0x5550,
1299 	0x5551,
1300 	0x5552,
1301 	0x5554,
1302 	0x564A,
1303 	0x564B,
1304 	0x564F,
1305 	0x5652,
1306 	0x5653,
1307 	0x5657,
1308 	0x5834,
1309 	0x5835,
1310 	0x5954,
1311 	0x5955,
1312 	0x5974,
1313 	0x5975,
1314 	0x5960,
1315 	0x5961,
1316 	0x5962,
1317 	0x5964,
1318 	0x5965,
1319 	0x5969,
1320 	0x5a41,
1321 	0x5a42,
1322 	0x5a61,
1323 	0x5a62,
1324 	0x5b60,
1325 	0x5b62,
1326 	0x5b63,
1327 	0x5b64,
1328 	0x5b65,
1329 	0x5c61,
1330 	0x5c63,
1331 	0x5d48,
1332 	0x5d49,
1333 	0x5d4a,
1334 	0x5d4c,
1335 	0x5d4d,
1336 	0x5d4e,
1337 	0x5d4f,
1338 	0x5d50,
1339 	0x5d52,
1340 	0x5d57,
1341 	0x5e48,
1342 	0x5e4a,
1343 	0x5e4b,
1344 	0x5e4c,
1345 	0x5e4d,
1346 	0x5e4f,
1347 	0x6700,
1348 	0x6701,
1349 	0x6702,
1350 	0x6703,
1351 	0x6704,
1352 	0x6705,
1353 	0x6706,
1354 	0x6707,
1355 	0x6708,
1356 	0x6709,
1357 	0x6718,
1358 	0x6719,
1359 	0x671c,
1360 	0x671d,
1361 	0x671f,
1362 	0x6720,
1363 	0x6721,
1364 	0x6722,
1365 	0x6723,
1366 	0x6724,
1367 	0x6725,
1368 	0x6726,
1369 	0x6727,
1370 	0x6728,
1371 	0x6729,
1372 	0x6738,
1373 	0x6739,
1374 	0x673e,
1375 	0x6740,
1376 	0x6741,
1377 	0x6742,
1378 	0x6743,
1379 	0x6744,
1380 	0x6745,
1381 	0x6746,
1382 	0x6747,
1383 	0x6748,
1384 	0x6749,
1385 	0x674A,
1386 	0x6750,
1387 	0x6751,
1388 	0x6758,
1389 	0x6759,
1390 	0x675B,
1391 	0x675D,
1392 	0x675F,
1393 	0x6760,
1394 	0x6761,
1395 	0x6762,
1396 	0x6763,
1397 	0x6764,
1398 	0x6765,
1399 	0x6766,
1400 	0x6767,
1401 	0x6768,
1402 	0x6770,
1403 	0x6771,
1404 	0x6772,
1405 	0x6778,
1406 	0x6779,
1407 	0x677B,
1408 	0x6840,
1409 	0x6841,
1410 	0x6842,
1411 	0x6843,
1412 	0x6849,
1413 	0x684C,
1414 	0x6850,
1415 	0x6858,
1416 	0x6859,
1417 	0x6880,
1418 	0x6888,
1419 	0x6889,
1420 	0x688A,
1421 	0x688C,
1422 	0x688D,
1423 	0x6898,
1424 	0x6899,
1425 	0x689b,
1426 	0x689c,
1427 	0x689d,
1428 	0x689e,
1429 	0x68a0,
1430 	0x68a1,
1431 	0x68a8,
1432 	0x68a9,
1433 	0x68b0,
1434 	0x68b8,
1435 	0x68b9,
1436 	0x68ba,
1437 	0x68be,
1438 	0x68bf,
1439 	0x68c0,
1440 	0x68c1,
1441 	0x68c7,
1442 	0x68c8,
1443 	0x68c9,
1444 	0x68d8,
1445 	0x68d9,
1446 	0x68da,
1447 	0x68de,
1448 	0x68e0,
1449 	0x68e1,
1450 	0x68e4,
1451 	0x68e5,
1452 	0x68e8,
1453 	0x68e9,
1454 	0x68f1,
1455 	0x68f2,
1456 	0x68f8,
1457 	0x68f9,
1458 	0x68fa,
1459 	0x68fe,
1460 	0x7100,
1461 	0x7101,
1462 	0x7102,
1463 	0x7103,
1464 	0x7104,
1465 	0x7105,
1466 	0x7106,
1467 	0x7108,
1468 	0x7109,
1469 	0x710A,
1470 	0x710B,
1471 	0x710C,
1472 	0x710E,
1473 	0x710F,
1474 	0x7140,
1475 	0x7141,
1476 	0x7142,
1477 	0x7143,
1478 	0x7144,
1479 	0x7145,
1480 	0x7146,
1481 	0x7147,
1482 	0x7149,
1483 	0x714A,
1484 	0x714B,
1485 	0x714C,
1486 	0x714D,
1487 	0x714E,
1488 	0x714F,
1489 	0x7151,
1490 	0x7152,
1491 	0x7153,
1492 	0x715E,
1493 	0x715F,
1494 	0x7180,
1495 	0x7181,
1496 	0x7183,
1497 	0x7186,
1498 	0x7187,
1499 	0x7188,
1500 	0x718A,
1501 	0x718B,
1502 	0x718C,
1503 	0x718D,
1504 	0x718F,
1505 	0x7193,
1506 	0x7196,
1507 	0x719B,
1508 	0x719F,
1509 	0x71C0,
1510 	0x71C1,
1511 	0x71C2,
1512 	0x71C3,
1513 	0x71C4,
1514 	0x71C5,
1515 	0x71C6,
1516 	0x71C7,
1517 	0x71CD,
1518 	0x71CE,
1519 	0x71D2,
1520 	0x71D4,
1521 	0x71D5,
1522 	0x71D6,
1523 	0x71DA,
1524 	0x71DE,
1525 	0x7200,
1526 	0x7210,
1527 	0x7211,
1528 	0x7240,
1529 	0x7243,
1530 	0x7244,
1531 	0x7245,
1532 	0x7246,
1533 	0x7247,
1534 	0x7248,
1535 	0x7249,
1536 	0x724A,
1537 	0x724B,
1538 	0x724C,
1539 	0x724D,
1540 	0x724E,
1541 	0x724F,
1542 	0x7280,
1543 	0x7281,
1544 	0x7283,
1545 	0x7284,
1546 	0x7287,
1547 	0x7288,
1548 	0x7289,
1549 	0x728B,
1550 	0x728C,
1551 	0x7290,
1552 	0x7291,
1553 	0x7293,
1554 	0x7297,
1555 	0x7834,
1556 	0x7835,
1557 	0x791e,
1558 	0x791f,
1559 	0x793f,
1560 	0x7941,
1561 	0x7942,
1562 	0x796c,
1563 	0x796d,
1564 	0x796e,
1565 	0x796f,
1566 	0x9400,
1567 	0x9401,
1568 	0x9402,
1569 	0x9403,
1570 	0x9405,
1571 	0x940A,
1572 	0x940B,
1573 	0x940F,
1574 	0x94A0,
1575 	0x94A1,
1576 	0x94A3,
1577 	0x94B1,
1578 	0x94B3,
1579 	0x94B4,
1580 	0x94B5,
1581 	0x94B9,
1582 	0x9440,
1583 	0x9441,
1584 	0x9442,
1585 	0x9443,
1586 	0x9444,
1587 	0x9446,
1588 	0x944A,
1589 	0x944B,
1590 	0x944C,
1591 	0x944E,
1592 	0x9450,
1593 	0x9452,
1594 	0x9456,
1595 	0x945A,
1596 	0x945B,
1597 	0x945E,
1598 	0x9460,
1599 	0x9462,
1600 	0x946A,
1601 	0x946B,
1602 	0x947A,
1603 	0x947B,
1604 	0x9480,
1605 	0x9487,
1606 	0x9488,
1607 	0x9489,
1608 	0x948A,
1609 	0x948F,
1610 	0x9490,
1611 	0x9491,
1612 	0x9495,
1613 	0x9498,
1614 	0x949C,
1615 	0x949E,
1616 	0x949F,
1617 	0x94C0,
1618 	0x94C1,
1619 	0x94C3,
1620 	0x94C4,
1621 	0x94C5,
1622 	0x94C6,
1623 	0x94C7,
1624 	0x94C8,
1625 	0x94C9,
1626 	0x94CB,
1627 	0x94CC,
1628 	0x94CD,
1629 	0x9500,
1630 	0x9501,
1631 	0x9504,
1632 	0x9505,
1633 	0x9506,
1634 	0x9507,
1635 	0x9508,
1636 	0x9509,
1637 	0x950F,
1638 	0x9511,
1639 	0x9515,
1640 	0x9517,
1641 	0x9519,
1642 	0x9540,
1643 	0x9541,
1644 	0x9542,
1645 	0x954E,
1646 	0x954F,
1647 	0x9552,
1648 	0x9553,
1649 	0x9555,
1650 	0x9557,
1651 	0x955f,
1652 	0x9580,
1653 	0x9581,
1654 	0x9583,
1655 	0x9586,
1656 	0x9587,
1657 	0x9588,
1658 	0x9589,
1659 	0x958A,
1660 	0x958B,
1661 	0x958C,
1662 	0x958D,
1663 	0x958E,
1664 	0x958F,
1665 	0x9590,
1666 	0x9591,
1667 	0x9593,
1668 	0x9595,
1669 	0x9596,
1670 	0x9597,
1671 	0x9598,
1672 	0x9599,
1673 	0x959B,
1674 	0x95C0,
1675 	0x95C2,
1676 	0x95C4,
1677 	0x95C5,
1678 	0x95C6,
1679 	0x95C7,
1680 	0x95C9,
1681 	0x95CC,
1682 	0x95CD,
1683 	0x95CE,
1684 	0x95CF,
1685 	0x9610,
1686 	0x9611,
1687 	0x9612,
1688 	0x9613,
1689 	0x9614,
1690 	0x9615,
1691 	0x9616,
1692 	0x9640,
1693 	0x9641,
1694 	0x9642,
1695 	0x9643,
1696 	0x9644,
1697 	0x9645,
1698 	0x9647,
1699 	0x9648,
1700 	0x9649,
1701 	0x964a,
1702 	0x964b,
1703 	0x964c,
1704 	0x964e,
1705 	0x964f,
1706 	0x9710,
1707 	0x9711,
1708 	0x9712,
1709 	0x9713,
1710 	0x9714,
1711 	0x9715,
1712 	0x9802,
1713 	0x9803,
1714 	0x9804,
1715 	0x9805,
1716 	0x9806,
1717 	0x9807,
1718 	0x9808,
1719 	0x9809,
1720 	0x980A,
1721 	0x9900,
1722 	0x9901,
1723 	0x9903,
1724 	0x9904,
1725 	0x9905,
1726 	0x9906,
1727 	0x9907,
1728 	0x9908,
1729 	0x9909,
1730 	0x990A,
1731 	0x990B,
1732 	0x990C,
1733 	0x990D,
1734 	0x990E,
1735 	0x990F,
1736 	0x9910,
1737 	0x9913,
1738 	0x9917,
1739 	0x9918,
1740 	0x9919,
1741 	0x9990,
1742 	0x9991,
1743 	0x9992,
1744 	0x9993,
1745 	0x9994,
1746 	0x9995,
1747 	0x9996,
1748 	0x9997,
1749 	0x9998,
1750 	0x9999,
1751 	0x999A,
1752 	0x999B,
1753 	0x999C,
1754 	0x999D,
1755 	0x99A0,
1756 	0x99A2,
1757 	0x99A4,
1759 	0x3171,
1760 	0x3e70,
1761 	0x4164,
1762 	0x4165,
1763 	0x4166,
1764 	0x4168,
1765 	0x4170,
1766 	0x4171,
1767 	0x4172,
1768 	0x4173,
1769 	0x496e,
1770 	0x4a69,
1771 	0x4a6a,
1772 	0x4a6b,
1773 	0x4a70,
1774 	0x4a74,
1775 	0x4b69,
1776 	0x4b6b,
1777 	0x4b6c,
1778 	0x4c6e,
1779 	0x4e64,
1780 	0x4e65,
1781 	0x4e66,
1782 	0x4e67,
1783 	0x4e68,
1784 	0x4e69,
1785 	0x4e6a,
1786 	0x4e71,
1787 	0x4f73,
1788 	0x5569,
1789 	0x556b,
1790 	0x556d,
1791 	0x556f,
1792 	0x5571,
1793 	0x5854,
1794 	0x5874,
1795 	0x5940,
1796 	0x5941,
1797 	0x5b70,
1798 	0x5b72,
1799 	0x5b73,
1800 	0x5b74,
1801 	0x5b75,
1802 	0x5d44,
1803 	0x5d45,
1804 	0x5d6d,
1805 	0x5d6f,
1806 	0x5d72,
1807 	0x5d77,
1808 	0x5e6b,
1809 	0x5e6d,
1810 	0x7120,
1811 	0x7124,
1812 	0x7129,
1813 	0x712e,
1814 	0x712f,
1815 	0x7162,
1816 	0x7163,
1817 	0x7166,
1818 	0x7167,
1819 	0x7172,
1820 	0x7173,
1821 	0x71a0,
1822 	0x71a1,
1823 	0x71a3,
1824 	0x71a7,
1825 	0x71bb,
1826 	0x71e0,
1827 	0x71e1,
1828 	0x71e2,
1829 	0x71e6,
1830 	0x71e7,
1831 	0x71f2,
1832 	0x7269,
1833 	0x726b,
1834 	0x726e,
1835 	0x72a0,
1836 	0x72a8,
1837 	0x72b1,
1838 	0x72b3,
1839 	0x793f,
1843 	{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1844 	{0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1845 	{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1846 	{0x1002, 0x678A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1847 	{0x1002, 0x6790, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1848 	{0x1002, 0x6791, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1849 	{0x1002, 0x6792, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1850 	{0x1002, 0x6798, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1851 	{0x1002, 0x6799, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1852 	{0x1002, 0x679A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1853 	{0x1002, 0x679B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1854 	{0x1002, 0x679E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1855 	{0x1002, 0x679F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
1856 	{0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
1857 	{0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
1858 	{0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
1859 	{0x1002, 0x6806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1860 	{0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1861 	{0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1862 	{0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1863 	{0x1002, 0x6811, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1864 	{0x1002, 0x6816, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1865 	{0x1002, 0x6817, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1866 	{0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1867 	{0x1002, 0x6819, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
1868 	{0x1002, 0x6600, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1869 	{0x1002, 0x6601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1870 	{0x1002, 0x6602, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1871 	{0x1002, 0x6603, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1872 	{0x1002, 0x6604, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1873 	{0x1002, 0x6605, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1874 	{0x1002, 0x6606, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1875 	{0x1002, 0x6607, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1876 	{0x1002, 0x6608, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1877 	{0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1878 	{0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1879 	{0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1880 	{0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1881 	{0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1882 	{0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1883 	{0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
1884 	{0x1002, 0x6631, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
1885 	{0x1002, 0x6820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1886 	{0x1002, 0x6821, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1887 	{0x1002, 0x6822, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1888 	{0x1002, 0x6823, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1889 	{0x1002, 0x6824, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1890 	{0x1002, 0x6825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1891 	{0x1002, 0x6826, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1892 	{0x1002, 0x6827, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1893 	{0x1002, 0x6828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1894 	{0x1002, 0x6829, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1895 	{0x1002, 0x682A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1896 	{0x1002, 0x682B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1897 	{0x1002, 0x682C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1898 	{0x1002, 0x682D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1899 	{0x1002, 0x682F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1900 	{0x1002, 0x6830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1901 	{0x1002, 0x6831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
1902 	{0x1002, 0x6835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1903 	{0x1002, 0x6837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1904 	{0x1002, 0x6838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1905 	{0x1002, 0x6839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1906 	{0x1002, 0x683B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1907 	{0x1002, 0x683D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1908 	{0x1002, 0x683F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
1909 	{0x1002, 0x6660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1910 	{0x1002, 0x6663, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1911 	{0x1002, 0x6664, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1912 	{0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1913 	{0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1914 	{0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
1916 	{0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1917 	{0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1918 	{0x1002, 0x1306, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1919 	{0x1002, 0x1307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1920 	{0x1002, 0x1309, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1921 	{0x1002, 0x130A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1922 	{0x1002, 0x130B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1923 	{0x1002, 0x130C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1924 	{0x1002, 0x130D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1925 	{0x1002, 0x130E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1926 	{0x1002, 0x130F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1927 	{0x1002, 0x1310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1928 	{0x1002, 0x1311, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1929 	{0x1002, 0x1312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1930 	{0x1002, 0x1313, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1931 	{0x1002, 0x1315, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1932 	{0x1002, 0x1316, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1933 	{0x1002, 0x1317, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1934 	{0x1002, 0x1318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
1935 	{0x1002, 0x131B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1936 	{0x1002, 0x131C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1937 	{0x1002, 0x131D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
1939 	{0x1002, 0x6640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1940 	{0x1002, 0x6641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1941 	{0x1002, 0x6646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1942 	{0x1002, 0x6647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
1943 	{0x1002, 0x6649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1944 	{0x1002, 0x6650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1945 	{0x1002, 0x6651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1946 	{0x1002, 0x6658, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1947 	{0x1002, 0x665c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1948 	{0x1002, 0x665d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1949 	{0x1002, 0x665f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
1951 	{0x1002, 0x67A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1952 	{0x1002, 0x67A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1953 	{0x1002, 0x67A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1954 	{0x1002, 0x67A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1955 	{0x1002, 0x67A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1956 	{0x1002, 0x67AA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1957 	{0x1002, 0x67B0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1958 	{0x1002, 0x67B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1959 	{0x1002, 0x67B8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1960 	{0x1002, 0x67B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1961 	{0x1002, 0x67BA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1962 	{0x1002, 0x67BE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
1964 	{0x1002, 0x9830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1965 	{0x1002, 0x9831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1966 	{0x1002, 0x9832, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1967 	{0x1002, 0x9833, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1968 	{0x1002, 0x9834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1969 	{0x1002, 0x9835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1970 	{0x1002, 0x9836, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1971 	{0x1002, 0x9837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1972 	{0x1002, 0x9838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1973 	{0x1002, 0x9839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1974 	{0x1002, 0x983a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1975 	{0x1002, 0x983b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
1976 	{0x1002, 0x983c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1977 	{0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1978 	{0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1979 	{0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
1981 	{0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1982 	{0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1983 	{0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1984 	{0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1985 	{0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1986 	{0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1987 	{0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1988 	{0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1989 	{0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1990 	{0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1991 	{0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1992 	{0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1993 	{0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1994 	{0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1995 	{0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1996 	{0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
1998 	{0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1999 	{0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
2000 	{0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
2001 	{0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
2002 	{0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
2004 	{0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2005 	{0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2006 	{0x1002, 0x6928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2007 	{0x1002, 0x6929, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2008 	{0x1002, 0x692B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2009 	{0x1002, 0x692F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2010 	{0x1002, 0x6930, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2011 	{0x1002, 0x6938, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2012 	{0x1002, 0x6939, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2014 	{0x1002, 0x7300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
2015 	{0x1002, 0x730F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
2017 	{0x1002, 0x9870, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
2018 	{0x1002, 0x9874, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
2019 	{0x1002, 0x9875, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
2020 	{0x1002, 0x9876, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
2021 	{0x1002, 0x9877, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
2023 	{0x1002, 0x98E4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_STONEY|AMD_IS_APU},
2025 	{0x1002, 0x67E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2026 	{0x1002, 0x67E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2027 	{0x1002, 0x67E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2028 	{0x1002, 0x67EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2029 	{0x1002, 0x67EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2030 	{0x1002, 0x67FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2031 	{0x1002, 0x67E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2032 	{0x1002, 0x67E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2033 	{0x1002, 0x67E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2035 	{0x1002, 0x67C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2036 	{0x1002, 0x67C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2037 	{0x1002, 0x67C2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2038 	{0x1002, 0x67C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2039 	{0x1002, 0x67C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2040 	{0x1002, 0x67D0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2041 	{0x1002, 0x67DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2042 	{0x1002, 0x67C8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2043 	{0x1002, 0x67C9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2044 	{0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2045 	{0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2046 	{0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2047 	{0x1002, 0x6FDF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2049 	{0x1002, 0x6980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2050 	{0x1002, 0x6981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2051 	{0x1002, 0x6985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2052 	{0x1002, 0x6986, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2053 	{0x1002, 0x6987, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2054 	{0x1002, 0x6995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2055 	{0x1002, 0x6997, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2056 	{0x1002, 0x699F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
2058 	{0x1002, 0x694C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGAM},
2059 	{0x1002, 0x694E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGAM},
2060 	{0x1002, 0x694F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGAM},
2062 	{0x1002, 0x6860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2063 	{0x1002, 0x6861, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2064 	{0x1002, 0x6862, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2065 	{0x1002, 0x6863, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2066 	{0x1002, 0x6864, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2067 	{0x1002, 0x6867, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2068 	{0x1002, 0x6868, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2069 	{0x1002, 0x6869, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2070 	{0x1002, 0x686a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2071 	{0x1002, 0x686b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2072 	{0x1002, 0x686c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2073 	{0x1002, 0x686d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2074 	{0x1002, 0x686e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2075 	{0x1002, 0x686f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2076 	{0x1002, 0x687f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA10},
2078 	{0x1002, 0x69A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
2079 	{0x1002, 0x69A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
2080 	{0x1002, 0x69A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
2081 	{0x1002, 0x69A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
2082 	{0x1002, 0x69AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA12},
2084 	{0x1002, 0x66A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2085 	{0x1002, 0x66A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2086 	{0x1002, 0x66A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2087 	{0x1002, 0x66A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2088 	{0x1002, 0x66A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2089 	{0x1002, 0x66A7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2090 	{0x1002, 0x66AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VEGA20},
2092 	{0x1002, 0x15dd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU},
2093 	{0x1002, 0x15d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RAVEN|AMD_IS_APU},
2095 	{0x1002, 0x738C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
2096 	{0x1002, 0x7388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
2097 	{0x1002, 0x738E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
2098 	{0x1002, 0x7390, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARCTURUS},
2100 	{0x1002, 0x7310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2101 	{0x1002, 0x7312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2102 	{0x1002, 0x7318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2103 	{0x1002, 0x7319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2104 	{0x1002, 0x731A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2105 	{0x1002, 0x731B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2106 	{0x1002, 0x731E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2107 	{0x1002, 0x731F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI10},
2109 	{0x1002, 0x7340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
2110 	{0x1002, 0x7341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
2111 	{0x1002, 0x7347, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
2112 	{0x1002, 0x734F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI14},
2115 	{0x1002, 0x15E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
2116 	{0x1002, 0x1636, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
2117 	{0x1002, 0x1638, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
2118 	{0x1002, 0x164C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RENOIR|AMD_IS_APU},
2121 	{0x1002, 0x7360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},
2122 	{0x1002, 0x7362, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVI12},
2125 	{0x1002, 0x73A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2126 	{0x1002, 0x73A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2127 	{0x1002, 0x73A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2128 	{0x1002, 0x73A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2129 	{0x1002, 0x73A5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2130 	{0x1002, 0x73A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2131 	{0x1002, 0x73A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2132 	{0x1002, 0x73AB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2133 	{0x1002, 0x73AC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2134 	{0x1002, 0x73AD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2135 	{0x1002, 0x73AE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2136 	{0x1002, 0x73AF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2137 	{0x1002, 0x73BF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SIENNA_CICHLID},
2140 	{0x1002, 0x164D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_YELLOW_CARP|AMD_IS_APU},
2141 	{0x1002, 0x1681, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_YELLOW_CARP|AMD_IS_APU},
2144 	{0x1002, 0x73C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2145 	{0x1002, 0x73C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2146 	{0x1002, 0x73C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2147 	{0x1002, 0x73DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2148 	{0x1002, 0x73DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2149 	{0x1002, 0x73DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2150 	{0x1002, 0x73DD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2151 	{0x1002, 0x73DE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2152 	{0x1002, 0x73DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_NAVY_FLOUNDER},
2155 	{0x1002, 0x73E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2156 	{0x1002, 0x73E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2157 	{0x1002, 0x73E2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2158 	{0x1002, 0x73E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2159 	{0x1002, 0x73E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2160 	{0x1002, 0x73E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2161 	{0x1002, 0x73EA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2162 	{0x1002, 0x73EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2163 	{0x1002, 0x73EC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2164 	{0x1002, 0x73ED, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2165 	{0x1002, 0x73EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2166 	{0x1002, 0x73FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_DIMGREY_CAVEFISH},
2169 	{0x1002, 0x7408, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
2170 	{0x1002, 0x740C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
2171 	{0x1002, 0x740F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
2172 	{0x1002, 0x7410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ALDEBARAN},
2175 	{0x1002, 0x13FE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYAN_SKILLFISH|AMD_IS_APU},
2176 	{0x1002, 0x143F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYAN_SKILLFISH|AMD_IS_APU},
2179 	{0x1002, 0x7420, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2180 	{0x1002, 0x7421, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2181 	{0x1002, 0x7422, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2182 	{0x1002, 0x7423, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2183 	{0x1002, 0x7424, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2184 	{0x1002, 0x743F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BEIGE_GOBY},
2186 	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
2188 	  .class_mask = 0xffffff,
2191 	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
2193 	  .class_mask = 0xffffff,
2196 	{ PCI_DEVICE(0x1002, PCI_ANY_ID),
2198 	  .class_mask = 0xffffff,
2201 	{0, 0, 0}
2208 	{0x67FF, 0xE3, CHIP_POLARIS10},
2209 	{0x67FF, 0xE7, CHIP_POLARIS10},
2210 	{0x67FF, 0xF3, CHIP_POLARIS10},
2211 	{0x67FF, 0xF7, CHIP_POLARIS10},
2221 	/* 0 - GPU  in amdgpu_get_secondary_funcs()
2293 	for (i = 0; i < ARRAY_SIZE(asic_type_quirks); i++) {  in amdgpu_fix_asic_type()
2311 	int ret, retry = 0, i;  in amdgpu_pci_probe()
2321 	for (i = 0; i < ARRAY_SIZE(amdgpu_unsupported_pciidlist); i++) {  in amdgpu_pci_probe()
2327 		amdgpu_aspm = 0;  in amdgpu_pci_probe()
2363 				 "Use radeon.si_support=0 amdgpu.si_support=1 to override.\n"  in amdgpu_pci_probe()
2382 				 "Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n"  in amdgpu_pci_probe()
2502 	return 0;  in amdgpu_pci_probe()
2567 		return 0;  in amdgpu_pmops_prepare()
2607 		return 0;  in amdgpu_pmops_suspend()
2624 	return 0;  in amdgpu_pmops_suspend_noirq()
2634 		return 0;  in amdgpu_pmops_resume()
2660 	return 0;  in amdgpu_pmops_freeze()
2669 		return 0;  in amdgpu_pmops_thaw()
2681 		return 0;  in amdgpu_pmops_poweroff()
2702 		int ret = 0;  in amdgpu_runtime_idle_check_display()
2733 				if (ret < 0)  in amdgpu_runtime_idle_check_display()
2757 	return 0;  in amdgpu_runtime_idle_check_display()
2768 	int ret = 0;  in amdgpu_runtime_idle_check_userq()
2803 	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {  in amdgpu_pmops_runtime_suspend()
2859 	return 0;  in amdgpu_pmops_runtime_suspend()
2907 	return 0;  in amdgpu_pmops_runtime_resume()
2955 	if (ret < 0)  in amdgpu_drm_ioctl()
2990 	return timeout >= 0 ? 0 : timeout;  in amdgpu_flush()
3023 	return 0;  in amdgpu_file_to_fpriv()