125 	struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[work->crtc_id];  in amdgpu_display_flip_work_func()  local
127 	struct drm_crtc *crtc = &amdgpu_crtc->base;  in amdgpu_display_flip_work_func()
139 	if (amdgpu_crtc->enabled &&  in amdgpu_display_flip_work_func()
158 	amdgpu_crtc->pflip_status = AMDGPU_FLIP_SUBMITTED;  in amdgpu_display_flip_work_func()
164 		    amdgpu_crtc->crtc_id, amdgpu_crtc, work);  in amdgpu_display_flip_work_func()
198 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in amdgpu_display_crtc_page_flip_target()  local
215 	work->crtc_id = amdgpu_crtc->crtc_id;  in amdgpu_display_crtc_page_flip_target()
269 	if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_NONE) {  in amdgpu_display_crtc_page_flip_target()
276 	amdgpu_crtc->pflip_status = AMDGPU_FLIP_PENDING;  in amdgpu_display_crtc_page_flip_target()
277 	amdgpu_crtc->pflip_works = work;  in amdgpu_display_crtc_page_flip_target()
281 					 amdgpu_crtc->crtc_id, amdgpu_crtc, work);  in amdgpu_display_crtc_page_flip_target()
1442 	struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in amdgpu_display_crtc_scaling_mode_fixup()  local
1448 	amdgpu_crtc->h_border = 0;  in amdgpu_display_crtc_scaling_mode_fixup()
1449 	amdgpu_crtc->v_border = 0;  in amdgpu_display_crtc_scaling_mode_fixup()
1459 			amdgpu_crtc->rmx_type = RMX_OFF;  in amdgpu_display_crtc_scaling_mode_fixup()
1462 			amdgpu_crtc->rmx_type = amdgpu_encoder->rmx_type;  in amdgpu_display_crtc_scaling_mode_fixup()
1464 			amdgpu_crtc->rmx_type = RMX_OFF;  in amdgpu_display_crtc_scaling_mode_fixup()
1466 		memcpy(&amdgpu_crtc->native_mode,  in amdgpu_display_crtc_scaling_mode_fixup()
1470 		dst_v = amdgpu_crtc->native_mode.vdisplay;  in amdgpu_display_crtc_scaling_mode_fixup()
1472 		dst_h = amdgpu_crtc->native_mode.hdisplay;  in amdgpu_display_crtc_scaling_mode_fixup()
1481 				amdgpu_crtc->h_border = amdgpu_encoder->underscan_hborder;  in amdgpu_display_crtc_scaling_mode_fixup()
1483 				amdgpu_crtc->h_border = (mode->hdisplay >> 5) + 16;  in amdgpu_display_crtc_scaling_mode_fixup()
1485 				amdgpu_crtc->v_border = amdgpu_encoder->underscan_vborder;  in amdgpu_display_crtc_scaling_mode_fixup()
1487 				amdgpu_crtc->v_border = (mode->vdisplay >> 5) + 16;  in amdgpu_display_crtc_scaling_mode_fixup()
1488 			amdgpu_crtc->rmx_type = RMX_FULL;  in amdgpu_display_crtc_scaling_mode_fixup()
1490 			dst_v = crtc->mode.vdisplay - (amdgpu_crtc->v_border * 2);  in amdgpu_display_crtc_scaling_mode_fixup()
1492 			dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2);  in amdgpu_display_crtc_scaling_mode_fixup()
1495 	if (amdgpu_crtc->rmx_type != RMX_OFF) {  in amdgpu_display_crtc_scaling_mode_fixup()
1500 		amdgpu_crtc->vsc.full = dfixed_div(a, b);  in amdgpu_display_crtc_scaling_mode_fixup()
1503 		amdgpu_crtc->hsc.full = dfixed_div(a, b);  in amdgpu_display_crtc_scaling_mode_fixup()
1505 		amdgpu_crtc->vsc.full = dfixed_const(1);  in amdgpu_display_crtc_scaling_mode_fixup()
1506 		amdgpu_crtc->hsc.full = dfixed_const(1);  in amdgpu_display_crtc_scaling_mode_fixup()
1717 		struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in amdgpu_display_suspend_helper()  local
1721 		if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) {  in amdgpu_display_suspend_helper()
1722 			struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo);  in amdgpu_display_suspend_helper()
1756 		struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);  in amdgpu_display_resume_helper()  local
1758 		if (amdgpu_crtc->cursor_bo && !adev->enable_virtual_display) {  in amdgpu_display_resume_helper()
1759 			struct amdgpu_bo *aobj = gem_to_amdgpu_bo(amdgpu_crtc->cursor_bo);  in amdgpu_display_resume_helper()
1767 				amdgpu_crtc->cursor_addr = amdgpu_bo_gpu_offset(aobj);  in amdgpu_display_resume_helper()