796 		    adev->gfx.rlc.rlcg_reg_access_supported &&  in amdgpu_device_xcc_rreg()
893 	    adev->gfx.rlc.funcs &&  in amdgpu_mm_wreg_mmio_rlc()
894 	    adev->gfx.rlc.funcs->is_rlcg_access_range) {  in amdgpu_mm_wreg_mmio_rlc()
895 		if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))  in amdgpu_mm_wreg_mmio_rlc()
927 		    adev->gfx.rlc.rlcg_reg_access_supported &&  in amdgpu_device_xcc_wreg()
2698 		adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se);  in amdgpu_device_parse_gpu_info_fw()
2699 		adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh);  in amdgpu_device_parse_gpu_info_fw()
2700 		adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se);  in amdgpu_device_parse_gpu_info_fw()
2701 		adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se);  in amdgpu_device_parse_gpu_info_fw()
2702 		adev->gfx.config.max_texture_channel_caches =  in amdgpu_device_parse_gpu_info_fw()
2704 		adev->gfx.config.max_gprs = le32_to_cpu(gpu_info_fw->gc_num_gprs);  in amdgpu_device_parse_gpu_info_fw()
2705 		adev->gfx.config.max_gs_threads = le32_to_cpu(gpu_info_fw->gc_num_max_gs_thds);  in amdgpu_device_parse_gpu_info_fw()
2706 		adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gpu_info_fw->gc_gs_table_depth);  in amdgpu_device_parse_gpu_info_fw()
2707 		adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gpu_info_fw->gc_gsprim_buff_depth);  in amdgpu_device_parse_gpu_info_fw()
2708 		adev->gfx.config.double_offchip_lds_buf =  in amdgpu_device_parse_gpu_info_fw()
2710 		adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size);  in amdgpu_device_parse_gpu_info_fw()
2711 		adev->gfx.cu_info.max_waves_per_simd =  in amdgpu_device_parse_gpu_info_fw()
2713 		adev->gfx.cu_info.max_scratch_slots_per_cu =  in amdgpu_device_parse_gpu_info_fw()
2715 		adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size);  in amdgpu_device_parse_gpu_info_fw()
2720 			adev->gfx.config.num_sc_per_sh =  in amdgpu_device_parse_gpu_info_fw()
2722 			adev->gfx.config.num_packer_per_sc =  in amdgpu_device_parse_gpu_info_fw()
3213 			if (adev->gfx.mcbp) {  in amdgpu_device_ip_init()
3785 		container_of(work, struct amdgpu_device, gfx.gfx_off_delay_work.work);  in amdgpu_device_delay_enable_gfx_off()
3787 	WARN_ON_ONCE(adev->gfx.gfx_off_state);  in amdgpu_device_delay_enable_gfx_off()
3788 	WARN_ON_ONCE(adev->gfx.gfx_off_req_count);  in amdgpu_device_delay_enable_gfx_off()
3791 		adev->gfx.gfx_off_state = true;  in amdgpu_device_delay_enable_gfx_off()
3891 			cancel_delayed_work_sync(&adev->gfx.idle_work);  in amdgpu_device_ip_suspend_phase2()
3919 		    (adev->flags & AMD_IS_APU) && adev->gfx.imu.funcs &&  in amdgpu_device_ip_suspend_phase2()
4450 		adev->gfx.mcbp = true;  in amdgpu_device_set_mcbp()
4452 		adev->gfx.mcbp = false;  in amdgpu_device_set_mcbp()
4455 		adev->gfx.mcbp = true;  in amdgpu_device_set_mcbp()
4457 	if (adev->gfx.mcbp)  in amdgpu_device_set_mcbp()
4551 	bitmap_zero(adev->gfx.pipe_reserve_bitmap, AMDGPU_MAX_COMPUTE_QUEUES);  in amdgpu_device_init()
4585 	mutex_init(&adev->gfx.gpu_clock_mutex);  in amdgpu_device_init()
4587 	mutex_init(&adev->gfx.pipe_reserve_mutex);  in amdgpu_device_init()
4588 	mutex_init(&adev->gfx.gfx_off_mutex);  in amdgpu_device_init()
4589 	mutex_init(&adev->gfx.partition_mutex);  in amdgpu_device_init()
4598 	mutex_init(&adev->gfx.reset_sem_mutex);  in amdgpu_device_init()
4606 	mutex_init(&adev->gfx.userq_sch_mutex);  in amdgpu_device_init()
4607 	mutex_init(&adev->gfx.workload_profile_mutex);  in amdgpu_device_init()
4640 	INIT_DELAYED_WORK(&adev->gfx.gfx_off_delay_work,  in amdgpu_device_init()
4652 		INIT_DELAYED_WORK(&adev->gfx.enforce_isolation[i].work,  in amdgpu_device_init()
4654 		adev->gfx.enforce_isolation[i].adev = adev;  in amdgpu_device_init()
4655 		adev->gfx.enforce_isolation[i].xcp_id = i;  in amdgpu_device_init()
4661 	adev->gfx.gfx_off_req_count = 1;  in amdgpu_device_init()
4662 	adev->gfx.gfx_off_residency = 0;  in amdgpu_device_init()
4663 	adev->gfx.gfx_off_entrycount = 0;  in amdgpu_device_init()
4888 			adev->gfx.config.max_shader_engines,  in amdgpu_device_init()
4889 			adev->gfx.config.max_sh_per_se,  in amdgpu_device_init()
4890 			adev->gfx.config.max_cu_per_sh,  in amdgpu_device_init()
4891 			adev->gfx.cu_info.number);  in amdgpu_device_init()
5240 	flush_delayed_work(&adev->gfx.gfx_off_delay_work);  in amdgpu_device_prepare()