Lines Matching defs:reset_context

4868  * @reset_context: amdgpu reset context pointer
4874 				     struct amdgpu_reset_context *reset_context)
4879 	if (test_bit(AMDGPU_HOST_FLR, &reset_context->flags)) {
4883 		clear_bit(AMDGPU_HOST_FLR, &reset_context->flags);
5113 				 struct amdgpu_reset_context *reset_context)
5117 	struct amdgpu_device *tmp_adev = reset_context->reset_req_dev;
5119 		test_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
5122 	if (reset_context->reset_req_dev == adev)
5123 		job = reset_context->job;
5146 	r = amdgpu_reset_prepare_hwcontext(adev, reset_context);
5170 		if (!test_bit(AMDGPU_SKIP_COREDUMP, &reset_context->flags)) {
5183 			set_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
5186 				  &reset_context->flags);
5192 int amdgpu_device_reinit_after_reset(struct amdgpu_reset_context *reset_context)
5199 	device_list_handle = reset_context->reset_device_list;
5204 	full_reset = test_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
5210 	if (reset_context->method == AMD_RESET_METHOD_ON_INIT)
5234 				if (!test_bit(AMDGPU_SKIP_COREDUMP, &reset_context->flags))
5235 					amdgpu_coredump(tmp_adev, false, vram_lost, reset_context->job);
5272 				if (!reset_context->hive &&
5305 				if (reset_context->hive &&
5308 						reset_context->hive, tmp_adev);
5335 			 struct amdgpu_reset_context *reset_context)
5345 	reset_context->reset_device_list = device_list_handle;
5346 	r = amdgpu_reset_perform_reset(tmp_adev, reset_context);
5355 		test_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
5356 	skip_hw_reset = test_bit(AMDGPU_SKIP_HW_RESET, &reset_context->flags);
5403 	r = amdgpu_device_reinit_after_reset(reset_context);
5405 		set_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
5407 		clear_bit(AMDGPU_NEED_FULL_RESET, &reset_context->flags);
5581 					  struct amdgpu_reset_context *reset_context,
5610 		amdgpu_amdkfd_pre_reset(tmp_adev, reset_context);
5644 			      struct amdgpu_reset_context *reset_context)
5652 		r = amdgpu_device_pre_asic_reset(tmp_adev, reset_context);
5672 			set_bit(AMDGPU_HOST_FLR, &reset_context->flags);
5675 		r = amdgpu_device_reset_sriov(adev, reset_context);
5683 		r = amdgpu_do_asic_reset(device_list, reset_context);
5702 			      struct amdgpu_reset_context *reset_context,
5728 			if (reset_context->src != AMDGPU_RESET_SRC_RAS ||
5788  * @reset_context: amdgpu reset context pointer
5797 			      struct amdgpu_reset_context *reset_context)
5813 	    reset_context->src != AMDGPU_RESET_SRC_RAS) {
5816 			reset_context->src);
5839 		 reset_context->src);
5846 	reset_context->job = job;
5847 	reset_context->hive = hive;
5870 	amdgpu_device_halt_activities(adev, job, reset_context, &device_list,
5886 	r = amdgpu_device_asic_reset(adev, &device_list, reset_context);
5890 	r = amdgpu_device_sched_resume(&device_list, reset_context, job_signaled);
6283 	struct amdgpu_reset_context reset_context;
6317 		memset(&reset_context, 0, sizeof(reset_context));
6322 		amdgpu_device_halt_activities(adev, NULL, &reset_context, &device_list,
6369 	struct amdgpu_reset_context reset_context;
6380 	memset(&reset_context, 0, sizeof(reset_context));
6426 	reset_context.method = AMD_RESET_METHOD_NONE;
6427 	reset_context.reset_req_dev = adev;
6428 	set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
6429 	set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);
6432 		reset_context.hive = hive;
6437 		set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags);
6440 	r = amdgpu_device_asic_reset(adev, &device_list, &reset_context);