Lines Matching defs:hive

172  * Minimal blocks needed to be initialized before a XGMI hive can be reset. This
173  * is used for cases like reset on initialization where the entire hive needs to
1254 	/* Don't post if we need to reset whole hive on init */
2455 				struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);
2457 				if (WARN_ON(!hive)) {
2462 				if (!hive->reset_domain ||
2463 				    !amdgpu_reset_get_reset_domain(hive->reset_domain)) {
2465 					amdgpu_put_xgmi_hive(hive);
2471 				adev->reset_domain = hive->reset_domain;
2472 				amdgpu_put_xgmi_hive(hive);
2483 	/* Don't init kfd if whole hive need to be reset during init */
2738 		 * hive get initialized.
2740 		 * However, it's unknown how many device in the hive in advance.
3477 	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev);
3479 	/* It's a bug to not have a hive within this function */
3480 	if (WARN_ON(!hive))
3485 	 * hive. task_barrier_enter and task_barrier_exit will block
3491 		task_barrier_enter(&hive->tb);
3497 		task_barrier_exit(&hive->tb);
3506 		task_barrier_full(&hive->tb);
3515 	amdgpu_put_xgmi_hive(hive);
3857 	 * Reset domain needs to be present early, before XGMI hive discovered
3978 			dev_info(adev->dev, "Pending hive reset.\n");
4102 	/* Don't init kfd if whole hive need to be reset during init */
4877 	struct amdgpu_hive_info *hive = NULL;
4913 	hive = amdgpu_get_xgmi_hive(adev);
4915 	if (hive && adev->gmc.xgmi.num_physical_nodes > 1)
4916 		r = amdgpu_xgmi_update_topology(hive, adev);
4917 	if (hive)
4918 		amdgpu_put_xgmi_hive(hive);
5272 				if (!reset_context->hive &&
5305 				if (reset_context->hive &&
5308 						reset_context->hive, tmp_adev);
5359 	 * ASIC reset has to be done on all XGMI hive nodes ASAP
5533 					  struct amdgpu_hive_info *hive)
5539 	 * In case we are in XGMI hive mode, resort the device list
5542 	if (!amdgpu_sriov_vf(adev) && (adev->gmc.xgmi.num_physical_nodes > 1) && hive) {
5543 		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
5583 					  struct amdgpu_hive_info *hive,
5650 retry:	/* Rest of adevs pre asic reset from XGMI hive. */
5662 	/* Host driver will handle XGMI hive reset for SRIOV */
5801 	struct amdgpu_hive_info *hive = NULL;
5842 		hive = amdgpu_get_xgmi_hive(adev);
5843 	if (hive)
5844 		mutex_lock(&hive->hive_lock);
5847 	reset_context->hive = hive;
5850 	amdgpu_device_recovery_prepare(adev, &device_list, hive);
5871 				      hive, need_emergency_restart);
5899 	if (hive) {
5900 		mutex_unlock(&hive->hive_lock);
5901 		amdgpu_put_xgmi_hive(hive);
6281 	struct amdgpu_hive_info *hive __free(xgmi_put_hive) =
6297 		if (hive) {
6303 					 "No support for XGMI hive yet...\n");
6306 			/* Set dpc status only if device is part of hive
6307 			 * Non-hive devices should be able to recover after
6312 			mutex_lock(&hive->hive_lock);
6320 		amdgpu_device_recovery_prepare(adev, &device_list, hive);
6323 					      hive, false);
6324 		if (hive)
6325 			mutex_unlock(&hive->hive_lock);
6371 	struct amdgpu_hive_info *hive;
6382 	hive = amdgpu_get_xgmi_hive(adev);
6383 	if (hive) {
6384 		mutex_lock(&hive->hive_lock);
6385 		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head)
6431 	if (hive) {
6432 		reset_context.hive = hive;
6433 		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head)
6448 		if (hive) {
6455 	if (hive) {
6456 		mutex_unlock(&hive->hive_lock);
6457 		amdgpu_put_xgmi_hive(hive);
6475 	struct amdgpu_hive_info *hive = NULL;
6486 	hive = amdgpu_get_xgmi_hive(adev);
6487 	if (hive) {
6488 		mutex_lock(&hive->hive_lock);
6489 		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
6501 	if (hive) {
6502 		mutex_unlock(&hive->hive_lock);
6503 		amdgpu_put_xgmi_hive(hive);