Lines Matching +full:temperature +full:- +full:tracking
51 #include <linux/dma-fence.h>
320 #define AMDGPU_SMARTSHIFT_MIN_BIAS (-100)
322 /* Extra time delay(in ms) to eliminate the influence of temperature momentary fluctuation */
444 /* sub-allocation manager, it has to be protected by another lock.
454 * the end total_size - (last_object_offset + last_object_size) >=
520 #define AMDGPU_MAX_WB 1024 /* Reserve at most 1024 WB slots for amdgpu-owned rings. */
523 * amdgpu_wb - This struct is used for small GPU memory allocation.
598 * enum amd_reset_method - Methods for resetting AMD GPU devices
611 * @AMD_RESET_LINK: Triggers SW-UP link reset on other GPUs
624 AMD_RESET_METHOD_NONE = -1,
924 * are described in corresponding struct definitions - amdgpu_init_default,
1072 /* For pre-DCE11. DCE11 and later are in "struct amdgpu_device->dm" */
1204 /* tracking pinned memory */
1323 * Must be last --ends in a flexible-array member.
1334 return adev->ip_versions[ip][inst] & ~0xFFU; in amdgpu_ip_version()
1340 /* This returns full version - major/minor/rev/variant/subrevision */ in amdgpu_ip_version_full()
1341 return adev->ip_versions[ip][inst]; in amdgpu_ip_version_full()
1351 return &adev->ddev; in adev_to_drm()
1361 return !!adev->aid_mask; in amdgpu_is_multi_aid()
1453 #define RREG32_PCIE(reg) adev->pcie_rreg(adev, (reg))
1454 #define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v))
1455 #define RREG32_PCIE_PORT(reg) adev->pciep_rreg(adev, (reg))
1456 #define WREG32_PCIE_PORT(reg, v) adev->pciep_wreg(adev, (reg), (v))
1457 #define RREG32_PCIE_EXT(reg) adev->pcie_rreg_ext(adev, (reg))
1458 #define WREG32_PCIE_EXT(reg, v) adev->pcie_wreg_ext(adev, (reg), (v))
1459 #define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg))
1460 #define WREG64_PCIE(reg, v) adev->pcie_wreg64(adev, (reg), (v))
1461 #define RREG64_PCIE_EXT(reg) adev->pcie_rreg64_ext(adev, (reg))
1462 #define WREG64_PCIE_EXT(reg, v) adev->pcie_wreg64_ext(adev, (reg), (v))
1463 #define RREG32_SMC(reg) adev->smc_rreg(adev, (reg))
1464 #define WREG32_SMC(reg, v) adev->smc_wreg(adev, (reg), (v))
1465 #define RREG32_UVD_CTX(reg) adev->uvd_ctx_rreg(adev, (reg))
1466 #define WREG32_UVD_CTX(reg, v) adev->uvd_ctx_wreg(adev, (reg), (v))
1467 #define RREG32_DIDT(reg) adev->didt_rreg(adev, (reg))
1468 #define WREG32_DIDT(reg, v) adev->didt_wreg(adev, (reg), (v))
1469 #define RREG32_GC_CAC(reg) adev->gc_cac_rreg(adev, (reg))
1470 #define WREG32_GC_CAC(reg, v) adev->gc_cac_wreg(adev, (reg), (v))
1471 #define RREG32_SE_CAC(reg) adev->se_cac_rreg(adev, (reg))
1472 #define WREG32_SE_CAC(reg, v) adev->se_cac_wreg(adev, (reg), (v))
1473 #define RREG32_AUDIO_ENDPT(block, reg) adev->audio_endpt_rreg(adev, (block), (reg))
1474 #define WREG32_AUDIO_ENDPT(block, reg, v) adev->audio_endpt_wreg(adev, (block), (reg), (v))
1522 #define RBIOS8(i) (adev->bios[i])
1530 ((adev)->asic_funcs->set_vga_state ? (adev)->asic_funcs->set_vga_state((adev), (state)) : 0)
1531 #define amdgpu_asic_reset(adev) (adev)->asic_funcs->reset((adev))
1532 #define amdgpu_asic_reset_method(adev) (adev)->asic_funcs->reset_method((adev))
1533 #define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))
1534 #define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))
1535 #define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (…
1536 #define amdgpu_get_pcie_lanes(adev) (adev)->asic_funcs->get_pcie_lanes((adev))
1537 #define amdgpu_set_pcie_lanes(adev, l) (adev)->asic_funcs->set_pcie_lanes((adev), (l))
1538 #define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))
1539 #define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))
1540 #define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (…
1541 #define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev)…
1542 #define amdgpu_asic_get_config_memsize(adev) (adev)->asic_funcs->get_config_memsize((adev))
1543 #define amdgpu_asic_need_full_reset(adev) (adev)->asic_funcs->need_full_reset((adev))
1544 #define amdgpu_asic_init_doorbell_index(adev) (adev)->asic_funcs->init_doorbell_index((adev))
1545 #define amdgpu_asic_get_pcie_usage(adev, cnt0, cnt1) ((adev)->asic_funcs->get_pcie_usage((adev), (c…
1546 #define amdgpu_asic_need_reset_on_init(adev) (adev)->asic_funcs->need_reset_on_init((adev))
1547 #define amdgpu_asic_get_pcie_replay_count(adev) ((adev)->asic_funcs->get_pcie_replay_count((adev)))
1548 #define amdgpu_asic_supports_baco(adev) (adev)->asic_funcs->supports_baco((adev))
1549 #define amdgpu_asic_pre_asic_init(adev) (adev)->asic_funcs->pre_asic_init((adev))
1551 …((adev)->asic_funcs->update_umd_stable_pstate ? (adev)->asic_funcs->update_umd_stable_pstate((adev…
1552 #define amdgpu_asic_query_video_codecs(adev, e, c) (adev)->asic_funcs->query_video_codecs((adev), (…
1554 #define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter))
1558 for (i = ffs(inst_mask); i-- != 0; \
1710 return -EINVAL; in amdgpu_acpi_get_tmr_info()
1716 return -EINVAL; in amdgpu_acpi_get_mem_info()
1767 adev->gfx_timeout != MAX_SCHEDULE_TIMEOUT && in amdgpu_device_has_timeouts_enabled()
1768 adev->compute_timeout != MAX_SCHEDULE_TIMEOUT && in amdgpu_device_has_timeouts_enabled()
1769 adev->sdma_timeout != MAX_SCHEDULE_TIMEOUT && in amdgpu_device_has_timeouts_enabled()
1770 adev->video_timeout != MAX_SCHEDULE_TIMEOUT; in amdgpu_device_has_timeouts_enabled()
1777 return adev->gmc.tmz_enabled; in amdgpu_is_tmz()
1794 r = pci_read_config_dword(adev->pdev, PCI_COMMAND, &status); in amdgpu_device_bus_status_check()
1796 dev_err(adev->dev, "device lost from bus!"); in amdgpu_device_bus_status_check()
1797 return -ENODEV; in amdgpu_device_bus_status_check()