40 	unsigned long bank_offset;  in xgene_gpio_get()  local
43 	bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_get()
45 	return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));  in xgene_gpio_get()
51 	unsigned long bank_offset;  in __xgene_gpio_set()  local
54 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in __xgene_gpio_set()
57 	setval = ioread32(chip->base + bank_offset);  in __xgene_gpio_set()
62 	iowrite32(setval, chip->base + bank_offset);  in __xgene_gpio_set()
80 	unsigned long bank_offset, bit_offset;  in xgene_gpio_get_direction()  local
82 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_get_direction()
85 	if (ioread32(chip->base + bank_offset) & BIT(bit_offset))  in xgene_gpio_get_direction()
94 	unsigned long flags, bank_offset;  in xgene_gpio_dir_in()  local
97 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_dir_in()
102 	dirval = ioread32(chip->base + bank_offset);  in xgene_gpio_dir_in()
104 	iowrite32(dirval, chip->base + bank_offset);  in xgene_gpio_dir_in()
115 	unsigned long flags, bank_offset;  in xgene_gpio_dir_out()  local
118 	bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);  in xgene_gpio_dir_out()
123 	dirval = ioread32(chip->base + bank_offset);  in xgene_gpio_dir_out()
125 	iowrite32(dirval, chip->base + bank_offset);  in xgene_gpio_dir_out()
136 	unsigned long bank_offset;  in xgene_gpio_suspend()  local
140 		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;  in xgene_gpio_suspend()
141 		gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);  in xgene_gpio_suspend()
149 	unsigned long bank_offset;  in xgene_gpio_resume()  local
153 		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;  in xgene_gpio_resume()
154 		iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);  in xgene_gpio_resume()