1 // SPDX-License-Identifier: GPL-2.0-only
3  * AppliedMicro X-Gene SoC GPIO Driver
15 #include <linux/gpio/driver.h>
45 	return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));  in xgene_gpio_get()
57 	setval = ioread32(chip->base + bank_offset);  in __xgene_gpio_set()
62 	iowrite32(setval, chip->base + bank_offset);  in __xgene_gpio_set()
70 	spin_lock_irqsave(&chip->lock, flags);  in xgene_gpio_set()
72 	spin_unlock_irqrestore(&chip->lock, flags);  in xgene_gpio_set()
83 	if (ioread32(chip->base + bank_offset) & BIT(bit_offset))  in xgene_gpio_get_direction()
98 	spin_lock_irqsave(&chip->lock, flags);  in xgene_gpio_dir_in()
100 	dirval = ioread32(chip->base + bank_offset);  in xgene_gpio_dir_in()
102 	iowrite32(dirval, chip->base + bank_offset);  in xgene_gpio_dir_in()
104 	spin_unlock_irqrestore(&chip->lock, flags);  in xgene_gpio_dir_in()
119 	spin_lock_irqsave(&chip->lock, flags);  in xgene_gpio_dir_out()
121 	dirval = ioread32(chip->base + bank_offset);  in xgene_gpio_dir_out()
123 	iowrite32(dirval, chip->base + bank_offset);  in xgene_gpio_dir_out()
126 	spin_unlock_irqrestore(&chip->lock, flags);  in xgene_gpio_dir_out()
133 	struct xgene_gpio *gpio = dev_get_drvdata(dev);  in xgene_gpio_suspend()  local
135 	unsigned int bank;  in xgene_gpio_suspend()  local
137 	for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {  in xgene_gpio_suspend()
138 		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;  in xgene_gpio_suspend()
139 		gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);  in xgene_gpio_suspend()
146 	struct xgene_gpio *gpio = dev_get_drvdata(dev);  in xgene_gpio_resume()  local
148 	unsigned int bank;  in xgene_gpio_resume()  local
150 	for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {  in xgene_gpio_resume()
151 		bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;  in xgene_gpio_resume()
152 		iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);  in xgene_gpio_resume()
161 	struct xgene_gpio *gpio;  in xgene_gpio_probe()  local
163 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);  in xgene_gpio_probe()
164 	if (!gpio)  in xgene_gpio_probe()
165 		return -ENOMEM;  in xgene_gpio_probe()
167 	gpio->base = devm_platform_ioremap_resource(pdev, 0);  in xgene_gpio_probe()
168 	if (IS_ERR(gpio->base))  in xgene_gpio_probe()
169 		return PTR_ERR(gpio->base);  in xgene_gpio_probe()
171 	gpio->chip.ngpio = XGENE_MAX_GPIOS;  in xgene_gpio_probe()
173 	spin_lock_init(&gpio->lock);  in xgene_gpio_probe()
174 	gpio->chip.parent = &pdev->dev;  in xgene_gpio_probe()
175 	gpio->chip.get_direction = xgene_gpio_get_direction;  in xgene_gpio_probe()
176 	gpio->chip.direction_input = xgene_gpio_dir_in;  in xgene_gpio_probe()
177 	gpio->chip.direction_output = xgene_gpio_dir_out;  in xgene_gpio_probe()
178 	gpio->chip.get = xgene_gpio_get;  in xgene_gpio_probe()
179 	gpio->chip.set = xgene_gpio_set;  in xgene_gpio_probe()
180 	gpio->chip.label = dev_name(&pdev->dev);  in xgene_gpio_probe()
181 	gpio->chip.base = -1;  in xgene_gpio_probe()
183 	platform_set_drvdata(pdev, gpio);  in xgene_gpio_probe()
185 	return devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);  in xgene_gpio_probe()
189 	{ .compatible = "apm,xgene-gpio", },
202 		.name = "xgene-gpio",