Lines Matching +full:gpio +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2022 NVIDIA Corporation
9 #include <linux/gpio/driver.h>
19 #include <dt-bindings/gpio/tegra186-gpio.h>
20 #include <dt-bindings/gpio/tegra194-gpio.h>
21 #include <dt-bindings/gpio/tegra234-gpio.h>
22 #include <dt-bindings/gpio/tegra241-gpio.h>
99 struct gpio_chip gpio; member
112 tegra186_gpio_get_port(struct tegra_gpio *gpio, unsigned int *pin) in tegra186_gpio_get_port() argument
116 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_get_port()
117 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_get_port()
119 if (*pin >= start && *pin < start + port->pins) { in tegra186_gpio_get_port()
120 *pin -= start; in tegra186_gpio_get_port()
124 start += port->pins; in tegra186_gpio_get_port()
130 static void __iomem *tegra186_gpio_get_base(struct tegra_gpio *gpio, in tegra186_gpio_get_base() argument
136 port = tegra186_gpio_get_port(gpio, &pin); in tegra186_gpio_get_base()
140 offset = port->bank * 0x1000 + port->port * 0x200; in tegra186_gpio_get_base()
142 return gpio->base + offset + pin * 0x20; in tegra186_gpio_get_base()
145 static void __iomem *tegra186_gpio_get_secure_base(struct tegra_gpio *gpio, in tegra186_gpio_get_secure_base() argument
151 port = tegra186_gpio_get_port(gpio, &pin); in tegra186_gpio_get_secure_base()
155 offset = port->bank * 0x1000 + port->port * TEGRA186_GPIO_SCR_PORT_SIZE; in tegra186_gpio_get_secure_base()
157 return gpio->secure + offset + pin * TEGRA186_GPIO_SCR_PIN_SIZE; in tegra186_gpio_get_secure_base()
160 static inline bool tegra186_gpio_is_accessible(struct tegra_gpio *gpio, unsigned int pin) in tegra186_gpio_is_accessible() argument
165 secure = tegra186_gpio_get_secure_base(gpio, pin); in tegra186_gpio_is_accessible()
167 if (gpio->soc->has_vm_support) { in tegra186_gpio_is_accessible()
177 * registers for given GPIO pin. in tegra186_gpio_is_accessible()
180 * GPIO pin. in tegra186_gpio_is_accessible()
195 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_init_valid_mask() local
199 if (!tegra186_gpio_is_accessible(gpio, j)) in tegra186_init_valid_mask()
208 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_get_direction() local
212 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_get_direction()
214 return -ENODEV; in tegra186_gpio_get_direction()
226 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_direction_input() local
230 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_direction_input()
232 return -ENODEV; in tegra186_gpio_direction_input()
249 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_direction_output() local
254 chip->set(chip, offset, level); in tegra186_gpio_direction_output()
256 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_direction_output()
258 return -EINVAL; in tegra186_gpio_direction_output()
278 struct tegra_gpio *gpio; in tegra186_gpio_en_hw_ts() local
283 return -EINVAL; in tegra186_gpio_en_hw_ts()
285 gpio = gpiochip_get_data(gc); in tegra186_gpio_en_hw_ts()
286 if (!gpio) in tegra186_gpio_en_hw_ts()
287 return -ENODEV; in tegra186_gpio_en_hw_ts()
289 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_en_hw_ts()
291 return -EINVAL; in tegra186_gpio_en_hw_ts()
313 struct tegra_gpio *gpio; in tegra186_gpio_dis_hw_ts() local
318 return -EINVAL; in tegra186_gpio_dis_hw_ts()
320 gpio = gpiochip_get_data(gc); in tegra186_gpio_dis_hw_ts()
321 if (!gpio) in tegra186_gpio_dis_hw_ts()
322 return -ENODEV; in tegra186_gpio_dis_hw_ts()
324 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_dis_hw_ts()
326 return -EINVAL; in tegra186_gpio_dis_hw_ts()
345 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_get() local
349 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_get()
351 return -ENODEV; in tegra186_gpio_get()
365 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_set() local
369 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_set()
386 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_set_config() local
390 base = tegra186_gpio_get_base(gpio, offset); in tegra186_gpio_set_config()
392 return -ENXIO; in tegra186_gpio_set_config()
395 return -ENOTSUPP; in tegra186_gpio_set_config()
400 * The Tegra186 GPIO controller supports a maximum of 255 ms debounce in tegra186_gpio_set_config()
404 return -EINVAL; in tegra186_gpio_set_config()
420 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_add_pin_ranges() local
426 if (!gpio->soc->pinmux || gpio->soc->num_pin_ranges == 0) in tegra186_gpio_add_pin_ranges()
429 np = of_find_compatible_node(NULL, NULL, gpio->soc->pinmux); in tegra186_gpio_add_pin_ranges()
431 return -ENODEV; in tegra186_gpio_add_pin_ranges()
436 return -EPROBE_DEFER; in tegra186_gpio_add_pin_ranges()
438 for (i = 0; i < gpio->soc->num_pin_ranges; i++) { in tegra186_gpio_add_pin_ranges()
439 unsigned int pin = gpio->soc->pin_ranges[i].offset, port; in tegra186_gpio_add_pin_ranges()
440 const char *group = gpio->soc->pin_ranges[i].group; in tegra186_gpio_add_pin_ranges()
445 if (port >= gpio->soc->num_ports) { in tegra186_gpio_add_pin_ranges()
446 dev_warn(chip->parent, "invalid port %u for %s\n", in tegra186_gpio_add_pin_ranges()
452 pin += gpio->soc->ports[j].pins; in tegra186_gpio_add_pin_ranges()
466 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_of_xlate() local
469 if (WARN_ON(chip->of_gpio_n_cells < 2)) in tegra186_gpio_of_xlate()
470 return -EINVAL; in tegra186_gpio_of_xlate()
472 if (WARN_ON(spec->args_count < chip->of_gpio_n_cells)) in tegra186_gpio_of_xlate()
473 return -EINVAL; in tegra186_gpio_of_xlate()
475 port = spec->args[0] / 8; in tegra186_gpio_of_xlate()
476 pin = spec->args[0] % 8; in tegra186_gpio_of_xlate()
478 if (port >= gpio->soc->num_ports) { in tegra186_gpio_of_xlate()
479 dev_err(chip->parent, "invalid port number: %u\n", port); in tegra186_gpio_of_xlate()
480 return -EINVAL; in tegra186_gpio_of_xlate()
484 offset += gpio->soc->ports[i].pins; in tegra186_gpio_of_xlate()
487 *flags = spec->args[1]; in tegra186_gpio_of_xlate()
492 #define to_tegra_gpio(x) container_of((x), struct tegra_gpio, gpio)
497 struct tegra_gpio *gpio = to_tegra_gpio(gc); in tegra186_irq_ack() local
500 base = tegra186_gpio_get_base(gpio, data->hwirq); in tegra186_irq_ack()
510 struct tegra_gpio *gpio = to_tegra_gpio(gc); in tegra186_irq_mask() local
514 base = tegra186_gpio_get_base(gpio, data->hwirq); in tegra186_irq_mask()
522 gpiochip_disable_irq(&gpio->gpio, data->hwirq); in tegra186_irq_mask()
528 struct tegra_gpio *gpio = to_tegra_gpio(gc); in tegra186_irq_unmask() local
532 base = tegra186_gpio_get_base(gpio, data->hwirq); in tegra186_irq_unmask()
536 gpiochip_enable_irq(&gpio->gpio, data->hwirq); in tegra186_irq_unmask()
546 struct tegra_gpio *gpio = to_tegra_gpio(gc); in tegra186_irq_set_type() local
550 base = tegra186_gpio_get_base(gpio, data->hwirq); in tegra186_irq_set_type()
552 return -ENODEV; in tegra186_irq_set_type()
585 return -EINVAL; in tegra186_irq_set_type()
595 if (data->parent_data) in tegra186_irq_set_type()
603 if (data->parent_data) in tegra186_irq_set_wake()
613 seq_printf(p, dev_name(gc->parent)); in tegra186_irq_print_chip()
629 struct tegra_gpio *gpio = irq_desc_get_handler_data(desc); in tegra186_gpio_irq() local
630 struct irq_domain *domain = gpio->gpio.irq.domain; in tegra186_gpio_irq()
637 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_irq()
638 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_irq()
643 base = gpio->base + port->bank * 0x1000 + port->port * 0x200; in tegra186_gpio_irq()
646 for (j = 0; j < gpio->num_irqs_per_bank; j++) { in tegra186_gpio_irq()
647 if (parent == gpio->irq[port->bank * gpio->num_irqs_per_bank + j]) in tegra186_gpio_irq()
651 if (j == gpio->num_irqs_per_bank) in tegra186_gpio_irq()
656 for_each_set_bit(pin, &value, port->pins) { in tegra186_gpio_irq()
662 offset += port->pins; in tegra186_gpio_irq()
673 struct tegra_gpio *gpio = gpiochip_get_data(domain->host_data); in tegra186_gpio_irq_domain_translate() local
676 if (WARN_ON(gpio->gpio.of_gpio_n_cells < 2)) in tegra186_gpio_irq_domain_translate()
677 return -EINVAL; in tegra186_gpio_irq_domain_translate()
679 if (WARN_ON(fwspec->param_count < gpio->gpio.of_gpio_n_cells)) in tegra186_gpio_irq_domain_translate()
680 return -EINVAL; in tegra186_gpio_irq_domain_translate()
682 port = fwspec->param[0] / 8; in tegra186_gpio_irq_domain_translate()
683 pin = fwspec->param[0] % 8; in tegra186_gpio_irq_domain_translate()
685 if (port >= gpio->soc->num_ports) in tegra186_gpio_irq_domain_translate()
686 return -EINVAL; in tegra186_gpio_irq_domain_translate()
689 offset += gpio->soc->ports[i].pins; in tegra186_gpio_irq_domain_translate()
691 *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK; in tegra186_gpio_irq_domain_translate()
702 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_populate_parent_fwspec() local
703 struct irq_fwspec *fwspec = &gfwspec->fwspec; in tegra186_gpio_populate_parent_fwspec()
705 fwspec->fwnode = chip->irq.parent_domain->fwnode; in tegra186_gpio_populate_parent_fwspec()
706 fwspec->param_count = 3; in tegra186_gpio_populate_parent_fwspec()
707 fwspec->param[0] = gpio->soc->instance; in tegra186_gpio_populate_parent_fwspec()
708 fwspec->param[1] = parent_hwirq; in tegra186_gpio_populate_parent_fwspec()
709 fwspec->param[2] = parent_type; in tegra186_gpio_populate_parent_fwspec()
720 *parent_hwirq = chip->irq.child_offset_to_irq(chip, hwirq); in tegra186_gpio_child_to_parent_hwirq()
729 struct tegra_gpio *gpio = gpiochip_get_data(chip); in tegra186_gpio_child_offset_to_irq() local
732 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_child_offset_to_irq()
733 if (offset < gpio->soc->ports[i].pins) in tegra186_gpio_child_offset_to_irq()
736 offset -= gpio->soc->ports[i].pins; in tegra186_gpio_child_offset_to_irq()
743 { .compatible = "nvidia,tegra186-pmc" },
744 { .compatible = "nvidia,tegra194-pmc" },
745 { .compatible = "nvidia,tegra234-pmc" },
749 static void tegra186_gpio_init_route_mapping(struct tegra_gpio *gpio) in tegra186_gpio_init_route_mapping() argument
751 struct device *dev = gpio->gpio.parent; in tegra186_gpio_init_route_mapping()
755 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_init_route_mapping()
756 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_init_route_mapping()
757 unsigned int offset, p = port->port; in tegra186_gpio_init_route_mapping()
760 base = gpio->secure + port->bank * 0x1000 + 0x800; in tegra186_gpio_init_route_mapping()
775 port->name); in tegra186_gpio_init_route_mapping()
780 * By default we only want to route GPIO pins to IRQ 0. This works in tegra186_gpio_init_route_mapping()
782 * and hence all GPIO pins are owned by Linux. in tegra186_gpio_init_route_mapping()
789 value = BIT(port->pins) - 1; in tegra186_gpio_init_route_mapping()
795 static unsigned int tegra186_gpio_irqs_per_bank(struct tegra_gpio *gpio) in tegra186_gpio_irqs_per_bank() argument
797 struct device *dev = gpio->gpio.parent; in tegra186_gpio_irqs_per_bank()
799 if (gpio->num_irq > gpio->num_banks) { in tegra186_gpio_irqs_per_bank()
800 if (gpio->num_irq % gpio->num_banks != 0) in tegra186_gpio_irqs_per_bank()
804 if (gpio->num_irq < gpio->num_banks) in tegra186_gpio_irqs_per_bank()
807 gpio->num_irqs_per_bank = gpio->num_irq / gpio->num_banks; in tegra186_gpio_irqs_per_bank()
809 if (gpio->num_irqs_per_bank > gpio->soc->num_irqs_per_bank) in tegra186_gpio_irqs_per_bank()
816 gpio->num_irq, gpio->num_banks); in tegra186_gpio_irqs_per_bank()
817 return -EINVAL; in tegra186_gpio_irqs_per_bank()
824 struct tegra_gpio *gpio; in tegra186_gpio_probe() local
829 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); in tegra186_gpio_probe()
830 if (!gpio) in tegra186_gpio_probe()
831 return -ENOMEM; in tegra186_gpio_probe()
833 gpio->soc = device_get_match_data(&pdev->dev); in tegra186_gpio_probe()
834 gpio->gpio.label = gpio->soc->name; in tegra186_gpio_probe()
835 gpio->gpio.parent = &pdev->dev; in tegra186_gpio_probe()
838 for (i = 0; i < gpio->soc->num_ports; i++) in tegra186_gpio_probe()
839 if (gpio->soc->ports[i].bank > gpio->num_banks) in tegra186_gpio_probe()
840 gpio->num_banks = gpio->soc->ports[i].bank; in tegra186_gpio_probe()
842 gpio->num_banks++; in tegra186_gpio_probe()
845 gpio->secure = devm_platform_ioremap_resource_byname(pdev, "security"); in tegra186_gpio_probe()
846 if (IS_ERR(gpio->secure)) { in tegra186_gpio_probe()
847 gpio->secure = devm_platform_ioremap_resource(pdev, 0); in tegra186_gpio_probe()
848 if (IS_ERR(gpio->secure)) in tegra186_gpio_probe()
849 return PTR_ERR(gpio->secure); in tegra186_gpio_probe()
852 gpio->base = devm_platform_ioremap_resource_byname(pdev, "gpio"); in tegra186_gpio_probe()
853 if (IS_ERR(gpio->base)) { in tegra186_gpio_probe()
854 gpio->base = devm_platform_ioremap_resource(pdev, 1); in tegra186_gpio_probe()
855 if (IS_ERR(gpio->base)) in tegra186_gpio_probe()
856 return PTR_ERR(gpio->base); in tegra186_gpio_probe()
863 gpio->num_irq = err; in tegra186_gpio_probe()
865 err = tegra186_gpio_irqs_per_bank(gpio); in tegra186_gpio_probe()
869 gpio->irq = devm_kcalloc(&pdev->dev, gpio->num_irq, sizeof(*gpio->irq), in tegra186_gpio_probe()
871 if (!gpio->irq) in tegra186_gpio_probe()
872 return -ENOMEM; in tegra186_gpio_probe()
874 for (i = 0; i < gpio->num_irq; i++) { in tegra186_gpio_probe()
879 gpio->irq[i] = err; in tegra186_gpio_probe()
882 gpio->gpio.request = gpiochip_generic_request; in tegra186_gpio_probe()
883 gpio->gpio.free = gpiochip_generic_free; in tegra186_gpio_probe()
884 gpio->gpio.get_direction = tegra186_gpio_get_direction; in tegra186_gpio_probe()
885 gpio->gpio.direction_input = tegra186_gpio_direction_input; in tegra186_gpio_probe()
886 gpio->gpio.direction_output = tegra186_gpio_direction_output; in tegra186_gpio_probe()
887 gpio->gpio.get = tegra186_gpio_get; in tegra186_gpio_probe()
888 gpio->gpio.set = tegra186_gpio_set; in tegra186_gpio_probe()
889 gpio->gpio.set_config = tegra186_gpio_set_config; in tegra186_gpio_probe()
890 gpio->gpio.add_pin_ranges = tegra186_gpio_add_pin_ranges; in tegra186_gpio_probe()
891 gpio->gpio.init_valid_mask = tegra186_init_valid_mask; in tegra186_gpio_probe()
892 if (gpio->soc->has_gte) { in tegra186_gpio_probe()
893 gpio->gpio.en_hw_timestamp = tegra186_gpio_en_hw_ts; in tegra186_gpio_probe()
894 gpio->gpio.dis_hw_timestamp = tegra186_gpio_dis_hw_ts; in tegra186_gpio_probe()
897 gpio->gpio.base = -1; in tegra186_gpio_probe()
899 for (i = 0; i < gpio->soc->num_ports; i++) in tegra186_gpio_probe()
900 gpio->gpio.ngpio += gpio->soc->ports[i].pins; in tegra186_gpio_probe()
902 names = devm_kcalloc(gpio->gpio.parent, gpio->gpio.ngpio, in tegra186_gpio_probe()
905 return -ENOMEM; in tegra186_gpio_probe()
907 for (i = 0, offset = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_probe()
908 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_probe()
911 for (j = 0; j < port->pins; j++) { in tegra186_gpio_probe()
912 name = devm_kasprintf(gpio->gpio.parent, GFP_KERNEL, in tegra186_gpio_probe()
913 "P%s.%02x", port->name, j); in tegra186_gpio_probe()
915 return -ENOMEM; in tegra186_gpio_probe()
920 offset += port->pins; in tegra186_gpio_probe()
923 gpio->gpio.names = (const char * const *)names; in tegra186_gpio_probe()
926 gpio->gpio.of_gpio_n_cells = 2; in tegra186_gpio_probe()
927 gpio->gpio.of_xlate = tegra186_gpio_of_xlate; in tegra186_gpio_probe()
930 irq = &gpio->gpio.irq; in tegra186_gpio_probe()
932 irq->fwnode = dev_fwnode(&pdev->dev); in tegra186_gpio_probe()
933 irq->child_to_parent_hwirq = tegra186_gpio_child_to_parent_hwirq; in tegra186_gpio_probe()
934 irq->populate_parent_alloc_arg = tegra186_gpio_populate_parent_fwspec; in tegra186_gpio_probe()
935 irq->child_offset_to_irq = tegra186_gpio_child_offset_to_irq; in tegra186_gpio_probe()
936 irq->child_irq_domain_ops.translate = tegra186_gpio_irq_domain_translate; in tegra186_gpio_probe()
937 irq->handler = handle_simple_irq; in tegra186_gpio_probe()
938 irq->default_type = IRQ_TYPE_NONE; in tegra186_gpio_probe()
939 irq->parent_handler = tegra186_gpio_irq; in tegra186_gpio_probe()
940 irq->parent_handler_data = gpio; in tegra186_gpio_probe()
941 irq->num_parents = gpio->num_irq; in tegra186_gpio_probe()
950 if (gpio->num_irqs_per_bank > 1) { in tegra186_gpio_probe()
951 irq->parents = devm_kcalloc(&pdev->dev, gpio->num_banks, in tegra186_gpio_probe()
952 sizeof(*irq->parents), GFP_KERNEL); in tegra186_gpio_probe()
953 if (!irq->parents) in tegra186_gpio_probe()
954 return -ENOMEM; in tegra186_gpio_probe()
956 for (i = 0; i < gpio->num_banks; i++) in tegra186_gpio_probe()
957 irq->parents[i] = gpio->irq[i * gpio->num_irqs_per_bank]; in tegra186_gpio_probe()
959 irq->num_parents = gpio->num_banks; in tegra186_gpio_probe()
961 irq->num_parents = gpio->num_irq; in tegra186_gpio_probe()
962 irq->parents = gpio->irq; in tegra186_gpio_probe()
965 if (gpio->soc->num_irqs_per_bank > 1) in tegra186_gpio_probe()
966 tegra186_gpio_init_route_mapping(gpio); in tegra186_gpio_probe()
971 irq->parent_domain = irq_find_host(np); in tegra186_gpio_probe()
974 if (!irq->parent_domain) in tegra186_gpio_probe()
975 return -EPROBE_DEFER; in tegra186_gpio_probe()
981 irq->map = devm_kcalloc(&pdev->dev, gpio->gpio.ngpio, in tegra186_gpio_probe()
982 sizeof(*irq->map), GFP_KERNEL); in tegra186_gpio_probe()
983 if (!irq->map) in tegra186_gpio_probe()
984 return -ENOMEM; in tegra186_gpio_probe()
986 for (i = 0, offset = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_probe()
987 const struct tegra_gpio_port *port = &gpio->soc->ports[i]; in tegra186_gpio_probe()
989 for (j = 0; j < port->pins; j++) in tegra186_gpio_probe()
990 irq->map[offset + j] = irq->parents[port->bank]; in tegra186_gpio_probe()
992 offset += port->pins; in tegra186_gpio_probe()
995 return devm_gpiochip_add_data(&pdev->dev, &gpio->gpio, gpio); in tegra186_gpio_probe()
1035 .name = "tegra186-gpio",
1063 .name = "tegra186-gpio-aon",
1116 .name = "tegra194-gpio",
1121 .pinmux = "nvidia,tegra194-pinmux",
1144 .name = "tegra194-gpio-aon",
1190 .name = "tegra234-gpio",
1216 .name = "tegra234-gpio-aon",
1248 .name = "tegra241-gpio",
1270 .name = "tegra241-gpio-aon",
1278 .compatible = "nvidia,tegra186-gpio",
1281 .compatible = "nvidia,tegra186-gpio-aon",
1284 .compatible = "nvidia,tegra194-gpio",
1287 .compatible = "nvidia,tegra194-gpio-aon",
1290 .compatible = "nvidia,tegra234-gpio",
1293 .compatible = "nvidia,tegra234-gpio-aon",
1314 .name = "tegra186-gpio",
1322 MODULE_DESCRIPTION("NVIDIA Tegra186 GPIO controller driver");