Lines Matching +full:chip +full:- +full:wide
1 // SPDX-License-Identifier: GPL-2.0-or-later
20 /* SYSCON driver is designed to use 32-bit wide registers */
25 * struct syscon_gpio_data - Configuration for the device.
43 int (*set)(struct gpio_chip *chip, unsigned int offset,
48 struct gpio_chip chip; member
55 static int syscon_gpio_get(struct gpio_chip *chip, unsigned offset) in syscon_gpio_get() argument
57 struct syscon_gpio_priv *priv = gpiochip_get_data(chip); in syscon_gpio_get()
61 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in syscon_gpio_get()
63 ret = regmap_read(priv->syscon, in syscon_gpio_get()
71 static int syscon_gpio_set(struct gpio_chip *chip, unsigned int offset, int val) in syscon_gpio_set() argument
73 struct syscon_gpio_priv *priv = gpiochip_get_data(chip); in syscon_gpio_set()
76 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in syscon_gpio_set()
78 return regmap_update_bits(priv->syscon, in syscon_gpio_set()
84 static int syscon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) in syscon_gpio_dir_in() argument
86 struct syscon_gpio_priv *priv = gpiochip_get_data(chip); in syscon_gpio_dir_in()
88 if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { in syscon_gpio_dir_in()
91 offs = priv->dir_reg_offset + in syscon_gpio_dir_in()
92 priv->data->dir_bit_offset + offset; in syscon_gpio_dir_in()
94 regmap_update_bits(priv->syscon, in syscon_gpio_dir_in()
102 static int syscon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int val) in syscon_gpio_dir_out() argument
104 struct syscon_gpio_priv *priv = gpiochip_get_data(chip); in syscon_gpio_dir_out()
106 if (priv->data->flags & GPIO_SYSCON_FEAT_DIR) { in syscon_gpio_dir_out()
109 offs = priv->dir_reg_offset + in syscon_gpio_dir_out()
110 priv->data->dir_bit_offset + offset; in syscon_gpio_dir_out()
112 regmap_update_bits(priv->syscon, in syscon_gpio_dir_out()
118 return chip->set(chip, offset, val); in syscon_gpio_dir_out()
122 /* ARM CLPS711X SYSFLG1 Bits 8-10 */
128 static int rockchip_gpio_set(struct gpio_chip *chip, unsigned int offset, in rockchip_gpio_set() argument
131 struct syscon_gpio_priv *priv = gpiochip_get_data(chip); in rockchip_gpio_set()
137 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in rockchip_gpio_set()
140 ret = regmap_write(priv->syscon, in rockchip_gpio_set()
144 dev_err(chip->parent, "gpio write failed ret(%d)\n", ret); in rockchip_gpio_set()
159 static int keystone_gpio_set(struct gpio_chip *chip, unsigned int offset, in keystone_gpio_set() argument
162 struct syscon_gpio_priv *priv = gpiochip_get_data(chip); in keystone_gpio_set()
166 offs = priv->dreg_offset + priv->data->dat_bit_offset + offset; in keystone_gpio_set()
172 priv->syscon, in keystone_gpio_set()
177 dev_err(chip->parent, "gpio write failed ret(%d)\n", ret); in keystone_gpio_set()
192 .compatible = "cirrus,ep7209-mctrl-gpio",
196 .compatible = "ti,keystone-dsp-gpio",
200 .compatible = "rockchip,rk3328-grf-gpio",
209 struct device *dev = &pdev->dev; in syscon_gpio_probe()
211 struct device_node *np = dev->of_node; in syscon_gpio_probe()
217 return -ENOMEM; in syscon_gpio_probe()
219 priv->data = of_device_get_match_data(dev); in syscon_gpio_probe()
221 priv->syscon = syscon_regmap_lookup_by_phandle(np, "gpio,syscon-dev"); in syscon_gpio_probe()
222 if (IS_ERR(priv->syscon) && np->parent) { in syscon_gpio_probe()
223 priv->syscon = syscon_node_to_regmap(np->parent); in syscon_gpio_probe()
226 if (IS_ERR(priv->syscon)) in syscon_gpio_probe()
227 return PTR_ERR(priv->syscon); in syscon_gpio_probe()
230 ret = of_property_read_u32_index(np, "gpio,syscon-dev", 1, in syscon_gpio_probe()
231 &priv->dreg_offset); in syscon_gpio_probe()
235 priv->dreg_offset <<= 3; in syscon_gpio_probe()
237 ret = of_property_read_u32_index(np, "gpio,syscon-dev", 2, in syscon_gpio_probe()
238 &priv->dir_reg_offset); in syscon_gpio_probe()
242 priv->dir_reg_offset <<= 3; in syscon_gpio_probe()
245 priv->chip.parent = dev; in syscon_gpio_probe()
246 priv->chip.owner = THIS_MODULE; in syscon_gpio_probe()
247 priv->chip.label = dev_name(dev); in syscon_gpio_probe()
248 priv->chip.base = -1; in syscon_gpio_probe()
249 priv->chip.ngpio = priv->data->bit_count; in syscon_gpio_probe()
250 priv->chip.get = syscon_gpio_get; in syscon_gpio_probe()
251 if (priv->data->flags & GPIO_SYSCON_FEAT_IN) in syscon_gpio_probe()
252 priv->chip.direction_input = syscon_gpio_dir_in; in syscon_gpio_probe()
253 if (priv->data->flags & GPIO_SYSCON_FEAT_OUT) { in syscon_gpio_probe()
254 priv->chip.set = priv->data->set ? : syscon_gpio_set; in syscon_gpio_probe()
255 priv->chip.direction_output = syscon_gpio_dir_out; in syscon_gpio_probe()
258 return devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); in syscon_gpio_probe()
263 .name = "gpio-syscon",